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# CH32V003
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RISC-V2A, 16KB Flash, 2KB SRAM, 48MHz.
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> **Note**
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> CH32V003 is a riscv32ec core, which is not supported by ofiicial Rust yet.
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> ch32-rs team maintains a fork of Rust at <https://github.com/ch32-rs/rust>.
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> You can check [Noxim's Blog](https://noxim.xyz/blog/rust-ch32v003/introduction/) for riscv32ec support.
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## Debug support
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1-wire debug.
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```text
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SWDIO <-> D1/DIO@MCU, PD1
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GND <-> GND@MCU
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3V3 <-> 3V3@MCU (No need if you connect your MCU board with USB-C power supply)
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```
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- [x] Flash support
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- [x] Memory dump support
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- [x] Reset / Resume
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- [x] Reg read/write support
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```console
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> wlink -v flash ./firmware.bin
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13:41:49 [INFO] WCH-Link v2.8 (WCH-LinkE-CH32V305)
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13:41:49 [INFO] attached chip: CH32V003(0x00300500)
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13:41:49 [DEBUG] (1) wlink::operations: Chip UID: cd-ab-80-17-48-bc-95-7f
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13:41:49 [DEBUG] (1) wlink::operations: flash protected: false
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13:41:49 [DEBUG] (1) wlink::operations: SRAM CODE mode: 3
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13:41:49 [DEBUG] (1) wlink::operations: already halted
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13:41:49 [DEBUG] (1) wlink::operations: RISC-V core version: Some("WCH-V2A")
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13:41:49 [INFO] flash 860 bytes
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13:41:49 [DEBUG] (1) wlink::operations: Code start address 0x08000000
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13:41:49 [DEBUG] (1) wlink::operations: flash op written
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13:41:49 [DEBUG] (1) wlink::operations: fastprogram done
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13:41:49 [INFO] flash done
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13:41:50 [INFO] now reset...
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13:41:51 [INFO] resume executing...
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13:41:51 [WARN] resume fails
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```
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## Chips
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```
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* CH32V003F4P6-0x003005x0
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* CH32V003F4U6-0x003105x0
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* CH32V003A4M6-0x003205x0
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* CH32V003J4M6-0x003305x0
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```
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