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82 lines
3.5 KiB
82 lines
3.5 KiB
18 years ago
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/* $Id: ds15x1reg.h,v 1.1.1.1 2006/09/14 01:59:08 root Exp $ */
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/*
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* Copyright (c) 2001 Opsycon AB (www.opsycon.se / www.opsycon.com)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Opsycon AB, Sweden.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#ifndef _DS_15x1REG_H_
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#define _DS_15x1REG_H_
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/*
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* Register definitions for Dallas Semiconductor DS15x1 clock chips.
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*/
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#define DS_REG_SEC 0x00 /* Seconds reg */
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#define DS_REG_MIN 0x01 /* Minutes reg */
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#define DS_REG_HOUR 0x02 /* Hours reg */
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#define DS_REG_WDAY 0x03 /* Day of week reg */
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#define DS_REG_DATE 0x04 /* Day of month reg */
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#define DS_REG_MONTH 0x05 /* Month reg */
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#define DS_REG_YEAR 0x06 /* Year reg */
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#define DS_REG_CENT 0x07 /* Century reg */
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#define DS_REG_ASEC 0x08 /* Seconds reg */
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#define DS_REG_AMIN 0x09 /* Minutes reg */
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#define DS_REG_AHOUR 0x0a /* Hours reg */
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#define DS_REG_ADATE 0x0b /* Date reg */
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#define DS_REG_WDMS 0x0c /* Watchdog millisec */
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#define DS_REG_WDSEC 0x0d /* Watchdog seconds */
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#define DS_MONTH_E32K 0x40 /* Enable 32Khz out when 0 */
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#define DS_MONTH_EOSC 0x80 /* Enable oscilator when 0 */
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#define DS_REG_CTLA 0x0e /* Control reg A */
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#define DS_REG_CTLB 0x0f /* Control reg B */
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#define DS_CTLA_IRQF 0x01 /* IRQ Flag */
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#define DS_CTLA_WDF 0x02 /* Watchdog Flag */
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#define DS_CTLA_KSF 0x04 /* Kickstart Flag */
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#define DS_CTLA_TDF 0x08 /* TOD Flag */
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#define DS_CTLA_PAB 0x10 /* Power Active Bar Flag */
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#define DS_CTLA_PRS 0x20 /* PAB reset Select */
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#define DS_CTLA_BLF2 0x40 /* Battery level flag 2 */
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#define DS_CTLA_BLF1 0x80 /* Battery level flag 1 */
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#define DS_CTLB_WDS 0x01 /* Watchdog route IRQ/RESET */
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#define DS_CTLB_WDE 0x02 /* Watchdog enable */
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#define DS_CTLB_KIE 0x04 /* 'Kickstart' interrupt enable */
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#define DS_CTLB_TIE 0x08 /* TOD Alarm interrupt enable */
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#define DS_CTLB_TPE 0x10 /* TOD Alarm power enable */
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#define DS_CTLB_BME 0x20 /* Burst mode enable */
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#define DS_CTLB_CS 0x40 /* Crystal select 6pf/12.5pf */
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#define DS_CTLB_TE 0x80 /* Transfer enable */
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#endif /* _DS_15x1REG_H_ */
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