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1. Porting the 3A+690E x86emu module to 2G+690e platform and it works correctly. 2. The HT frequency is adjusted to 800MHz. 3. The start address of PCI IO and memory space are adjusted according to the 3A+690E platform. 4. The framebuffer address(0xb0000000) doesn't map through TLB. The pcitlb.c is added in start.S, but it doesn't work. 5. Fix the IO-read/write base from 0xa000_0000 to 0x0000_0000 in sys/linux/io.h.master
LI Wengang
15 years ago
committed by
LIU Qi
LIU Qi
29 changed files with 9814 additions and 7564 deletions
@ -0,0 +1,107 @@ |
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/* |
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* Now the function on 2g_+690e platform couldn't work |
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*/ |
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|
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li t0, 0x20000000 |
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.set mips64 |
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dmfc0 t1, COP_0_TLB_PG_MASK, 1 |
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or t1, t1, t0 |
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dmtc0 t1, COP_0_TLB_PG_MASK, 1 |
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|
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dmfc0 t0, COP_0_CONFIG, 3 |
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ori t0, t0, 0x80 |
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dmtc0 t0, COP_0_CONFIG, 3 |
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.set mips3 |
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|
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li t0, 0xfff000 |
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mtc0 t0, COP_0_TLB_PG_MASK # 16MB page |
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|
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li t0, 15 |
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|
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li t3, 0xd0000000 # entry_hi |
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#dli t4, (0x00000e0010000000 >> 6)|0x17 # entry_lo, uncached, valid, dirty, global |
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li t4, 0x0e001000 |
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#li t4, 0x0efdf000 |
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.set mips64 |
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dsll t4, t4, 10 |
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.set mips3 |
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ori t4, t4, 0x17 |
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|
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li t5, (0x1000000>>6) # 16M stride |
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li t6, 0x2000000 # VPN2 32M stride |
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|
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.set mips64 |
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1: |
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dmtc0 t3, COP_0_TLB_HI |
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daddu t3, t3, t6 |
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|
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dmtc0 t4, COP_0_TLB_LO0 |
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daddu t4, t4, t5 |
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dmtc0 t4, COP_0_TLB_LO1 |
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daddu t4, t4, t5 |
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|
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.set mips3 |
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|
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mtc0 t0, COP_0_TLB_INDEX # 16MB page |
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nop |
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nop |
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nop |
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nop |
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nop |
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tlbwi # random++ |
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|
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bnez t0, 1b |
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addiu t0, t0, -1 |
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|
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###################################### Video RAM mapping ########## |
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|
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li t0, 15 |
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|
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li t3, 0xf0000000 # entry_hi |
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#dli t4, (0x0000000070000000 >> 6)|0x1f # entry_lo, cached, valid, dirty, global |
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|
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#if 1 |
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li a0, 0x3f000000 |
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bleu msize, a0, 1f |
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nop |
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li t4, 0x0000f000 |
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b 2f |
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nop |
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#endif |
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1: |
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li t4, 0x00007000 |
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2: |
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.set mips64 |
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dsll t4, t4, 10 |
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.set mips3 |
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ori t4, t4, 0x1f |
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|
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li t5, (0x1000000>>6) # 16M stride |
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li t6, 0x2000000 # VPN2 32M stride |
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|
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.set mips64 |
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1: |
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dmtc0 t3, COP_0_TLB_HI |
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daddu t3, t3, t6 |
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|
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dmtc0 t4, COP_0_TLB_LO0 |
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daddu t4, t4, t5 |
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dmtc0 t4, COP_0_TLB_LO1 |
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daddu t4, t4, t5 |
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|
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.set mips3 |
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|
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addiu t1, t0, 16 |
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mtc0 t1, COP_0_TLB_INDEX # 16MB page |
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nop |
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nop |
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nop |
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nop |
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nop |
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tlbwi |
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|
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bnez t0, 1b |
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addiu t0, t0, -1 |
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|
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|
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|
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File diff suppressed because it is too large
File diff suppressed because it is too large
@ -0,0 +1,64 @@ |
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#include "rs690_struct.h" |
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/*--------------------------------------------------------------------------------*/ |
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|
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/*
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* internal used, most will be filled by vuma init |
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*/ |
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struct ati_integrated_system_info ati_int_info = { |
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/* basic */ |
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0, // size of this struct, filled by init
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|
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0, // major_ver, filled by init
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|
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0, // minor_ver, filled by init
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|
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0, // bootup_engine_clock, filled by init, 10KHz unit
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0, // bootup_memory_clock, filled by init, 10KHz unit
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|
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0, // max_system_memory_clock, filled by init, 10KHz unit
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|
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0, // min_system_memory_clock, filled by init, 10KHz unit
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|
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0, // num_of_cycle_in_period_hi, filled by init
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|
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0, // Reserved1
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|
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0, // Reserved2
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|
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0, // inter_nb_voltage_low
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|
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0, // inter_nb_voltage_high
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|
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0, // Reserved3
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|
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0, // fsb, MHz unit
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|
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0, // cap_flag
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|
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/* upstream part */ |
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0, // pcie_nbcfg_reg7, filled by init
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|
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0, // k8 memory clock, filled by init
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0, // k8 sync start delay, filled by init
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|
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0, // k8 data return time, filled by init
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|
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0, // max_nb_voltage, filled by init
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|
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0, // min_nb_voltage, filled by init
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|
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0, // memory_type, filled by init
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|
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/* others */ |
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0, // num of cycles in period, filled by init
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0, // start_pwm_high_time, filled by init
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0, // ht_link_width, filled by init
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0, // max_nb_voltage_high, filled by init
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|
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0 // min_nb_voltage_high, filled by init
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}; |
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@ -0,0 +1,39 @@ |
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#include <sys/linux/types.h> |
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struct ati_integrated_system_info { |
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u16 struct_size; // this struct size
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u8 major_ver; // major version
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u8 minor_ver; // minor version
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u32 bootup_engine_clock; // unit : 10KHz
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u32 bootup_memory_clock; // unit : 10KHz
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u32 max_system_memory_clock; // unit : 10KHz
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u32 min_system_memory_clock; // unit : 10KHz
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u8 num_of_cycles_in_period_hi; |
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u8 reserved1; |
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u16 reserved2; |
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u16 inter_nb_voltage_low; // intermidiate PWM value to set the voltage
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u16 inter_nb_voltage_high; |
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u32 reserved3; |
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u16 fsb; // unit : MHz
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#define CAP_FLAG_FAKE_HDMI_SUPPORT 0x01 |
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#define CAP_FLAG_CLOCK_GATING_ENABLE 0x02 |
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|
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#define CAP_FLAG_NO_CARD 0x00 |
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#define CAP_FLAG_AC_CARD 0x04 |
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#define CAP_FLAG_SDVO 0x08 |
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u16 cap_flag; |
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|
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u16 pcie_nbcfg_reg7; // NBMISC 0x37 value
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u16 k8_memory_clock; // k8 memory clock
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u16 k8_sync_start_delay; |
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u16 k8_data_return_time; |
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u8 max_nb_voltage; |
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u8 min_nb_voltage; |
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u8 memory_type; // bits[7:4] = '0001'DDR1 '0010'DDR2 '0011'DDR3
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|
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u8 num_of_cycles_in_period; |
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u8 start_pwm_high_time; |
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u8 ht_link_width; |
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u8 max_nb_voltage_high; |
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u8 min_nb_voltage_high; |
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}; |
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File diff suppressed because it is too large
@ -0,0 +1,96 @@ |
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/*********************************************************************
|
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* |
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* $Id: theater_out.h,v 1.1.2.2 2004/01/27 22:50:35 fulivi Exp $ |
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* |
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* Interface file for theater_out module |
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* |
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* Copyright (C) 2003 Federico Ulivi |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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* |
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* AUTHORS: F.Ulivi |
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* NOTES: |
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* $Log: theater_out.h,v $ |
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* Revision 1.1.2.2 2004/01/27 22:50:35 fulivi |
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* Support for positioning/sizing of image added |
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* |
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* Revision 1.1.2.9 2004/01/18 23:01:12 fede |
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* Functions for get/setting h/v pos/size replaced by |
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* theaterOutSetAttr/theaterOutGetAttr/theaterOutGetAttrLimits |
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* Circular inclusion with radeon.h fixed |
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* |
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* Revision 1.1.2.8 2004/01/11 21:43:32 fede |
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* Fixed problem with definition of TVStd |
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* |
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* Revision 1.1.2.7 2004/01/05 00:09:59 fede |
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* Functions for setting/getting H/V position added |
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* Functions for setting/getting on/off attribute removed |
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* |
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* Revision 1.1.2.1 2003/11/26 19:50:10 fulivi |
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* Support for ERT added |
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* |
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* Revision 1.1.2.6 2003/11/25 20:44:00 fede |
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* TV_STD_KEEP_OFF added |
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* |
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* Revision 1.1.2.5 2003/10/14 18:41:32 fede |
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* forceERT changed to forceVIP |
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* |
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* Revision 1.1.2.4 2003/10/11 12:30:30 fede |
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* Support for ERT added |
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* |
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* Revision 1.1 2003/09/28 21:42:37 fulivi |
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* Theater_out module added |
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* |
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* Revision 1.1.2.3 2003/09/28 15:26:09 fede |
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* Minor aesthetic changes |
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* |
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* Revision 1.1.2.1 2003/08/31 13:36:35 fede |
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* *** empty log message *** |
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* |
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* |
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*********************************************************************/ |
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|
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#ifndef _THEATER_OUT_H |
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#define _THEATER_OUT_H |
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|
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/**********************************************************************
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* |
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* TheaterOutPtr |
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* |
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* Pointer to TheaterOut struct. Actual definition is in theater_out.c |
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* |
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**********************************************************************/ |
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typedef struct TheaterOut *TheaterOutPtr; |
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/**********************************************************************
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* |
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* TVStd |
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* |
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* Tv standard |
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* |
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**********************************************************************/ |
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typedef enum { |
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TV_STD_NTSC, |
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TV_STD_PAL, |
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TV_STD_PAL_M, |
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TV_STD_PAL_60, |
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TV_STD_NTSC_J, |
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TV_STD_PAL_CN, |
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TV_STD_PAL_N, |
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TV_STD_KEEP_OFF, |
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TV_STD_N_STANDARDS /* Must be last */ |
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} TVStd; |
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#endif /* _THEATER_OUT_H */ |
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@ -0,0 +1,64 @@ |
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/*
|
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* Modifications to support Loongson Arch: |
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* Copyright (c) 2008 Lemote. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice unmodified, this list of conditions, and the following |
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* disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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*/ |
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|
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/*
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* VESA framebuffer support. Author: Lj.Peng <penglj@lemote.com> |
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*/ |
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/* For vesa mode control */ |
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#define GRAPHIC_MODE_100 0x100 /* 640x480 256*/ |
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#define GRAPHIC_MODE_101 0x101 /* 640x480 256*/ |
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#define GRAPHIC_MODE_102 0x102 /* 800x600 16 */ |
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#define GRAPHIC_MODE_103 0x103 /* 800x600 256*/ |
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#define GRAPHIC_MODE_104 0x104 /* 1024x768 16*/ |
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#define GRAPHIC_MODE_105 0x105 /* 1024x768 256*/ |
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#define GRAPHIC_MODE_106 0x106 /* 1280x1024 16*/ |
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#define GRAPHIC_MODE_107 0x107 /* 1280x1024 256*/ |
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#define GRAPHIC_MODE_10d 0x10d /* 320x200 32K(1:5:5:5)*/ |
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#define GRAPHIC_MODE_10e 0x10e /* 320x200 64K(5:6:5)*/ |
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#define GRAPHIC_MODE_10f 0x10f /* 320x200 16.8M(8:8:8)*/ |
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#define GRAPHIC_MODE_110 0x110 /* 640x480 32K*/ |
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#define GRAPHIC_MODE_111 0x111 /* 640x480 64K*/ |
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#define GRAPHIC_MODE_112 0x112 /* 640x480 16.8M*/ |
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#define GRAPHIC_MODE_113 0x113 /* 800x600 32K*/ |
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#define GRAPHIC_MODE_114 0x114 /* 800x600 64K*/ |
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#define GRAPHIC_MODE_115 0x115 /* 800x600 16.8M*/ |
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#define GRAPHIC_MODE_116 0x116 /* 1024x768 32K*/ |
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#define GRAPHIC_MODE_117 0x117 /* 1024x768 64K*/ |
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#define GRAPHIC_MODE_118 0x118 /* 1024x768 16.8M*/ |
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#define GRAPHIC_MODE_119 0x119 /* 1280x1024 32K*/ |
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#define GRAPHIC_MODE_11a 0x11a /* 1280x1024 64K*/ |
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#define GRAPHIC_MODE_11b 0x11b /* 1280x1024 16.8M*/ |
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#define USE_LINEAR_FRAMEBUFFER 0x4000 |
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struct vesamode { |
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int mode; |
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int width; |
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int height; |
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int bpp; |
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}; |
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@ -0,0 +1,589 @@ |
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/*
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* Modifications to support Loongson Arch: |
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* Copyright (c) 2008 Lemote. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice unmodified, this list of conditions, and the following |
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* disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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*/ |
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|
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/*
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* VESA framebuffer support. Author: Lj.Peng <penglj@lemote.com> |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <dev/pci/pcivar.h> |
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#include "xf86int10.h" |
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#include "xf86x86emu.h" |
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#include "linux/io.h" |
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|
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#include "mod_framebuffer.h" |
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#include "vesa.h" |
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#include <mod_sisfb.h> |
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//#include "bonito.h"
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extern struct pci_device *vga_dev; |
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int vesa_mode = 1; |
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/*
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* The following macros are especially useful for __asm__ |
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* inline assembler. |
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*/ |
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#ifndef __STR |
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#define __STR(x) #x |
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#endif |
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#ifndef STR |
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#define STR(x) __STR(x) |
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#endif |
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/*
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* Configure language |
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*/ |
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#ifdef __ASSEMBLY__ |
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#define _ULCAST_ |
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#else |
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#define _ULCAST_ (unsigned long) |
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#endif |
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|
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/*
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* Coprocessor 0 register names |
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*/ |
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#define CP0_INDEX $0 |
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#define CP0_RANDOM $1 |
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#define CP0_ENTRYLO0 $2 |
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#define CP0_ENTRYLO1 $3 |
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#define CP0_CONF $3 |
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#define CP0_CONTEXT $4 |
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#define CP0_PAGEMASK $5 |
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#define CP0_WIRED $6 |
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#define CP0_INFO $7 |
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#define CP0_BADVADDR $8 |
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#define CP0_COUNT $9 |
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#define CP0_ENTRYHI $10 |
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#define CP0_COMPARE $11 |
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#define CP0_STATUS $12 |
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#define CP0_CAUSE $13 |
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#define CP0_EPC $14 |
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#define CP0_PRID $15 |
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#define CP0_CONFIG $16 |
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#define CP0_LLADDR $17 |
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#define CP0_WATCHLO $18 |
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#define CP0_WATCHHI $19 |
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#define CP0_XCONTEXT $20 |
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#define CP0_FRAMEMASK $21 |
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#define CP0_DIAGNOSTIC $22 |
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#define CP0_DEBUG $23 |
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#define CP0_DEPC $24 |
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#define CP0_PERFORMANCE $25 |
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#define CP0_ECC $26 |
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#define CP0_CACHEERR $27 |
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#define CP0_TAGLO $28 |
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#define CP0_TAGHI $29 |
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#define CP0_ERROREPC $30 |
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#define CP0_DESAVE $31 |
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/*
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* R4640/R4650 cp0 register names. These registers are listed |
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* here only for completeness; without MMU these CPUs are not useable |
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* by Linux. A future ELKS port might take make Linux run on them |
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* though ... |
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*/ |
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#define CP0_IBASE $0 |
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#define CP0_IBOUND $1 |
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#define CP0_DBASE $2 |
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#define CP0_DBOUND $3 |
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#define CP0_CALG $17 |
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#define CP0_IWATCH $18 |
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#define CP0_DWATCH $19 |
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/*
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* Coprocessor 0 Set 1 register names |
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*/ |
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#define CP0_S1_DERRADDR0 $26 |
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#define CP0_S1_DERRADDR1 $27 |
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#define CP0_S1_INTCONTROL $20 |
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/*
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* TX39 Series |
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*/ |
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#define CP0_TX39_CACHE $7 |
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/*
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* Coprocessor 1 (FPU) register names |
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*/ |
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#define CP1_REVISION $0 |
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#define CP1_STATUS $31 |
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#define PM_4K 0x00000000 |
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#define PM_16K 0x00006000 |
|||
#define PM_64K 0x0001e000 |
|||
#define PM_256K 0x0007e000 |
|||
#define PM_1M 0x001fe000 |
|||
#define PM_4M 0x007fe000 |
|||
#define PM_16M 0x01ffe000 |
|||
#define PM_64M 0x07ffe000 |
|||
#define PM_256M 0x1fffe000 |
|||
|
|||
/* Page size 64kb */ |
|||
#define CONFIG_PAGE_SIZE_1M |
|||
|
|||
/*
|
|||
* Default page size for a given kernel configuration |
|||
*/ |
|||
#ifdef CONFIG_PAGE_SIZE_4KB |
|||
#define PM_DEFAULT_MASK PM_4K |
|||
#elif defined(CONFIG_PAGE_SIZE_16KB) |
|||
#define PM_DEFAULT_MASK PM_16K |
|||
#elif defined(CONFIG_PAGE_SIZE_64KB) |
|||
#define PM_DEFAULT_MASK PM_64K |
|||
#elif defined(CONFIG_PAGE_SIZE_256KB) |
|||
#define PM_DEFAULT_MASK PM_256K |
|||
#elif defined(CONFIG_PAGE_SIZE_1M) |
|||
#define PM_DEFAULT_MASK PM_1M |
|||
#elif defined(CONFIG_PAGE_SIZE_4M) |
|||
#define PM_DEFAULT_MASK PM_4M |
|||
#else |
|||
#error Bad page size configuration! |
|||
#endif |
|||
|
|||
|
|||
/*
|
|||
* Values used for computation of new tlb entries |
|||
*/ |
|||
#define PL_4K 12 |
|||
#define PL_16K 14 |
|||
#define PL_64K 16 |
|||
#define PL_256K 18 |
|||
#define PL_1M 20 |
|||
#define PL_4M 22 |
|||
#define PL_16M 24 |
|||
#define PL_64M 26 |
|||
#define PL_256M 28 |
|||
|
|||
/*
|
|||
* Macros to access the system control coprocessor |
|||
*/ |
|||
|
|||
#define __read_32bit_c0_register(source, sel) \ |
|||
({ int __res; \ |
|||
if (sel == 0) \ |
|||
__asm__ __volatile__( \ |
|||
"mfc0\t%0, " #source "\n\t" \ |
|||
: "=r" (__res)); \ |
|||
else \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips32\n\t" \ |
|||
"mfc0\t%0, " #source ", " #sel "\n\t" \ |
|||
".set\tmips0\n\t" \ |
|||
: "=r" (__res)); \ |
|||
__res; \ |
|||
}) |
|||
|
|||
#define __read_64bit_c0_register(source, sel) \ |
|||
({ unsigned long __res; \ |
|||
if (sel == 0) \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips3\n\t" \ |
|||
"dmfc0\t%0, " #source "\n\t" \ |
|||
".set\tmips0" \ |
|||
: "=r" (__res)); \ |
|||
else \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips64\n\t" \ |
|||
"dmfc0\t%0, " #source ", " #sel "\n\t" \ |
|||
".set\tmips0" \ |
|||
: "=r" (__res)); \ |
|||
__res; \ |
|||
}) |
|||
|
|||
#define __write_32bit_c0_register(register, sel, value) \ |
|||
do { \ |
|||
if (sel == 0) \ |
|||
__asm__ __volatile__( \ |
|||
"mtc0\t%z0, " #register "\n\t" \ |
|||
: : "Jr" (value)); \ |
|||
else \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips32\n\t" \ |
|||
"mtc0\t%z0, " #register ", " #sel "\n\t" \ |
|||
".set\tmips0" \ |
|||
: : "Jr" (value)); \ |
|||
} while (0) |
|||
|
|||
#define __write_64bit_c0_register(register, sel, value) \ |
|||
do { \ |
|||
if (sel == 0) \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips3\n\t" \ |
|||
"dmtc0\t%z0, " #register "\n\t" \ |
|||
".set\tmips0" \ |
|||
: : "Jr" (value)); \ |
|||
else \ |
|||
__asm__ __volatile__( \ |
|||
".set\tmips64\n\t" \ |
|||
"dmtc0\t%z0, " #register ", " #sel "\n\t" \ |
|||
".set\tmips0" \ |
|||
: : "Jr" (value)); \ |
|||
} while (0) |
|||
|
|||
#define __read_ulong_c0_register(reg, sel) \ |
|||
((sizeof(unsigned long) == 4) ? \ |
|||
__read_32bit_c0_register(reg, sel) : \ |
|||
__read_64bit_c0_register(reg, sel)) |
|||
|
|||
#define __write_ulong_c0_register(reg, sel, val) \ |
|||
do { \ |
|||
if (sizeof(unsigned long) == 4) \ |
|||
__write_32bit_c0_register(reg, sel, val); \ |
|||
else \ |
|||
__write_64bit_c0_register(reg, sel, val); \ |
|||
} while (0) |
|||
|
|||
#define read_c0_index() __read_32bit_c0_register($0, 0) |
|||
#define write_c0_index(val) __write_32bit_c0_register($0, 0, val) |
|||
|
|||
#define read_c0_entrylo0() __read_ulong_c0_register($2, 0) |
|||
#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) |
|||
|
|||
#define read_c0_entrylo1() __read_ulong_c0_register($3, 0) |
|||
#define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) |
|||
|
|||
#define read_c0_conf() __read_32bit_c0_register($3, 0) |
|||
#define write_c0_conf(val) __write_32bit_c0_register($3, 0, val) |
|||
|
|||
#define read_c0_context() __read_ulong_c0_register($4, 0) |
|||
#define write_c0_context(val) __write_ulong_c0_register($4, 0, val) |
|||
|
|||
#define read_c0_pagemask() __read_32bit_c0_register($5, 0) |
|||
#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val) |
|||
|
|||
#define read_c0_wired() __read_32bit_c0_register($6, 0) |
|||
#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val) |
|||
|
|||
#define read_c0_info() __read_32bit_c0_register($7, 0) |
|||
|
|||
#define read_c0_cache() __read_32bit_c0_register($7, 0) /* TX39xx */ |
|||
#define write_c0_cache(val) __write_32bit_c0_register($7, 0, val) |
|||
|
|||
#define read_c0_count() __read_32bit_c0_register($9, 0) |
|||
#define write_c0_count(val) __write_32bit_c0_register($9, 0, val) |
|||
|
|||
#define read_c0_entryhi() __read_ulong_c0_register($10, 0) |
|||
#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) |
|||
|
|||
#define read_c0_compare() __read_32bit_c0_register($11, 0) |
|||
#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) |
|||
|
|||
#define read_c0_status() __read_32bit_c0_register($12, 0) |
|||
#define write_c0_status(val) __write_32bit_c0_register($12, 0, val) |
|||
|
|||
#define read_c0_cause() __read_32bit_c0_register($13, 0) |
|||
#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val) |
|||
|
|||
#define read_c0_prid() __read_32bit_c0_register($15, 0) |
|||
|
|||
#define read_c0_config() __read_32bit_c0_register($16, 0) |
|||
#define read_c0_config1() __read_32bit_c0_register($16, 1) |
|||
#define read_c0_config2() __read_32bit_c0_register($16, 2) |
|||
#define read_c0_config3() __read_32bit_c0_register($16, 3) |
|||
#define write_c0_config(val) __write_32bit_c0_register($16, 0, val) |
|||
#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) |
|||
#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) |
|||
#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) |
|||
|
|||
#define read_c0_framemask() __read_32bit_c0_register($21, 0) |
|||
#define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) |
|||
|
|||
#define read_c0_debug() __read_32bit_c0_register($23, 0) |
|||
#define write_c0_debug(val) __write_32bit_c0_register($23, 0, val) |
|||
|
|||
#define read_c0_depc() __read_ulong_c0_register($24, 0) |
|||
#define write_c0_depc(val) __write_ulong_c0_register($24, 0, val) |
|||
|
|||
#define read_c0_ecc() __read_32bit_c0_register($26, 0) |
|||
#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) |
|||
|
|||
#define read_c0_derraddr0() __read_ulong_c0_register($26, 1) |
|||
#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val) |
|||
|
|||
#define read_c0_cacheerr() __read_32bit_c0_register($27, 0) |
|||
|
|||
#define read_c0_derraddr1() __read_ulong_c0_register($27, 1) |
|||
#define write_c0_derraddr1(val) __write_ulong_c0_register($27, 1, val) |
|||
|
|||
#define read_c0_taglo() __read_32bit_c0_register($28, 0) |
|||
#define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val) |
|||
|
|||
#define read_c0_taghi() __read_32bit_c0_register($29, 0) |
|||
#define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val) |
|||
|
|||
#define read_c0_errorepc() __read_ulong_c0_register($30, 0) |
|||
#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) |
|||
|
|||
/*
|
|||
* TLB operations. |
|||
*/ |
|||
static inline void tlb_probe(void) |
|||
{ |
|||
__asm__ __volatile__( |
|||
".set noreorder\n\t" |
|||
"tlbp\n\t" |
|||
".set reorder"); |
|||
} |
|||
|
|||
static inline void tlb_read(void) |
|||
{ |
|||
__asm__ __volatile__( |
|||
".set noreorder\n\t" |
|||
"tlbr\n\t" |
|||
".set reorder"); |
|||
} |
|||
|
|||
static inline void tlb_write_indexed(void) |
|||
{ |
|||
__asm__ __volatile__( |
|||
".set noreorder\n\t" |
|||
"tlbwi\n\t" |
|||
".set reorder"); |
|||
} |
|||
|
|||
static inline void tlb_write_random(void) |
|||
{ |
|||
__asm__ __volatile__( |
|||
".set noreorder\n\t" |
|||
"tlbwr\n\t" |
|||
".set reorder"); |
|||
} |
|||
|
|||
#define ASID_INC 0x1 |
|||
#define ASID_MASK 0xff |
|||
|
|||
|
|||
/*
|
|||
* PAGE_SHIFT determines the page size |
|||
*/ |
|||
#ifdef CONFIG_PAGE_SIZE_4KB |
|||
#define PAGE_SHIFT 12 |
|||
#endif |
|||
#ifdef CONFIG_PAGE_SIZE_16KB |
|||
#define PAGE_SHIFT 14 |
|||
#endif |
|||
#ifdef CONFIG_PAGE_SIZE_64KB |
|||
#define PAGE_SHIFT 16 |
|||
#endif |
|||
#ifdef CONFIG_PAGE_SIZE_256KB |
|||
#define PAGE_SHIFT 18 |
|||
#endif |
|||
#ifdef CONFIG_PAGE_SIZE_1M |
|||
#define PAGE_SHIFT 20 |
|||
#endif |
|||
#define PAGE_SIZE (1UL << PAGE_SHIFT) |
|||
#define PAGE_MASK (~(PAGE_SIZE-1)) |
|||
|
|||
|
|||
/* For vesa mode control */ |
|||
#define GRAPHIC_MODE_100 0x100 /* 640x400 256*/ |
|||
#define GRAPHIC_MODE_101 0x101 /* 640x480 256*/ |
|||
#define GRAPHIC_MODE_102 0x102 /* 800x600 16 */ |
|||
#define GRAPHIC_MODE_103 0x103 /* 800x600 256*/ |
|||
#define GRAPHIC_MODE_104 0x104 /* 1024x768 16*/ |
|||
#define GRAPHIC_MODE_105 0x105 /* 1024x768 256*/ |
|||
#define GRAPHIC_MODE_106 0x106 /* 1280x1024 16*/ |
|||
#define GRAPHIC_MODE_107 0x107 /* 1280x1024 256*/ |
|||
#define GRAPHIC_MODE_10d 0x10d /* 320x200 32K(1:5:5:5)*/ |
|||
#define GRAPHIC_MODE_10e 0x10e /* 320x200 64K(5:6:5)*/ |
|||
#define GRAPHIC_MODE_10f 0x10f /* 320x200 16.8M(8:8:8)*/ |
|||
#define GRAPHIC_MODE_110 0x110 /* 640x480 32K*/ |
|||
#define GRAPHIC_MODE_111 0x111 /* 640x480 64K*/ |
|||
#define GRAPHIC_MODE_112 0x112 /* 640x480 16.8M*/ |
|||
#define GRAPHIC_MODE_113 0x113 /* 800x600 32K*/ |
|||
#define GRAPHIC_MODE_114 0x114 /* 800x600 64K*/ |
|||
#define GRAPHIC_MODE_115 0x115 /* 800x600 16.8M*/ |
|||
#define GRAPHIC_MODE_116 0x116 /* 1024x768 32K*/ |
|||
#define GRAPHIC_MODE_117 0x117 /* 1024x768 64K*/ |
|||
#define GRAPHIC_MODE_118 0x118 /* 1024x768 16.8M*/ |
|||
#define GRAPHIC_MODE_119 0x119 /* 1280x1024 32K*/ |
|||
#define GRAPHIC_MODE_11a 0x11a /* 1280x1024 64K*/ |
|||
#define GRAPHIC_MODE_11b 0x11b /* 1280x1024 16.8M*/ |
|||
#define USE_LINEAR_FRAMEBUFFER 0x4000 |
|||
struct vesamode vesamode[] = { |
|||
{GRAPHIC_MODE_114,800,600,16}, /* default 800x600x16 */ |
|||
{GRAPHIC_MODE_100,640,400,8}, |
|||
{GRAPHIC_MODE_101,640,480,8}, |
|||
{GRAPHIC_MODE_102,800,600,4}, |
|||
{GRAPHIC_MODE_103,800,600,8}, |
|||
{GRAPHIC_MODE_104,1024,768,16}, |
|||
{GRAPHIC_MODE_105,1024,768,8}, |
|||
{GRAPHIC_MODE_106,1280,1024,16}, |
|||
{GRAPHIC_MODE_107,1280,1024,8}, |
|||
{GRAPHIC_MODE_10d,320,200,15}, |
|||
{GRAPHIC_MODE_10e,320,200,16}, |
|||
{GRAPHIC_MODE_10f,320,200,24}, |
|||
{GRAPHIC_MODE_110,640,480,15}, |
|||
{GRAPHIC_MODE_111,640,480,16}, |
|||
{GRAPHIC_MODE_112,640,480,24}, |
|||
{GRAPHIC_MODE_113,800,600,15}, |
|||
{GRAPHIC_MODE_114,800,600,16}, |
|||
{GRAPHIC_MODE_115,800,600,24}, |
|||
{GRAPHIC_MODE_116,1024,768,15}, |
|||
{GRAPHIC_MODE_117,1024,768,16}, |
|||
{GRAPHIC_MODE_118,1024,768,24}, |
|||
{GRAPHIC_MODE_119,1280,1024,15}, |
|||
{GRAPHIC_MODE_11a,1280,1024,16}, |
|||
{GRAPHIC_MODE_11b,1280,1024,24}, |
|||
}; |
|||
|
|||
struct vesamode *vesa_mode_head = vesamode; |
|||
|
|||
|
|||
static u32 io_vaddr; |
|||
|
|||
|
|||
void tlbmap(u32 viraddr, u32 phyaddr, u32 size) |
|||
{ |
|||
u32 tmp_size; |
|||
u32 pid, idx; |
|||
write_c0_pagemask(PM_DEFAULT_MASK); |
|||
|
|||
pid = read_c0_entryhi() & ASID_MASK; |
|||
|
|||
printf("tlbmap vaddr %x paddr %x size %x\n", viraddr, phyaddr, size); |
|||
for (tmp_size = 0 ;tmp_size < size; tmp_size += (2*PAGE_SIZE)) { |
|||
viraddr &= (PAGE_MASK << 1); |
|||
write_c0_entryhi(viraddr | (pid)); |
|||
tlb_probe(); |
|||
idx = read_c0_index(); |
|||
printf("viraddr=%08x,phyaddr=%08x,pid=%x,idx=%x\n",viraddr,phyaddr,pid,idx); |
|||
/* Uncached accelerate */ |
|||
write_c0_entrylo0((phyaddr >> 6)|0x3f); |
|||
write_c0_entrylo1(((phyaddr+PAGE_SIZE) >> 6)|0x3f); |
|||
write_c0_entryhi(viraddr | (pid)); |
|||
|
|||
if(idx < 0) { |
|||
tlb_write_random(); |
|||
} else { |
|||
tlb_write_indexed(); |
|||
} |
|||
viraddr += (PAGE_SIZE*2); |
|||
phyaddr += (PAGE_SIZE*2); |
|||
} |
|||
write_c0_entryhi(pid); |
|||
} |
|||
|
|||
#define BONITO_REGBASE 0x100 |
|||
#define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) |
|||
#define BONITO(x) *(volatile unsigned long *)(0xbfe00000+(x)) |
|||
#define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) |
|||
#define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f |
|||
#define BONITO_PCIMAP_WIN(WIN,ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) |
|||
|
|||
int vesafb_init(void) |
|||
{ |
|||
u32 video_mem_size; |
|||
u32 fb_address, io_address; |
|||
u32 tmp; |
|||
|
|||
fb_address =_pci_conf_read(vga_dev->pa.pa_tag,0x10); |
|||
io_address =_pci_conf_read(vga_dev->pa.pa_tag,0x18); |
|||
//io_vaddr = io_address | 0xbfd00000;
|
|||
//io_vaddr = io_address | BONITO_PCIIO_BASE_VA;
|
|||
io_vaddr = io_address | 0xb8000000; |
|||
|
|||
/* We assume all the framebuffer is required remmapping */ |
|||
#ifdef USETLB |
|||
/* Remap framebuffer address to 0x40000000, which can be accessed by same physical address from cpu */ |
|||
_pci_conf_write(vga_dev->pa.pa_tag, 0x10, 0x40000000); |
|||
/* FIXME: video memory size should be detected by software, but now fixed in 2MB that's enough in PMON */ |
|||
video_mem_size = 0x200000; |
|||
|
|||
#if 1 |
|||
/* Map cpu physical address 0x40000000 to BONITO address 0x40000000 -> PCI address 0x40000000.
|
|||
* Master0 window 3 */ |
|||
asm ( |
|||
".set mips3\n" |
|||
".set noreorder\n" |
|||
"dli $2, 0x900000003ff00000\n" |
|||
"dli $3, 0x0000000040000000\n" |
|||
"sd $3, 0x18($2)\n" |
|||
"dli $3, 0x0000000040000001\n" |
|||
"sd $3, 0x58($2)\n" |
|||
"dli $3, 0xffffffffc0000000\n" |
|||
"sd $3, 0x38($2)\n" |
|||
".set reorder\n" |
|||
".set mips0\n" |
|||
:::"$2","$3","memory" |
|||
); |
|||
#endif |
|||
|
|||
/* If framebuffer bar is NULL, then it has too large memory to be alloced in kernel mode */ |
|||
/* TLB map physical address to virtual address in kseg3. Start address is 0xe0000000 */ |
|||
tlbmap(0xe0000000, 0x40000000, video_mem_size); |
|||
#else |
|||
|
|||
#if 0 |
|||
/* 0x10000000 -> 0x40000000 PCI mapping */ |
|||
_pci_conf_write(vga_dev->pa.pa_tag, 0x10, 0x40000000); |
|||
tmp = BONITO_PCIMAP; |
|||
BONITO_PCIMAP = |
|||
BONITO_PCIMAP_WIN(0, 0x40000000) | |
|||
(tmp & ~BONITO_PCIMAP_PCIMAP_LO0); |
|||
#endif |
|||
#endif |
|||
|
|||
printf("VESA FB init complete.\n"); |
|||
|
|||
return 0; |
|||
} |
|||
|
|||
/* dummy implementation */ |
|||
void video_set_lut2(int index, int rgb) |
|||
{ |
|||
return; |
|||
} |
|||
|
|||
int GetXRes(void) |
|||
{ |
|||
return vesamode[vesa_mode].width; |
|||
} |
|||
|
|||
int GetYRes(void) |
|||
{ |
|||
return vesamode[vesa_mode].height; |
|||
} |
|||
|
|||
int GetBytesPP(void) |
|||
{ |
|||
return (vesamode[vesa_mode].bpp+1)/8; |
|||
} |
|||
|
|||
void video_set_lut(int index, int r, int g, int b) |
|||
{ |
|||
linux_outb(index, 0x03C8); |
|||
linux_outb(r >> 2, 0x03C9); |
|||
linux_outb(g >> 2, 0x03C9); |
|||
linux_outb(b >> 2, 0x03C9); |
|||
} |
|||
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