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Fix interrupt missing bug of PCIE Card with PCI bridge 

Target: Bonito3a780e
master
wanghongmei 14 years ago
parent
98da421ac5
commit
15d9d27786
1 changed files with 41 additions and 17 deletions
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  1. 58
      Targets/Bonito3a780e/Bonito/tgt_machdep.c

58
Targets/Bonito3a780e/Bonito/tgt_machdep.c
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@ -2545,13 +2545,17 @@ PCI PIC [ 0 <--------> 3 ] INTA#
#define SMBUS_IO_BASE 0x0000 //ynn
#define SMBUS_IO_BASE 0x0000 //ynn
#define PCI_BRADGE_TOTAL 0x0001 //ynn
void sb700_interrupt_fixup(void)
{
unsigned char * pic_index = 0xb8000c00 + SMBUS_IO_BASE;
unsigned char * pic_data = 0xb8000c01 + SMBUS_IO_BASE;
unsigned short * intr_contrl = 0xb80004d0 + SMBUS_IO_BASE;
unsigned short busnum;
unsigned short origin_busnum;
device_t dev,dev1;
u32 val;
u8 byte;
@ -2682,11 +2686,19 @@ void sb700_interrupt_fixup(void)
// 1.fix up rte0: rourte 00:07:00 rte0: INTD-->IRQ5
printf("\nrte0 fixup: rte ---------------> int5\n");
printf("xqch: SB700 device route rte0: int5 \n");
printf("SB700 device route rte0: int5 \n");
dev = _pci_make_tag(7, 0x0, 0x0);
pci_write_config8(dev, 0x3c, 0x05);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x05);
printf("SB700 device route rte0: int5 \n");
dev = _pci_make_tag(8, 0x0, 0x0);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x05);
//2.fixup sata int line
//2.fixup sata int line
printf("\n godson3a_sata_fixup: sata ---------------> int4 \n");
/*2.1. enable the subcalss code register for setting sata controller mode*/
@ -2779,10 +2791,10 @@ void sb700_interrupt_fixup(void)
/*8. pci/pcie slot fixup */
//8.1. route 00:06:00 (pcie slot) INTA->INTC# -----------------> int6
// First check if any device in the slot ( return -1 means no device, else there is device )
//dev = _pci_make_tag(6, 0x0, 0x0);
//val = pci_read_config32(dev, 0x00);
//if ( val != 0xffffffff) // device on the slot
//pci_write_config8(dev, 0x3c, 0x06);
dev = _pci_make_tag(6, 0x0, 0x0); //added to fixup pci bridge card
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x03);
// 8.2 route 00:05:00 (pcie slot) INTA->INTB# -----------------> int3
// First check if any device in the slot ( return -1 means no device, else there is device )
@ -2800,16 +2812,28 @@ void sb700_interrupt_fixup(void)
// 9. route 00:0a:00 (pci slot: con20 and con19)
// 9.1 route 0a:05:00 (con19 with add_19) INTA->INTC --> INTG# ---------------------> int5
dev = _pci_make_tag(0xa, 0x5, 0x0);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x5);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
// NOTICE here: now assume dev 2, dev3 and dev 4 are all enable on x16 pcie slot, but
// in fact only one dev need to be enable. If only one device is enable, all code in this function
// need to be update (that means bus number should minus 2, and interrupt need to be routed again),
// But at this moment, don't care this "bug".
// 9.2 route 0a:04:00 (con20 with add_20) INTA->INTB --> INTF## ---------------------> int5
dev = _pci_make_tag(0xa, 0x4, 0x0);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x05);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
// At most "PCI_BRADGE_TOTAL" pci bridge is support before bus "origin_busnum" is scaned,
// now begin probing pci slot...
origin_busnum = 0xa;
for ( busnum = origin_busnum; busnum <= PCI_BRADGE_TOTAL + origin_busnum ; busnum++)
{
dev = _pci_make_tag(busnum, 0x5, 0x0);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x5);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
// 9.2 route 0a:04:00 (con20 with add_20) INTA->INTB --> INTF## ---------------------> int5
dev = _pci_make_tag(busnum, 0x4, 0x0);
val = pci_read_config32(dev, 0x00);
if ( val != 0xffffffff) // device on the slot
pci_write_config8(dev, 0x3c, 0x05);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
}

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