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@ -2546,12 +2546,16 @@ PCI PIC [ 0 <--------> 3 ] INTA# |
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#define SMBUS_IO_BASE 0x0000 //ynn
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#define PCI_BRADGE_TOTAL 0x0001 //ynn
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void sb700_interrupt_fixup(void) |
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{ |
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unsigned char * pic_index = 0xb8000c00 + SMBUS_IO_BASE; |
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unsigned char * pic_data = 0xb8000c01 + SMBUS_IO_BASE; |
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unsigned short * intr_contrl = 0xb80004d0 + SMBUS_IO_BASE; |
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unsigned short busnum; |
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unsigned short origin_busnum; |
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device_t dev,dev1; |
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u32 val; |
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u8 byte; |
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@ -2682,8 +2686,16 @@ void sb700_interrupt_fixup(void) |
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// 1.fix up rte0: rourte 00:07:00 rte0: INTD-->IRQ5
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printf("\nrte0 fixup: rte ---------------> int5\n"); |
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printf("xqch: SB700 device route rte0: int5 \n"); |
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printf("SB700 device route rte0: int5 \n"); |
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dev = _pci_make_tag(7, 0x0, 0x0); |
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val = pci_read_config32(dev, 0x00); |
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if ( val != 0xffffffff) // device on the slot
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pci_write_config8(dev, 0x3c, 0x05); |
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printf("SB700 device route rte0: int5 \n"); |
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dev = _pci_make_tag(8, 0x0, 0x0); |
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val = pci_read_config32(dev, 0x00); |
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if ( val != 0xffffffff) // device on the slot
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pci_write_config8(dev, 0x3c, 0x05); |
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//2.fixup sata int line
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@ -2779,10 +2791,10 @@ void sb700_interrupt_fixup(void) |
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/*8. pci/pcie slot fixup */ |
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//8.1. route 00:06:00 (pcie slot) INTA->INTC# -----------------> int6
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// First check if any device in the slot ( return -1 means no device, else there is device )
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//dev = _pci_make_tag(6, 0x0, 0x0);
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//val = pci_read_config32(dev, 0x00);
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//if ( val != 0xffffffff) // device on the slot
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//pci_write_config8(dev, 0x3c, 0x06);
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dev = _pci_make_tag(6, 0x0, 0x0); //added to fixup pci bridge card
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val = pci_read_config32(dev, 0x00); |
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if ( val != 0xffffffff) // device on the slot
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pci_write_config8(dev, 0x3c, 0x03); |
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// 8.2 route 00:05:00 (pcie slot) INTA->INTB# -----------------> int3
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// First check if any device in the slot ( return -1 means no device, else there is device )
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@ -2800,16 +2812,28 @@ void sb700_interrupt_fixup(void) |
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// 9. route 00:0a:00 (pci slot: con20 and con19)
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// 9.1 route 0a:05:00 (con19 with add_19) INTA->INTC --> INTG# ---------------------> int5
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dev = _pci_make_tag(0xa, 0x5, 0x0); |
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// NOTICE here: now assume dev 2, dev3 and dev 4 are all enable on x16 pcie slot, but
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// in fact only one dev need to be enable. If only one device is enable, all code in this function
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// need to be update (that means bus number should minus 2, and interrupt need to be routed again),
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// But at this moment, don't care this "bug".
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// At most "PCI_BRADGE_TOTAL" pci bridge is support before bus "origin_busnum" is scaned,
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// now begin probing pci slot...
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origin_busnum = 0xa; |
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for ( busnum = origin_busnum; busnum <= PCI_BRADGE_TOTAL + origin_busnum ; busnum++) |
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{ |
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dev = _pci_make_tag(busnum, 0x5, 0x0); |
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val = pci_read_config32(dev, 0x00); |
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if ( val != 0xffffffff) // device on the slot
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pci_write_config8(dev, 0x3c, 0x5);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
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// 9.2 route 0a:04:00 (con20 with add_20) INTA->INTB --> INTF## ---------------------> int5
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dev = _pci_make_tag(0xa, 0x4, 0x0); |
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dev = _pci_make_tag(busnum, 0x4, 0x0); |
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val = pci_read_config32(dev, 0x00); |
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if ( val != 0xffffffff) // device on the slot
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pci_write_config8(dev, 0x3c, 0x05);// 0x14 means set interrupt pin to be 1, use interrupt line 0x4
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} |
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