change uncorrect ddrconfig.

Targets/Bonito2fdev/Bonito/i2ccfgddr.S

@@ -182,104 +182,7 @@ LEAF(ii2c_cfg)
 	nop
 
 .ddrtype1:
-	#bit 25:22 is DDR type field
-	sll	v0, 22 
-	and	v0,0x03c00000
-	
-	/* read DDR RATE*/
-	move	a0,t5
-	li	a1,23
-	bal 	i2cread 
-	nop
-	beq	v0,0xa0,40f
-	nop
-	beq	v0,0x75,41f
-	nop
-	beq	v0,0x60,42f
-	nop
-	b	42f
-	nop
-	
-	/* config sdCfg bits [ 9:0 ] */
-40:	/* ddr200 */
-	b	47f
-	nop
-
-41:     /* ddr266 */
-	b     47f
-    nop
-
-42:     /* ddr333 */
-	b     47f
-    nop
-
-#####################################################
-
- /* read DDR SDRAM Minimum Clock Cycle when CL is Derated by One Clock,config sdCfg [ 21:10 ]*/
-47:
-    move    a0,t5
-    li      a1,25
-    bal     i2cread
-	nop
-    beq     v0,0xa0,40f
-    nop
-    beq     v0,0x75,41f
-    nop
-    beq     v0,0x60,42f
-    nop
-    b     41f
-	nop
-	
-40:     /* ddr200 */
- 	move    a0,t5
-    li      a1,12
-    bal     i2cread
-    nop
-    bne     v0,0x82,10f
-    nop
-	b	45f
-	nop
-10:
-    bne     v0,0x80,.nodimm1
-    nop
-    b     45f
-    nop
-
-41:     /* ddr266 */
-    move    a0,t5
-    li      a1,12
-    bal     i2cread
-    nop
-    bne     v0,0x82,11f
-    nop
-	b	45f
-	nop
-11:
-     bne     v0,0x80,.nodimm1
-     nop
-     b     45f
-     nop
-
-42:     /* ddr333 */
-    move    a0,t5
-    li      a1,12
-    bal     i2cread
-    nop
-    bne     v0,0x82,12f
-    nop
-	b	45f
-	nop
-12:
-     bne     v0,0x80,.nodimm1
-     nop
-     b     45f
-     nop
 
-
-#####################################################
-
-45:
-2:
     move      a0,t5 
 	li	a1,17
 	bal	i2cread