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change MC1 resync related parameters to be same with MC0 

Change-Id: Iadc46410b95f54c07e49cb9f4b4407f1bb304288
master
Huang Shuai 7 years ago
committed by zhangbaoqi
parent
bdc128f522
commit
1eef06808a
1 changed files with 1 additions and 1 deletions
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  1. 2
      Targets/Bonito3a3000_7a/Bonito/loongson_mc2_param.S

2
Targets/Bonito3a3000_7a/Bonito/loongson_mc2_param.S
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@ -702,7 +702,7 @@ MC1_DDR3_RDIMM_CTRL_0x310: .dword 0x0000000000000000
//_XXXXXXXXXXXXXXXX pm_cmd_fbck3[ 63: 0](RD)
MC1_DDR3_RDIMM_CTRL_0x318: .dword 0x0000000000000000
//_XXXXXXXXXXXXXXXX pm_cmd_fbck3[127:64](RD)
MC1_DDR3_RDIMM_CTRL_0x320: .dword 0x010001010000600a
MC1_DDR3_RDIMM_CTRL_0x320: .dword 0x080830100000600a
//_XXXXXXXXXXXXXXXX 0000_0000 pm_REF_low
MC1_DDR3_RDIMM_CTRL_0x328: .dword 0x0000000000000000
//_XXXXXXXXXXXXXXXX (RD)

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