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@ -166,6 +166,19 @@ static int mysleep(int ms) |
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return 0; |
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} |
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#define RTL_W8(tp, reg, val8) iowrite8 ((val8), tp->base_addr + (reg)) |
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#define RTL_W16(tp, reg, val16) iowrite16 ((val16), tp->base_addr + (reg)) |
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#define RTL_W32(tp, reg, val32) iowrite32 ((val32), tp->base_addr + (reg)) |
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#define RTL_R8(tp, reg) ioread8 (tp->base_addr + (reg)) |
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#define RTL_R16(tp, reg) ioread16 (tp->base_addr + (reg)) |
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#define RTL_R32(tp, reg) ((unsigned long) ioread32 (tp->base_addr + (reg))) |
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#define EEPROMDATA 0x34 |
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#define EEPROMCTRL 0x36 |
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#define EEP_BUSY 0x8000 |
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#define EEP_WRITE 0x0100 |
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#define EEP_READ 0x0200 |
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#define MII_BMCR 0x00 /* Basic mode control register */ |
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#define MII_BMSR 0x01 /* Basic mode status register */ |
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@ -342,7 +355,7 @@ char name[IFNAMSIZ]; |
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unsigned char perm_addr[6]; /* permanent hw address */ |
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}; |
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const static struct pci_device_id * |
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pci_match_device(const struct pci_device_id *ids, struct pci_attach_args *pa ) |
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pci_match_device(const struct pci_device_id *ids, struct pci_attach_args *pa ) |
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{ |
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unsigned short vendor; |
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unsigned short device,class; |
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@ -370,8 +383,7 @@ pci_match_device(const struct pci_device_id *ids, struct pci_attach_args *pa ) |
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} |
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void |
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pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr, |
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static void pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu_addr, |
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dma_addr_t dma_addr) |
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{ |
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kfree(cpu_addr); |
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@ -391,6 +403,8 @@ void *buf; |
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return (void *)buf; |
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} |
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static unsigned short read_eeprom(unsigned long ioaddr,unsigned int eep_addr); |
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static void write_eeprom(unsigned long ioaddr, unsigned int eep_addr, unsigned short writedata); |
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struct sk_buff { |
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unsigned int len; /* Length of actual data */ |
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@ -489,7 +503,7 @@ static struct mbuf * getmbuf() |
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return m; |
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} |
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inline int netif_rx(struct sk_buff *skb) |
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static inline int netif_rx(struct sk_buff *skb) |
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{ |
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struct mbuf *m; |
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struct ether_header *eh; |
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@ -734,6 +748,10 @@ enum mac_ctrl0_bits { |
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EnbFullDuplex=0x20, EnbRcvLargeFrame=0x40, |
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EnbFlowCtrl=0x100, EnbPassRxCRC=0x200, |
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}; |
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/*Bits in the PHY-CTRL registers*/ |
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enum phy_ctrl_bits{ |
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PhyDuplexStatus=0x20,PhySpeedStatus=0x40,PhyLinkStatus=0x80, |
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}; |
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enum mac_ctrl1_bits { |
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StatsEnable=0x0020, StatsDisable=0x0040, StatsEnabled=0x0080, |
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TxEnable=0x0100, TxDisable=0x0200, TxEnabled=0x0400, |
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@ -844,6 +862,86 @@ static struct net_device_stats *get_stats(struct net_device *dev); |
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static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
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static int netdev_close(struct net_device *dev); |
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void delay10us(void) |
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{ |
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volatile int i = 0; |
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for(i = 0; i<1000 ;) |
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i++; |
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// usleep(10);
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} |
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#if 0 |
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void mdelay(int ii) |
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{ |
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volatile int j; |
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for(;ii>0;ii--) |
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for(j=0;j<100000;) |
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j++; |
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} |
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#endif |
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unsigned short outpw(unsigned long WR_ADDR,unsigned short WR_VAL) |
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{ |
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*( (volatile unsigned short *) WR_ADDR ) = WR_VAL ; |
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return WR_VAL; |
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} |
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unsigned short inpw(unsigned long RD_ADDR) |
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{ |
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unsigned short RD_VAL; |
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RD_VAL = *( (volatile unsigned short *) RD_ADDR ) ; |
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return RD_VAL; |
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} |
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static void write_eeprom(unsigned long ioaddr_1, unsigned int eep_addr, unsigned short writedata) |
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{ |
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unsigned short v = 0; |
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unsigned long uIOBase=ioaddr_1; |
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int i = 0; |
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v=outpw (uIOBase + EEPROMDATA, writedata ); |
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while ( (inpw(uIOBase + EEPROMCTRL) & EEP_BUSY ) &&(i<20000) ) |
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{ |
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i++; |
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} |
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v=outpw (uIOBase + EEPROMCTRL, 0xC0 ); |
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while ( (inpw(uIOBase + EEPROMCTRL) & EEP_BUSY ) &&(i<20000) ) |
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{ |
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i++; |
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} |
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v=outpw (uIOBase + EEPROMCTRL, EEP_WRITE | (eep_addr & 0xff) ); |
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while ( (inpw(uIOBase + EEPROMCTRL) & EEP_BUSY ) &&(i<20000) ) |
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{ |
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i++; |
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} |
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for( i = 0; i < 400; i++ ) |
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{ |
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delay10us(); |
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} |
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} |
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static unsigned short read_eeprom(unsigned long ioaddr_1, unsigned int eep_addr) |
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{ |
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unsigned int v = 0; |
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int i = 10000; |
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unsigned long uIOBase=ioaddr_1; |
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v=outpw (uIOBase + EEPROMCTRL, EEP_READ | (eep_addr & 0xff)); |
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while (i-- > 0) { |
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delay10us(); |
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if (!(inpw(uIOBase + EEPROMCTRL) & EEP_BUSY)) { |
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return inpw(uIOBase + EEPROMDATA); |
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} |
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} |
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return 0; |
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} |
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static void sundance_reset(struct net_device *dev, unsigned long reset_cmd) |
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{ |
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struct netdev_private *np = netdev_priv(dev); |
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@ -862,6 +960,7 @@ static void sundance_reset(struct net_device *dev, unsigned long reset_cmd) |
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udelay(100); |
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} |
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} |
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int phys[4]; |
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static int sundance_probe1 (struct net_device *dev,struct pci_dev *pdev, |
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const struct pci_device_id *ent) |
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{ |
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@ -961,6 +1060,7 @@ static int sundance_probe1 (struct net_device *dev,struct pci_dev *pdev, |
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} |
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np->mii_if.phy_id = np->phys[0]; |
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phys[0] = ( np->phys[0]& 0x1f ); //zgj
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/* Parse override configuration */ |
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np->an_enable = 1; |
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@ -1852,7 +1952,7 @@ static int netdev_close(struct net_device *dev) |
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//----------------------------------------------------------
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void netdev_init(struct net_device *netdev,struct pci_attach_args *pa) |
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static void netdev_init(struct net_device *netdev,struct pci_attach_args *pa) |
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{ |
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unsigned short vendor; |
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unsigned short device,class; |
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@ -1923,7 +2023,7 @@ struct ifnet *ifp = &netdev->arpcom.ac_if; |
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return 0; |
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} |
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struct net_device *mynic_ste; |
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static void |
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ste_attach(parent, self, aux) |
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struct device *parent, *self; |
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@ -1941,6 +2041,8 @@ ste_attach(parent, self, aux) |
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//bus_size_t iosize;
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#endif |
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mynic_ste = sc; |
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/*
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* Allocate our interrupt. |
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*/ |
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@ -2138,6 +2240,27 @@ ste_ether_ioctl(ifp, cmd, data) |
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} |
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break; |
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case SIOCETHTOOL: |
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{ |
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long *p=data; |
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mynic_ste = sc; |
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cmd_setmac_ste(p[0],p[1]); |
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} |
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break; |
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case SIOCRDEEPROM: |
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{ |
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long *p=data; |
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mynic_ste = sc; |
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cmd_reprom_ste(p[0],p[1]); |
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} |
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break; |
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case SIOCWREEPROM: |
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{ |
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long *p=data; |
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mynic_ste = sc; |
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cmd_wrprom_ste(p[0],p[1]); |
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} |
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break; |
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default: |
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error = EINVAL; |
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} |
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@ -2153,3 +2276,297 @@ struct cfattach ste_ca = { |
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struct cfdriver ste_cd = { |
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NULL, "ste", DV_IFNET |
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}; |
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#if 1 |
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#include <pmon.h> |
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int cmd_ifm_ste(int ac, char *av[]) |
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{ |
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int speed100=0, fullduplex=0, mii_ctrl = 0x0; |
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struct netdev_private *np = netdev_priv(mynic_ste); |
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struct net_device *nic_ifm = mynic_ste; |
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printf("np->phys[0] : %d \n",phys[0]); |
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if(nic_ifm == NULL){ |
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printf("IP100A interface not initialized\n"); |
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return 0; |
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} |
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if(ac !=1 && ac!=2 && ac!=3){ |
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printf("usage: ifm_ip100a [100|10|auto] [full|half]\n"); |
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return 0; |
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} |
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if(ac == 1){ |
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speed100 = RTL_R8(nic_ifm , MIICtrl) & PhySpeedStatus ; |
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fullduplex = RTL_R8(nic_ifm , MIICtrl) & PhyDuplexStatus ; |
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printf(" %sMbps %s-DUPLEX.\n", speed100 ? "100" : "10", |
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fullduplex ? "FULL" : "HALF"); |
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return 0; |
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} |
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if(strcmp("100", av[1]) == 0){ |
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mii_ctrl = 0; |
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mii_ctrl |= BMCR_SPEED100; |
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if(strcmp("full", av[2]) == 0) |
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mii_ctrl |= BMCR_FULLDPLX ; |
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else |
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mii_ctrl &= ~BMCR_FULLDPLX; |
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printf("mii_ctrl_100 or : 0x%x\n",mii_ctrl); |
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mdio_write (nic_ifm , phys[0] , MII_BMCR, mii_ctrl); |
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printf("mii_ctrl_100 write : 0x%x\n",mii_ctrl); |
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mdelay(10); |
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mii_ctrl= mdio_read(nic_ifm, phys[0], MII_BMCR); |
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printf("mii_ctrl_100 read status : 0x%x\n",mii_ctrl); |
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} else if(strcmp("10", av[1]) ==0){ |
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mii_ctrl = 0x0; |
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mii_ctrl &= ~BMCR_SPEED100 ; |
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if(strcmp("full", av[2]) == 0) |
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mii_ctrl |= BMCR_FULLDPLX ; |
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else |
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mii_ctrl &= ~BMCR_FULLDPLX; |
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printf("mii_ctrl_10 and : 0x%x\n",mii_ctrl); |
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mdio_write (nic_ifm , phys[0] , MII_BMCR, mii_ctrl); |
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printf("mii_ctrl_10 write : 0x%x\n",mii_ctrl); |
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mdelay(10); |
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mii_ctrl= mdio_read(nic_ifm, phys[0], MII_BMCR); |
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printf("mii_ctrl_10 read status : 0x%x\n",mii_ctrl); |
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} else if(strcmp("auto", av[1])==0){ |
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mii_ctrl = 0x0; |
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mii_ctrl |= BMCR_ANENABLE|BMCR_ANRESTART ; |
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mdio_write (nic_ifm, phys[0] , MII_BMCR, mii_ctrl); |
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printf("mii_ctrl_auto write : 0x%x\n",mii_ctrl); |
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mdelay(10); |
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mii_ctrl= mdio_read(nic_ifm, phys[0], MII_BMCR); |
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printf("mii_ctrl_auto read status : 0x%x\n",mii_ctrl); |
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} |
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else{ |
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printf("usage: ifm_ip100a [100|10|auto|full|half]\n"); |
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} |
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return 0; |
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} |
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static long long ste_read_mac(struct net_device *nic) |
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{ |
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int i; |
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long long mac_tmp = 0; |
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unsigned short u16tmp; |
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struct netdev_private *np = netdev_priv(mynic_ste); |
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struct net_device *nic = mynic_ste; |
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void *ioaddr = np->base; |
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for (i = 0; i < 3; i++) { |
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#if 1 |
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//#ifndef EPLC46
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u16tmp = read_eeprom( ioaddr, EEPROM_SA_OFFSET + i); |
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#else |
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u16tmp = read_eeprom(nic, ioaddr, (EEPROM_SA_OFFSET + i*2)); |
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u16tmp = u16tmp | (read_eeprom(nic, ioaddr, (EEPROM_SA_OFFSET + i*2 +1)) << 8); |
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#endif |
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mac_tmp <<= 16; |
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mac_tmp |= ((u16tmp & 0xff) << 8) | ((u16tmp >> 8) & 0xff); |
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printf("ip100a_read_mac 1 : 0x%4x \n",mac_tmp); |
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} |
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printf("ip100a_read_mac all : 0x%12x \n",mac_tmp); |
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return mac_tmp; |
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} |
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|
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int cmd_setmac_ste(int ac, char *av[]) |
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|
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{ |
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|
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int i; |
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unsigned short val = 0, v; |
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struct netdev_private *np = netdev_priv(mynic_ste); |
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struct net_device *nic = mynic_ste; |
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void *ioaddr = np->base; |
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if(nic == NULL){ |
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|
printf("IP100A interface not initialized\n"); |
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return 0; |
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} |
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|
#if 0 |
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|
|
if (ac != 4) { |
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|
|
printf("MAC ADDRESS "); |
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|
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for(i=0; i<6; i++){ |
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printf("%02x",nic->arpcom.ac_enaddr[i]); |
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if(i==5) |
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printf("\n"); |
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else |
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|
printf(":"); |
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} |
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|
|
printf("Use \"setmac word1(16bit) word2 word3\"\n"); |
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|
return 0; |
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|
} |
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|
|
printf("set mac to "); |
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|
|
for (i = 0; i < 3; i++) { |
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|
|
val = strtoul(av[i+1],0,0); |
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|
|
printf("%04x ", val); |
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|
write_eeprom(ioaddr, 0x7 + i, val); |
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} |
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|
|
printf("\n"); |
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|
|
printf("The machine should be restarted to make the mac change to take effect!!\n"); |
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|
|
#else |
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|
|
if(ac != 2){ |
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|
|
long long macaddr; |
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|
|
u_int8_t *paddr; |
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|
|
u_int8_t enaddr[6]; |
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|
|
macaddr=ste_read_mac(nic); |
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|
|
paddr=(uint8_t*)&macaddr; |
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|
|
enaddr[0] = paddr[5- 0]; |
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enaddr[1] = paddr[5- 1]; |
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enaddr[2] = paddr[5- 2]; |
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enaddr[3] = paddr[5- 3]; |
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enaddr[4] = paddr[5- 4]; |
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enaddr[5] = paddr[5- 5]; |
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|
printf("MAC ADDRESS "); |
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|
|
for(i=0; i<6; i++){ |
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|
printf("%02x",enaddr[i]); |
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|
|
if(i==5) |
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|
printf("\n"); |
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|
else |
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|
|
printf(":"); |
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|
|
} |
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|
|
printf("Use \"setmac <mac> \" to set mac address\n"); |
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|
|
return 0; |
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|
|
} |
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|
|
for (i = 0; i < 3; i++) { |
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|
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val = 0; |
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gethex(&v, av[1], 2); |
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val = v ; |
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av[1]+=3; |
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gethex(&v, av[1], 2); |
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val = val | (v << 8); |
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av[1] += 3; |
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#if 1 |
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//#ifndef EPLC46
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iowrite16(val, ioaddr + StationAddr + 2*i); //zgj
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write_eeprom(ioaddr, EEPROM_SA_OFFSET + i, val); |
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#else |
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write_eeprom8(ioaddr, (EEPROM_SA_OFFSET + i*2 ), val & 0xff); |
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write_eeprom8(ioaddr, (EEPROM_SA_OFFSET + i*2 + 1), (val >> 8) & 0xff); |
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#endif |
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} |
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#endif |
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return 0; |
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} |
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int cmd_reprom_ste(int ac, char *av) |
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{ |
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int i; |
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unsigned short data; |
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struct netdev_private *np = netdev_priv(mynic_ste); |
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struct net_device *nic = mynic_ste; |
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void *ioaddr = np->base; |
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printf("dump eprom:\n"); |
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for(i=0; i< 64;){ |
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#if 1 |
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//#ifndef EPLC46
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data = read_eeprom(ioaddr, i); |
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#else |
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data = read_eeprom(mynic_ste, ioaddr, 2*i); |
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data = data | (read_eeprom(mynic_ste, ioaddr, 2*i+1)) << 8; |
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#endif |
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printf("%04x ", data); |
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++i; |
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if( i%8 == 0 ) |
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printf("\n"); |
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} |
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return 0; |
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} |
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#if 1 |
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static unsigned long next = 1; |
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/* RAND_MAX assumed to be 32767 */ |
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static int myrand(void) { |
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next = next * 1103515245 + 12345; |
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return((unsigned)(next/65536) % 32768); |
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} |
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static void mysrand(unsigned int seed) { |
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next = seed; |
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} |
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#endif |
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int cmd_wrprom_ste(int ac, char *av) |
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{ |
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int i=0; |
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|
struct netdev_private *np = netdev_priv(mynic_ste); |
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|
struct net_device *nic = mynic_ste; |
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|
void *ioaddr = np->base; |
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|
unsigned long clocks_num=0; |
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|
|
unsigned char tmp[4]; |
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|
unsigned short eeprom_data; |
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|
unsigned short rom[] = { |
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|
0x2af8 ,0x8061 ,0x13f0 ,0x0201 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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|
0x0000 ,0x0000 ,0x8003 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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0x0500 ,0x0000 ,0x0400 ,0x0064 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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0x3400 ,0x0100 ,0x3702 ,0x0300 ,0x803a ,0x3f04 ,0x0303 ,0x0103, |
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0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000, |
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|
0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000 ,0x0000}; |
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|
printf("Now beginningwrite whole eprom\n"); |
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|
|
#if 1 |
|
|
|
clocks_num =CPU_GetCOUNT(); |
|
|
|
mysrand(clocks_num); |
|
|
|
for( i = 0; i < 4;i++ ) |
|
|
|
{ |
|
|
|
tmp[i]=myrand()%256; |
|
|
|
printf( " tmp[%d]=02x%x\n", i,tmp[i]); |
|
|
|
} |
|
|
|
eeprom_data =tmp[1] |( tmp[0]<<8); |
|
|
|
printf("eeprom_data [17] = 0x%4x\n",eeprom_data); |
|
|
|
rom[17] = eeprom_data; |
|
|
|
eeprom_data =tmp[3] |( tmp[2]<<8); |
|
|
|
printf("eeprom_data [18] = 0x%4x\n",eeprom_data); |
|
|
|
rom[18] = eeprom_data; |
|
|
|
#endif |
|
|
|
|
|
|
|
for (i = 0; i < 64; i++) |
|
|
|
{ |
|
|
|
#ifndef EPLC46 |
|
|
|
write_eeprom(ioaddr, i, rom[i]); |
|
|
|
#else |
|
|
|
write_eeprom8(ioaddr, 2*i, ((unsigned char *)rom)[2*i]); |
|
|
|
write_eeprom8(ioaddr, 2*i+1, ((unsigned char *)rom)[2*i+1]); |
|
|
|
#endif |
|
|
|
} |
|
|
|
|
|
|
|
} |
|
|
|
|
|
|
|
static const Optdesc netdmp_opts[] = |
|
|
|
{ |
|
|
|
{"<interface>", "Interface name"}, |
|
|
|
{"<netdmp>", "IP Address"}, |
|
|
|
{0} |
|
|
|
}; |
|
|
|
|
|
|
|
static const Cmd Cmds[] = |
|
|
|
{ |
|
|
|
{"IP100A"}, |
|
|
|
{"ifm_ste", "", NULL, |
|
|
|
"Set IP100A interface mode: Usage: ifm_ip100a [100|10|auto] [full|half] ", cmd_ifm_ste, 1, 3, 0}, |
|
|
|
{"setmac_ste", "", NULL, |
|
|
|
"Set mac address into IP100A eeprom", cmd_setmac_ste, 1, 5, 0}, |
|
|
|
{"readrom_ste", "", NULL, |
|
|
|
"dump ip100a eprom content", cmd_reprom_ste, 1, 1,0}, |
|
|
|
{"writeprom_ste", "", NULL, |
|
|
|
"write the whole ip100a eprom content", cmd_wrprom_ste, 1, 1,0}, |
|
|
|
{0, 0} |
|
|
|
}; |
|
|
|
|
|
|
|
|
|
|
|
static void init_cmd __P((void)) __attribute__ ((constructor)); |
|
|
|
|
|
|
|
static void |
|
|
|
init_cmd() |
|
|
|
{ |
|
|
|
cmdlist_expand(Cmds, 1); |
|
|
|
} |
|
|
|
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
root
16 years ago