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@ -1,25 +1,27 @@ |
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#define BONITO_HTIO_BASE_VA 0x90000cfdfc000000 |
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LEAF(i2cread) |
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addu a0,a0,1 |
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/* set device address */ |
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//li v0, 0xbfd00000 + SMBUS_HOST_ADDRESS |
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li v0, BONITO_PCIIO_BASE_VA + SMBUS_HOST_ADDRESS |
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dli v0, BONITO_HTIO_BASE_VA + SMBUS_HOST_ADDRESS |
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sb a0, 0(v0); |
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/* store register offset */ |
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//li v0, 0xbfd00000 + SMBUS_HOST_COMMAND |
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li v0, BONITO_PCIIO_BASE_VA + SMBUS_HOST_COMMAND |
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dli v0, BONITO_HTIO_BASE_VA + SMBUS_HOST_COMMAND |
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sb a1, 0(v0); |
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/* read byte data protocol */ |
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li v0, 0x08 |
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//li v1, 0xbfd00000 + SMBUS_HOST_CONTROL |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_CONTROL |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_CONTROL |
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sb v0, 0(v1); |
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/* make sure SMB host ready to start, important!--zfx */ |
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//li v1, 0xbfd00000 + SMBUS_HOST_STATUS |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_STATUS |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_STATUS |
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lbu v0, 0(v1) |
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andi v0,v0, 0x1f |
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beqz v0,1f |
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@ -30,14 +32,14 @@ LEAF(i2cread) |
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/* start */ |
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//li v1, 0xbfd00000 + SMBUS_HOST_CONTROL |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_CONTROL |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_CONTROL |
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lbu v0, 0(v1) |
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ori v0, v0, 0x40 |
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sb v0, 0(v1); |
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/* wait */ |
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//li v1, 0xbfd00000 + SMBUS_HOST_STATUS |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_STATUS |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_STATUS |
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1: |
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#if 0 |
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@ -54,7 +56,7 @@ LEAF(i2cread) |
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nop |
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//li v1, 0xbfd00000 + SMBUS_HOST_STATUS |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_STATUS |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_STATUS |
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lbu v0, 0(v1) |
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andi v0,v0, 0x1f |
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beqz v0,1f |
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@ -64,7 +66,7 @@ LEAF(i2cread) |
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1: |
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//li v1, 0xbfd00000 + SMBUS_HOST_DATA0 |
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li v1, BONITO_PCIIO_BASE_VA + SMBUS_HOST_DATA0 |
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dli v1, BONITO_HTIO_BASE_VA + SMBUS_HOST_DATA0 |
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lbu v0, 0(v1) |
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jr ra |
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