From 3d9c397a3e822f79dec8cc8097285a2341360f12 Mon Sep 17 00:00:00 2001 From: QiaoChong Date: Thu, 29 Dec 2016 09:50:05 +0800 Subject: [PATCH] add 3a8780e ht 1.6G config. Change-Id: Ie66e09188386a8c08fac917f4bdeb3d0ab387c9d Signed-off-by: QiaoChong --- .../Bonito3a8780e/Bonito/loongson3_HT_init.S | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/Targets/Bonito3a8780e/Bonito/loongson3_HT_init.S b/Targets/Bonito3a8780e/Bonito/loongson3_HT_init.S index f2f9d4fd..0121a336 100644 --- a/Targets/Bonito3a8780e/Bonito/loongson3_HT_init.S +++ b/Targets/Bonito3a8780e/Bonito/loongson3_HT_init.S @@ -8,6 +8,7 @@ #define HT_32bit_TRANS #define WITH_HT #define HT_800M +//#define HT_1600M //#define HT_16bit #define HT_RECONNECT //#define HT_REG_TRANS @@ -373,6 +374,57 @@ ht_next_id : TTYDBG("\r\n") #endif +#ifdef HT_1600M//Set HT bridge to be 1600Mhz + TTYDBG("Setting CPU HyperTransport Controller to be soft config 1600\r\n") + dli t2, 0x90000efdfb000000 + li t0, 0x00464083 + dli t2, 0x90000efdfb000000 + sw t0, 0x178(t2) + lw a0, 0x178(t2) + bal hexserial + nop + TTYDBG("\r\n") + + + TTYDBG("Setting HyperTransport Controller to be 1600Mhz\r\n") + dli t2, 0x90000efdfb000000 + #li t0, 0x2 //Frequency: 400 Mhz + li t0, 0x9 //Frequency: 1600 Mhz + sb t0, 0x49(t2) + lw a0, 0x48(t2) + bal hexserial + nop + TTYDBG("\r\n") + + TTYDBG("Setting HyperTransport Controller to be GEN3 mode\r\n") + dli t2, 0x90000efdfb000000 + li t0, 0x88600000 + sw t0, 0x110(t2) + lw a0, 0x110(t2) + bal hexserial + nop + TTYDBG("\r\n") + + TTYDBG("Setting HyperTransport Controller to be retry mode\r\n") + dli t2, 0x90000efdfb000000 + li t0, 0x81 + sb t0, 0x118(t2) + lw a0, 0x118(t2) + bal hexserial + nop + TTYDBG("\r\n") + + TTYDBG("Enable HyperTransport Controller scrambling\r\n") + dli t2, 0x90000efdfb000000 + li t0, 0x78 + sb t0, 0x130(t2) + lw a0, 0x130(t2) + bal hexserial + nop + TTYDBG("\r\n") + +#endif + #endif