Loongson2k ddr: fixup trfc caculate.

trfc should be caculated acording to chip capacity.

Change-Id: If53e4cd3efc3d2fc1f02cce43ea9714e034f1bc3
Signed-off-by: QiaoChong <qiaochong@loongson.cn>

Targets/LS2K/ls2k/ddr_dir/ddr_config_define.h

@@ -294,6 +294,7 @@ temparary used in PROBE_DIMM
 #define MC_CS_MAP_OFFSET    16
 #define MC1_CS_MAP_OFFSET   48
 #define SDRAM_WIDTH_OFFSET  15
+#define MC1_SDRAM_WIDTH_OFFSET 47
 #define MC_CS_MAP_MASK      (0xf)
 #define MC1_MEMSIZE_OFFSET  40
 #define MC0_MEMSIZE_OFFSET  8
@@ -311,6 +312,11 @@ dli     a1, 0x1;\
 dsll    a1, a1, SDRAM_WIDTH_OFFSET;\
 and     a1, s1, a1;\
 dsrl    a1, a1, SDRAM_WIDTH_OFFSET;
+#define GET_MC1_SDRAM_WIDTH      \
+dli     a1, 0x1;\
+dsll    a1, a1, MC1_SDRAM_WIDTH_OFFSET;\
+and     a1, s1, a1;\
+dsrl    a1, a1, MC1_SDRAM_WIDTH_OFFSET;
 #define GET_DIMM_ECC       \
 dli     a1, 0x1;\
 dsll    a1, a1, DIMM_ECC_OFFSET;\

Targets/LS2K/ls2k/ddr_dir/lsmc_config_param.S

@@ -329,10 +329,19 @@ cal_memsize:
 	daddu	a2, a2, 1
 	b		cal_memsize
 	nop
-
 1:
 	divu	a2, t1, a2
+
+    GET_SDRAM_WIDTH
+    beqz    t3, 1f
+    nop
+    GET_MC1_SDRAM_WIDTH
+1:
 	dli     t5, 0x2
+    beqz    a1, x8
+    nop
+	dli     t5, 0x1
+x8:
 	divu	a2, a2, t5
 
 	dli		t1, 0x1

Targets/LS2K/ls2k/loongson3_clksetting.S

@@ -13,7 +13,9 @@ ATTENTION:
 #define SOFT_CLKSEL
 
 
+#ifndef DDR_FREQ
 #define DDR_FREQ   500   //this param must change with DDR freq together,ether soft or hard freq modified!!!
+#endif
 #ifdef SOFT_CLKSEL
 #if 1
 /* MEM @ 500Mhz */