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Revert "Add the gmac on 1A support" 

This reverts commit 5de990c9e2.

Change-Id: I99e644161e5b46edf49939a1f794097678808c0c
master
田延辉 10 years ago
parent
5de990c9e2
commit
46f62fdce9
7 changed files with 190 additions and 349 deletions
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  1. 8
      Targets/Bonito2g1a/conf/Bonito.2g1a
  2. 2
      Targets/Bonito2g1a/include/ls1a.h
  3. 9
      sys/dev/gmac/if_gmac.c
  4. 48
      sys/dev/gmac/synopGMAC_Dev.c
  5. 176
      sys/dev/gmac/synopGMAC_network_interface.c
  6. 35
      sys/dev/gmac/synopGMAC_plat.c
  7. 19
      sys/dev/gmac/synopGMAC_plat.h

8
Targets/Bonito2g1a/conf/Bonito.2g1a
View File

@ -175,6 +175,13 @@ rtl* at pci? dev ? function ?
#usb* at usbbus ?
#ohci1 at pci? dev ? function ?
#select mod_usb
#select mod_usb_storage
#select mod_usb_uhci
#select mod_usb_ohci
#select mod_usb_kbd
#### IDE controllers
pciide* at pci ? dev ? function ? flags 0x0000
#atp* at pci? dev ? function ? #sata atp8620
@ -197,7 +204,6 @@ ide_cd* at pciide? channel ? drive ? flags 0x0001
syn0 at localbus0
syn1 at localbus0
syn2 at localbus0
select gmac
#ide_cd* at pciide? channel ? drive ? flags 0x0001

2
Targets/Bonito2g1a/include/ls1a.h
View File

@ -71,7 +71,7 @@
/* GMAC regs */
#define LS1A_GMAC0_REG_BASE (LS1A_IO_REG_BASE + 0x00e10000)
#define LS1A_GMAC1_REG_BASE (LS1A_IO_REG_BASE + 0x00e20000)
#define LS1A_GMAC1_REG_BASE (LS1A_IO_REG_BASE + 0x00e18000)
/* HDA regs */
#define LS1A_HDA_REG_BASE (LS1A_IO_REG_BASE + 0x00e20000)

9
sys/dev/gmac/if_gmac.c
View File

@ -7,9 +7,7 @@
#include "synopGMAC_plat.h"
#if defined(LOONGSON_2G1A)
#include "target/ls1a.h"
#endif
static int
syn_match(parent, match, aux)
@ -33,10 +31,7 @@ syn_attach(parent, self, aux)
{
struct device *sc = self;
#if defined(LOONGSON_2G5536)||defined(LOONGSON_2G1A)
if (sc->dv_unit != 2)
synopGMAC_init_network_interface(sc->dv_xname,sc->dv_unit?0x90000d0000000000LL:0x90000c0000000000LL);
if (sc->dv_unit == 2)
synopGMAC_init_network_interface(sc->dv_xname, LS1A_GMAC0_REG_BASE);
synopGMAC_init_network_interface(sc->dv_xname,sc->dv_unit?0x90000d0000000000LL:0x90000c0000000000LL);
#else
synopGMAC_init_network_interface(sc->dv_xname, sc);
#endif

48
sys/dev/gmac/synopGMAC_Dev.c
View File

@ -10,9 +10,6 @@
* Synopsys 01/Aug/2007 Created
*/
#include "synopGMAC_Dev.h"
#if defined(LOONGSON_2G1A)
#include "target/ls1a.h"
#endif
/**
* Function to set the MDC clock for mdio transactiona
@ -58,13 +55,12 @@ u32 synopGMAC_get_mdc_clk_div(synopGMACdevice *gmacdev)
*/
s32 synopGMAC_read_phy_reg(u64 RegBase,u32 PhyBase, u32 RegOffset, u16 * data )
{
u32 addr;
u32 loop_variable;
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiCsrClk3;
//sw: add GmiiCsrClk
addr = addr | GmiiBusy ; //Gmii busy bit
u32 addr;
u32 loop_variable;
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiCsrClk3; //sw: add GmiiCsrClk
addr = addr | GmiiBusy ; //Gmii busy bit
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr); //write the address from where the data to be read in GmiiGmiiAddr register of synopGMAC ip
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr); //write the address from where the data to be read in GmiiGmiiAddr register of synopGMAC ip
for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ //Wait till the busy bit gets cleared with in a certain amount of time
if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
@ -83,7 +79,7 @@ s32 synopGMAC_read_phy_reg(u64 RegBase,u32 PhyBase, u32 RegOffset, u16 * data )
printf("read phy reg: addr = 0x%016x\tdata = 0x%x\n",RegOffset + Regbase, data);
#endif
return -ESYNOPGMACNOERR;
return -ESYNOPGMACNOERR;
}
/**
@ -97,16 +93,16 @@ s32 synopGMAC_read_phy_reg(u64 RegBase,u32 PhyBase, u32 RegOffset, u16 * data )
*/
s32 synopGMAC_write_phy_reg(u64 RegBase, u32 PhyBase, u32 RegOffset, u16 data)
{
u32 addr;
u32 loop_variable;
u32 addr;
u32 loop_variable;
synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of synopGMAC ip
synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of synopGMAC ip
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3; //sw: add GmiiCsrclk
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3; //sw: add GmiiCsrclk
addr = addr | GmiiBusy ; //set Gmii clk to 20-35 Mhz and Gmii busy bit
addr = addr | GmiiBusy ; //set Gmii clk to 20-35 Mhz and Gmii busy bit
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr);
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr);
for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
break;
@ -116,7 +112,8 @@ s32 synopGMAC_write_phy_reg(u64 RegBase, u32 PhyBase, u32 RegOffset, u16 data)
if(loop_variable < DEFAULT_LOOP_VARIABLE){
return -ESYNOPGMACNOERR;
} else {
}
else{
TR("Error::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
return -ESYNOPGMACPHYERR;
}
@ -137,16 +134,16 @@ s32 synopGMAC_write_phy_reg(u64 RegBase, u32 PhyBase, u32 RegOffset, u16 data)
#if UNUSED
s32 synopGMAC_phy_loopback(synopGMACdevice *gmacdev, bool loopback)
{
s32 status = -ESYNOPGMACNOERR;
u16 *temp;
s32 status = -ESYNOPGMACNOERR;
u16 *temp;
status = synopGMAC_read_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, PHY_CONTROL_REG,temp);
if(loopback)
if(loopback)
*temp |= 0x4000;
else
else
*temp = *temp;
status = synopGMAC_write_phy_reg(gmacdev->MacBase, gmacdev->PhyBase, PHY_CONTROL_REG, *temp);
return status;
return status;
}
#endif
@ -1402,14 +1399,7 @@ s32 synopGMAC_attach (synopGMACdevice * gmacdev, u64 macBase, u64 dmaBase, u32 p
/*Populate the mac and dma base addresses*/
gmacdev->MacBase = macBase;
gmacdev->DmaBase = dmaBase;
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (macBase == LS1A_GMAC0_REG_BASE + MACBASE)
gmacdev->PhyBase = 1;
else
gmacdev->PhyBase = phyBase;
#else
gmacdev->PhyBase = phyBase;
#endif
/* Program/flash in the station/IP's Mac address */
synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, mac_addr);

176
sys/dev/gmac/synopGMAC_network_interface.c
View File

@ -36,10 +36,6 @@
#include "target/eeprom.h"
#endif
#if defined(LOONGSON_2G1A)
#include "target/ls1a.h"
#endif
//sw: ioctl in linux to be fixed
#define SIOCDEVPRIVATE 0x89f0
@ -509,26 +505,16 @@ s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
DmaDesc *first_desc = NULL;
//DmaDesc *second_desc = NULL;
dma_addr_t dma_addr;
//dma_addr_t dma_addr;
gmacdev->TxDescCount = 0;
TR("Total size of memory required for Tx Descriptors in Ring Mode = 0x%08x\n",((sizeof(DmaDesc) * no_of_desc)));
// first_desc = plat_alloc_consistent_dmaable_memory (pcidev, sizeof(DmaDesc) * no_of_desc,&dma_addr);
#if defined(LOONGSON_2G5536) ||defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE)
first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory (sizeof(DmaDesc) * no_of_desc, &dma_addr);
else
first_desc = (DmaDesc *)plat_alloc_memory(sizeof(DmaDesc) * no_of_desc+15); //sw: 128 aligned
#else
first_desc = (DmaDesc *)plat_alloc_memory(sizeof(DmaDesc) * no_of_desc+15);
#endif
if(first_desc == NULL){
TR("Error in Tx Descriptors memory allocation\n");
return -ESYNOPGMACNOMEM;
}
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE)
#endif
first_desc = ((u32)first_desc) & ~15;
@ -536,17 +522,11 @@ s32 synopGMAC_setup_tx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
gmacdev->TxDescCount = no_of_desc;
gmacdev->TxDesc = first_desc;
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
gmacdev->TxDescDma = dma_addr;
} else {
bf1 = (DmaDesc *)CACHED_TO_UNCACHED((unsigned long)(gmacdev->TxDesc));
//gmacdev->TxDescDma = (unsigned long)vtophys((unsigned long)bf1);
gmacdev->TxDescDma = (unsigned long)UNCACHED_TO_PHYS((unsigned long)bf1);
}
#else
bf1 = (DmaDesc *)CACHED_TO_UNCACHED((unsigned long)(gmacdev->TxDesc));
gmacdev->TxDescDma = (unsigned long)UNCACHED_TO_PHYS((unsigned long)bf1);
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
gmacdev->TxDescDma &= 0x0fffffff;
gmacdev->TxDescDma |= 0x00000000;
#endif
@ -613,25 +593,16 @@ s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
DmaDesc * bf1;
DmaDesc *first_desc = NULL;
//DmaDesc *second_desc = NULL;
dma_addr_t dma_addr;
//dma_addr_t dma_addr;
gmacdev->RxDescCount = 0;
TR("total size of memory required for Rx Descriptors in Ring Mode = 0x%08x\n",((sizeof(DmaDesc) * no_of_desc)));
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE)
first_desc = (DmaDesc *)plat_alloc_consistent_dmaable_memory (sizeof(DmaDesc) * no_of_desc, &dma_addr);
else
first_desc = (DmaDesc *)plat_alloc_memory (sizeof(DmaDesc) * no_of_desc+15);//sw: 2word aligned
#else
first_desc = (DmaDesc *)plat_alloc_memory (sizeof(DmaDesc) * no_of_desc+15);
#endif
// first_desc = plat_alloc_consistent_dmaable_memory (pcidev, sizeof(DmaDesc) * no_of_desc, &dma_addr);
first_desc = plat_alloc_memory (sizeof(DmaDesc) * no_of_desc+15); //sw: 2word aligned
if(first_desc == NULL){
TR("Error in Rx Descriptor Memory allocation in Ring mode\n");
return -ESYNOPGMACNOMEM;
}
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE)
#endif
first_desc = (DmaDesc *)((u32)first_desc & ~15);
@ -639,21 +610,16 @@ s32 synopGMAC_setup_rx_desc_queue(synopGMACdevice * gmacdev,u32 no_of_desc, u32
gmacdev->RxDesc = first_desc;
// gmacdev->RxDescDma = dma_addr;
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
gmacdev->RxDescDma = dma_addr;
} else {
bf1 = (DmaDesc *)CACHED_TO_UNCACHED((unsigned long)(gmacdev->RxDesc));
gmacdev->RxDescDma = (unsigned long)UNCACHED_TO_PHYS((unsigned long)bf1);
}
#else
bf1 = (DmaDesc *)CACHED_TO_UNCACHED((unsigned long)(gmacdev->RxDesc));
//gmacdev->RxDescDma = (unsigned long)vtophys((unsigned long)bf1);
gmacdev->RxDescDma = (unsigned long)UNCACHED_TO_PHYS((unsigned long)bf1);
//gmacdev->RxDesc = bf1;
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
gmacdev->RxDescDma |= 0x00000000;
#endif
// gmacdev->RxDescDma = (dma_addr_t) first_desc;
for(i = 0; i < gmacdev -> RxDescCount; i++){
for(i =0; i < gmacdev -> RxDescCount; i++){
synopGMAC_rx_desc_init_ring(gmacdev->RxDesc + i, i == gmacdev->RxDescCount-1);
#if SYNOP_TOP_DEBUG
TR("%02d %08x \n",i, (unsigned int)(gmacdev->RxDesc + i));
@ -1008,11 +974,6 @@ void synop_handle_received_data(struct synopGMACNetworkAdapter* tp)
;
#endif
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
dma_addr1 = plat_dma_map_single(gmacdev,data1,RX_BUF_SIZE,SYNC_R);
}
#endif
len = synopGMAC_get_rx_desc_frame_length(status) - 4; //Not interested in Ethernet CRC bytes
bcopy((char *)data1, mtod(skb, char *), len);
@ -1054,10 +1015,6 @@ void synop_handle_received_data(struct synopGMACNetworkAdapter* tp)
ether_input(ifp, eh, skb);
memset((u32)data1,0,RX_BUF_SIZE);
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE)
pci_sync_cache(NULL, (vm_offset_t)data1, RX_BUF_SIZE, SYNC_W);
#endif
adapter->synopGMACNetStats.rx_packets++;
adapter->synopGMACNetStats.rx_bytes += len;
}
@ -1069,12 +1026,8 @@ void synop_handle_received_data(struct synopGMACNetworkAdapter* tp)
adapter->synopGMACNetStats.rx_length_errors += synopGMAC_is_rx_frame_length_errors(status);
}
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE) {
dma_addr1 = (unsigned long)CACHED_TO_PHYS((unsigned long)(data1));
}
#else
dma_addr1 = (unsigned long)CACHED_TO_PHYS((unsigned long)(data1));
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
dma_addr1 |= 0x00000000;
#endif
desc_index = synopGMAC_set_rx_qptr(gmacdev,dma_addr1, RX_BUF_SIZE, (u32)data1,0,0,0);
@ -1142,9 +1095,9 @@ int synopGMAC_intr_handler(struct synopGMACNetworkAdapter * tp)
if(dma_status_reg == 0)
return 0;
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE)
#endif
//if(dma_status_reg & 0x04) //sw: dbg
// printf("Tx Desc Unavailable! 0x%x \n",dma_status_reg);
if(dma_status_reg == 0x660004) //sw: dbg
return 0;
@ -1294,13 +1247,9 @@ int synopGMAC_intr_handler(struct synopGMACNetworkAdapter * tp)
// return -ESYNOPGMACNOMEM;
}
#if defined(LOONGSON_2G1A) || defined(LOONGSON_2G5536)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE)
dma_addr = plat_dma_map_single(gmacdev,skb,RX_BUF_SIZE,SYNC_R);
else
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(skb));
#else
//dma_addr = (u32)skb;
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(skb));
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
dma_addr |= 0x00000000;
#endif
status = synopGMAC_set_rx_qptr(gmacdev,dma_addr,RX_BUF_SIZE, (u32)skb,0,0,0);
@ -1439,10 +1388,9 @@ unsigned long synopGMAC_linux_open(struct synopGMACNetworkAdapter *tp)
#endif
/*Attach the device to MAC struct This will configure all the required base addresses
such as Mac base, configuration base, phy base address(out of 32 possible phys )*/
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE)
synopGMAC_set_mac_addr(gmacdev,GmacAddr0High,GmacAddr0Low, PInetdev->dev_addr);
#else
// synopGMAC_attach(synopGMACadapter->synopGMACdev,(u32) synopGMACMappedAddr + MACBASE,(u32) synopGMACMappedAddr + DMABASE, DEFAULT_PHY_BASE);
//synopGMAC_attach(adapter->synopGMACdev,(u64) synopGMACMappedAddr + MACBASE,(u64) synopGMACMappedAddr + DMABASE, DEFAULT_PHY_BASE,PInetdev->dev_addr);
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
synopGMAC_set_mac_addr(adapter->synopGMACdev, GmacAddr0High, GmacAddr0Low, PInetdev->dev_addr);
#endif
/*Lets read the version of ip in to device structure*/
@ -1536,22 +1484,20 @@ unsigned long synopGMAC_linux_open(struct synopGMACNetworkAdapter *tp)
break;
// return -ESYNOPGMACNOMEM;
}
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
dma_addr = plat_dma_map_single(gmacdev,skb,RX_BUF_SIZE,SYNC_R);
} else {
skb1 = (u32)CACHED_TO_UNCACHED((unsigned long)(skb));
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(skb1));
}
#else
skb1 = (u32)CACHED_TO_UNCACHED((unsigned long)(skb));
//dma_addr = (unsigned long)vtophys((unsigned long)(skb1));
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(skb1));
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
dma_addr &= 0x0fffffff;
dma_addr |= 0x00000000;
#endif
// TR("rx_buf_PTR:%x, skb1:%x, dma_addr%x\n",skb, skb1, dma_addr);
// dbgdesc = gmacdev->RxNextDesc + 12;
//status = synopGMAC_set_rx_qptr_init(gmacdev,dma_addr,RX_BUF_SIZE, (u32)skb,0,0,0);
status = synopGMAC_set_rx_qptr(gmacdev,dma_addr,RX_BUF_SIZE, (u32)skb,0,0,0);
//pci_sync_cache(0, (vm_offset_t)skb, len, SYNC_W);
//printf("==rx sync cache\n");
@ -1770,9 +1716,6 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
return -1;
}
#ifdef FIX_CACHE_ADDR_UNALIGNED /*fixed by tangyt 2011-03-20*/
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE)
#endif
while(bf1 & 0x10)
{
plat_free_memory((void *)(bf1));
@ -1800,11 +1743,6 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
//sw: i don't know weather it's right
m_copydata(skb, 0, len,(char *)bf1);
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
dma_addr = plat_dma_map_single(gmacdev,bf1,len,SYNC_W);
}
#endif
/*
if(len < 64)
len = 64;
@ -1814,9 +1752,6 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
printf("==tx pkg len: %d",len);
#endif
//sw: dbg
#if defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE)
#endif
eh = mtod(skb, struct ether_header *);
#if SYNOP_TX_DEBUG
dumppkghd(eh,0);
@ -1836,20 +1771,16 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
plat_free_memory(skb);
#endif
#if defined(LOONGSON_2G5536) || defined(LOONGSON_2G1A)
if (gmacdev->MacBase != LS1A_GMAC0_REG_BASE + MACBASE) {
bf2 = (u32)CACHED_TO_UNCACHED((unsigned long)bf1);
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(bf2));
}
#else
bf2 = (u32)CACHED_TO_UNCACHED((unsigned long)bf1);
//dma_addr = (unsigned long)vtophys((unsigned long)(bf2));
dma_addr = (unsigned long)UNCACHED_TO_PHYS((unsigned long)(bf2));
#if (!defined(LOONGSON_2G5536))&&(!defined(LOONGSON_2G1A))
dma_addr &= 0x0fffffff;
dma_addr |= 0x00000000;
#endif
//status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, TX_BUF_SIZE, bf1,0,0,0,offload_needed);
// status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, TX_BUF_SIZE, bf1,0,0,0,offload_needed);
status = synopGMAC_set_tx_qptr(gmacdev, dma_addr, len, bf1,0,0,0,offload_needed,&index,dpr);
// printf("synopGMAC_set_tx_qptr: index = %d, dma_addr = %08x, len = %02x, buf1 = %08x\n", index, dma_addr, len, bf1);
@ -1865,7 +1796,7 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
#if SYNOP_TX_DEBUG
TR("%s No More Free Tx Descriptors\n",__FUNCTION__);
#endif
//dev_kfree_skb (skb); //with this, system used to freeze.. ??
// dev_kfree_skb (skb); //with this, system used to freeze.. ??
return -EBUSY;
}
}
@ -1914,8 +1845,8 @@ s32 synopGMAC_linux_xmit_frames(struct ifnet* ifp)
*/
struct net_device_stats * synopGMAC_linux_get_stats(struct synopGMACNetworkAdapter *tp)
{
TR("%s called \n",__FUNCTION__);
return( &(((struct synopGMACNetworkAdapter *)(tp))->synopGMACNetStats) );
TR("%s called \n",__FUNCTION__);
return( &(((struct synopGMACNetworkAdapter *)(tp))->synopGMACNetStats) );
}
/**
@ -2024,47 +1955,18 @@ void set_phy_manu(synopGMACdevice * gmacdev)
}
#endif
#if defined(LOONGSON_2G1A)
static int rtl88e1111_config_init(synopGMACdevice *gmacdev)
{
int retval, err;
u16 data;
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,&data);
data = data | 0x82;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x14,data);
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,&data);
data = data | 0x8000;
err = synopGMAC_write_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,0x00,data);
if (err < 0)
return err;
return 0;
}
#endif
#if defined(LOONGSON_2G1A)
int init_phy(synopGMACdevice *gmacdev)
#else
int init_phy(struct synopGMACdevice *gmacdev)
#endif
{
int retval;
#if defined(LOONGSON_2G1A) || defined(LOONGSON_2G5536)
u16 data;
if (gmacdev->MacBase == LS1A_GMAC0_REG_BASE + MACBASE) {
synopGMAC_read_phy_reg(gmacdev->MacBase,gmacdev->PhyBase,2,&data);
if(data == 0x141)
rtl88e1111_config_init(gmacdev);
return 0;
} else {
retval = rtl8211_config_init(gmacdev);
return retval;
}
#else
//retval = bcm54xx_config_init(gmacdev);
retval = rtl8211_config_init(gmacdev);
// synopGMAC_phy_loopback(gmacdev, SYNOP_PHY_LOOPBACK);
//if(retval != 0)
return retval;
#endif
// return 0;
}
@ -2693,12 +2595,12 @@ s32 synopGMAC_init_network_interface(char* xname,u64 synopGMACMappedAddr)
struct synopGMACNetworkAdapter * synopGMACadapter;
static int syn_num;
{
if(0x90000c0000000000LL == synopGMACMappedAddr)
parseenv(0,mac_addr0);
else
parseenv(1,mac_addr0);
}
#else
s32 synopGMAC_init_network_interface(char* xname, struct device *sc )
{

35
sys/dev/gmac/synopGMAC_plat.c
View File

@ -18,19 +18,6 @@
* @param[in] bytes in bytes to allocate
*/
#if defined(LOONGSON_2G1A)
dma_addr_t __attribute__((weak)) gmac_dmamap(unsigned long va,size_t size)
{
unsigned long dma_adr;
if(va >= 0x84000000 && va <= 0x8fffffff)
dma_adr = va - 0x74000000;
else
printf("error!!! the address is out of the rang that 1F can map ,you can change the pci_map\n");
return dma_adr;
}
#endif
void *plat_alloc_memory(u32 bytes)
{
return (void*)malloc((size_t)bytes, M_DEVBUF, M_DONTWAIT);
@ -42,19 +29,6 @@ void *plat_alloc_memory(u32 bytes)
* @param[in] bytes in bytes to allocate
*/
#if defined(LOONGSON_2G1A)
void *plat_alloc_consistent_dmaable_memory(u32 size, u32 *addr)
{
void *buf;
buf = (void*)malloc((size_t)size, M_DEVBUF, M_DONTWAIT);
CPU_IOFlushDCache( buf,size, SYNC_W);
*addr =gmac_dmamap(buf,size);
buf = (unsigned char *)CACHED_TO_UNCACHED(buf);
return buf;
}
#endif
//sw to-be clean
/*
void *plat_alloc_consistent_dmaable_memory(struct pci_dev *pcidev, u32 size, u32 *addr)
@ -90,15 +64,6 @@ void plat_free_memory(void *buffer)
return ;
}
#if defined(LOONGSON_2G1A)
dma_addr_t plat_dma_map_single(void *hwdev, void *ptr,
size_t size, int direction)
{
unsigned long addr = (unsigned long) ptr;
CPU_IOFlushDCache(addr,size, direction);
return gmac_dmamap(addr,size);
}
#endif
/**
* This is a wrapper function for platform dependent delay

19
sys/dev/gmac/synopGMAC_plat.h
View File

@ -23,13 +23,6 @@
*/
#include "GMAC_Pmon.h"
#if defined(LOONGSON_2G1A)
#include "target/ls1a.h"
#define MACBASE 0x0000
#define DMABASE 0x1000
#endif
//#include "synopGMAC_Host.h"
//sw: copy the type define into here
@ -156,11 +149,6 @@ static u32 synopGMACReadReg(u64 RegBase, u32 RegOffset)
u32 data;
addr = RegBase + (u64)RegOffset;
#if defined(LOONGSON_2G1A)
if (RegBase == LS1A_GMAC0_REG_BASE + MACBASE || RegBase == LS1A_GMAC0_REG_BASE + DMABASE)
data = *(volatile u32 *)addr;
else
#endif
__asm __volatile(
".set\tnoreorder\n\t"
@ -196,15 +184,10 @@ static void synopGMACWriteReg(u64 RegBase, u32 RegOffset, u32 RegData )
addr = RegBase + (u64)RegOffset;
#if SYNOP_REG_DEBUG
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData);
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#endif
//writel(RegData,(void *)addr);
//printf("GMAC addr = 0x%lx \n",addr);
#if defined(LOONGSON_2G1A)
if (RegBase == LS1A_GMAC0_REG_BASE + MACBASE || RegBase == LS1A_GMAC0_REG_BASE + DMABASE)
*(volatile u32 *)addr = RegData;
else
#endif
__asm __volatile(
".set\tnoreorder\n\t"
".set\tmips3\n\t"

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