r794@Knoppix: root | 2008-03-21 17:18:22 +0800

fix mipsspelling.


git-svn-id: file:///svn/pmon-all/pmon-all@208 214b0138-1524-0410-9122-e5cb4b5bc56c

Targets/Bonito2fdev/Bonito/mycmd.c

@@ -156,6 +156,8 @@ return 0;
 #include "target/via686b.h"
 static int i2cslot=0;
 
+#ifndef DEVBD2F_SM502
+
 static int DimmRead(int type,long long addr,union commondata *mydata)
 {
 char c;
@@ -187,6 +189,7 @@ default: return -1;break;
 return 0;
 }
 
+#endif
 static int DimmWrite(int type,long long addr,union commondata *mydata)
 {
 return -1;
@@ -611,6 +614,32 @@ static int sm502RtcWrite(int type,long long addr,union commondata *mydata)
 	}
 	return 0;
 }
+
+static int DimmRead(int type,long long addr,union commondata *mydata)
+{
+char c;
+switch(type)
+{
+case 1:
+		i2c_start();	
+		i2c_send(0xa0|(i2cslot<<1));
+		if(!i2c_rec_ack())
+			return -1;
+		i2c_send(addr);
+		if(!i2c_rec_ack())
+			return -1;
+		i2c_start();
+		i2c_send(0xa1|(i2cslot<<1));
+		if(!i2c_rec_ack())
+			return -1;
+		mydata->data1=i2c_rec();
+		i2c_stop();
+		break;
+default:
+		return -1;
+}
+		return 0;
+}
 #endif
 static int i2cs(int argc,char **argv)
 {

Targets/Bonito2fdev/Bonito/tgt_machdep.c

@@ -475,11 +475,13 @@ w83627_write(5,0x70,1);
 w83627_write(5,0x72,0xc);
 w83627_write(5,0xf0,0x80);
 _wrmsr(GET_MSR_ADDR(0x5140001F), 0, 0);//no keyboard emulation
+#ifndef USE_CS5536_UART
 w83627_write(2,0x30,0x01);
 w83627_write(2,0x60,0x03);
 w83627_write(2,0x61,0xf8);
 w83627_write(2,0x70,0x04);
 w83627_write(2,0xf0,0x00);
+#endif
 #endif
 
 	/*

Targets/Bonito2fdev/conf/Bonito.2fdev.cs5536

@@ -173,8 +173,9 @@ select fatfs
 option FLOATINGPT
 option PCI_IDSEL_CS5536=14
 option COM3_BASE_ADDR=0xbff003f8
-option WDC_NORESET
+#option WDC_NORESET
 select cs5536
+option CONFIG_VIDEO_SM501_16BPP
 select gzip
 option INPUT_FROM_BOTH
 option OUTPUT_TO_BOTH

sys/dev/pci/cs5536.c

@@ -382,16 +382,6 @@ void cs5536_i8259_init(void)
 	outb(CS5536_LEGACY_BASE_ADDR | 0x21, 0xFB); /* Mask all IRQs but IRQ2 is cascaded.*/
 //	outb(CS5536_LEGACY_BASE_ADDR | 0xA1, 0x00); /* Mask off all interrupts for now. */
 //	outb(CS5536_LEGACY_BASE_ADDR | 0x21, 0x00); /* Mask all IRQs but IRQ2 is cascaded.*/				
-	_rdmsr(DIVIL_MSR_REG(PIC_IRQM_LPC), &hi, &lo);
-	lo |= 0x1002;
-	_wrmsr(DIVIL_MSR_REG(PIC_IRQM_LPC), hi, lo);
-	_rdmsr(DIVIL_MSR_REG(PIC_IRQM_PRIM), &hi, &lo);
-	lo &=~(0x1002) ;
-	_wrmsr(DIVIL_MSR_REG(PIC_IRQM_PRIM), hi, lo);
-	_rdmsr(DIVIL_MSR_REG(LPC_SIRQ), &hi, &lo);
-	lo |=0xc0 ;
-	_wrmsr(DIVIL_MSR_REG(LPC_SIRQ), hi, lo);			
-
 	_rdmsr(DIVIL_MSR_REG(PIC_IRQM_LPC), &hi, &lo);
 	lo |= 0x1002;
 	_wrmsr(DIVIL_MSR_REG(PIC_IRQM_LPC), hi, lo);