LS2K pci: pci resource allocate address same as pmon.

Change-Id: Ibfbb95b42fa96b2009345be28302e41e82d3bd5e
Signed-off-by: QiaoChong <qiaochong@loongson.cn>

Targets/LS2K/include/bonito.h

@@ -17,6 +17,7 @@
 /* Revision 1.48 autogenerated on 08/17/99 15:20:01 */
 
 #ifndef _BONITO_H_
+#define _BONITO_H_
 
 #ifdef __ASSEMBLER__
 //__ASSEMBLER__ is not defined
@@ -30,6 +31,23 @@ extern char           *heaptop;
 /* static char * const _bonito = PA_TO_KVA1(BONITO_BASE); */
 /*#define BONITO(x)	*(volatile unsigned long *)(PHYS_TO_UNCACHED(BONITO_REG_BASE)+(x))*/
 #define BONITO(x)	*(volatile unsigned long *)(0xbfe00000+(x))
+struct pci_config_data {
+		int bus;
+		int dev;
+		int func;
+		int interrupt;
+		int primary;
+		int secondary;
+		int subordinate;
+		unsigned int mem_start;
+		unsigned int mem_end;
+		unsigned int io_start;
+		unsigned int io_end;
+#define PCI_DEV		0x1
+#define PCI_BRIDGE	0x2
+		int type;
+}__attribute__((aligned(4)));
+#define LS2K_PCI_IO_MASK 0x1ffffff
 #endif /* __ASSEMBLER__ */
 
 #define RTC_INDEX_REG 0x70

Targets/LS2K/ls2k/tgt_machdep.c

@@ -1655,23 +1655,6 @@ int get_update(char *p)
  }
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 
-struct pci_config_data {
-		int bus;
-		int dev;
-		int func;
-		int interrupt;
-		int primary;
-		int secondary;
-		int subordinate;
-		unsigned int mem_start;
-		unsigned int mem_end;
-		unsigned int io_start;
-		unsigned int io_end;
-#define PCI_DEV		0x1
-#define PCI_BRIDGE	0x2
-		int type;
-}__attribute__((aligned(4)));
-
 struct pci_config_data pci_config_array[] = {
 			/*		APB		*/
 [0] = {
@@ -1760,9 +1743,9 @@ struct pci_config_data pci_config_array[] = {
 .io_start = 0x18500000, .io_end = 0x185fffff,
 },
 
-{},
 };
 
+int pci_config_array_size = ARRAY_SIZE(pci_config_array);
 typedef unsigned long long u64;
 u64  __raw__readq(u64 addr);
 u64 __raw__writeq(u64 addr, u64 val);

Targets/LS2K/pci/pci_machdep.c

@@ -117,6 +117,11 @@ _pci_hwinit(initialise, iot, memt)
 	_pci_head = pd;
 	SBD_DISPLAY ("HW-3", 0);
 
+#undef BONITO_PCILO0_BASE
+#undef BONITO_PCILO_SIZE;
+#define BONITO_PCILO0_BASE 0x10000000
+#define BONITO_PCILO_SIZE  0x08000000
+
 	pb->minpcimemaddr  = BONITO_PCILO0_BASE; // 0x4000_0000
 	pb->nextpcimemaddr = BONITO_PCILO0_BASE+BONITO_PCILO_SIZE; // 0x4000_0000 + 0x4000_0000
 	pb->minpciioaddr   = PCI_IO_SPACE_BASE+0x0004000;
@@ -279,3 +284,49 @@ int pci_get_busno(struct pci_device *pd, int bus)
 	
 	return ret;
 }
+
+extern struct pci_config_data pci_config_array[];
+extern int pci_config_array_size;
+static char pci_dev_index[0x12*4];
+
+int __attribute__ ((constructor)) build_pci() {
+	int i;
+	for(i = 0;i < pci_config_array_size ;i++){
+		pci_dev_index [((pci_config_array[i].dev<<2) |pci_config_array[i].func) ] = i;
+	}
+	return 0;
+}
+
+pcireg_t pci_alloc_fixmemio(struct pci_win *pm)
+{
+	int idx;
+	struct pci_device *pd = pm->device;
+	int reg = pm->reg;
+
+	if(!pd->pa.pa_bus)
+	{
+		idx = pci_dev_index [((pd->pa.pa_device<<2) |pd->pa.pa_function)];
+		if(idx)
+		{
+			if(pci_config_array[idx].type == PCI_DEV)
+			{
+				if(reg == 0x10) return pci_config_array[idx].mem_start;
+			}
+			else
+			{
+				if(reg == PCI_MEMBASE_1) 
+				{
+					pm->size = pci_config_array[idx].mem_end - pci_config_array[idx].mem_start;
+					return pci_config_array[idx].mem_start;
+				}
+
+				if(reg == PCI_IOBASEL_1)
+				{
+					pm->size = pci_config_array[idx].io_end - pci_config_array[idx].io_start;
+					return  pci_config_array[idx].io_start & LS2K_PCI_IO_MASK ;
+				}
+			}
+		}
+	}
+	return -1;
+}