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Modify the func bypass for PCIE H\G0\G1 to avoid pcie work error when data access is increased

Change-Id: Idafd278e84385ef784585bca82f42d8d2812ca91
Signed-off-by: niupj <niupengju@loongson.cn>
master
niupj 4 years ago
committed by Chong Qiao
parent
commit
5d2d818925
  1. 48
      pmon/arch/mips/ls7a/ls7a_init.S

48
pmon/arch/mips/ls7a/ls7a_init.S

@ -1586,6 +1586,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060000000
li a0, 0xff204c
sw a0, 0x0(t1)
@ -1646,6 +1654,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060100000
li a0, 0xff204c
sw a0, 0x0(t1)
@ -1764,6 +1780,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060000000
li a0, 0xff204c
@ -1825,6 +1849,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060100000
li a0, 0xff204c
sw a0, 0x0(t1)
@ -1943,6 +1975,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060000000
li a0, 0xff204c
sw a0, 0x0(t1)
@ -2003,6 +2043,14 @@ cal_one_pcie_x8:
and a0, a0, a1
sw a0, 0x58(t1)
bal ls7a_version
nop
beqz v0,1f
nop
lw a0, 0x28(t1)
or a0, 1
sw a0, 0x28(t1)
1:
dli t1, 0x90000e0060100000
li a0, 0xff204c
sw a0, 0x0(t1)

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