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Add HT window for GPU mapping 0x20000000 to high mem 512M.

Target:LS7A

Change-Id: I577ad899f66f8e8cb2e7d01e812c37555130d75a
master
zhangbaoqi 7 years ago
parent
commit
6cf1713e6d
  1. 12
      Targets/Bonito3a3000_7a/Bonito/tgt_machdep.c
  2. 2
      pmon/arch/mips/ls7a/ht.h
  3. 21
      pmon/arch/mips/ls7a/ls3a7a_ht_init.S
  4. 3
      pmon/cmds/bootparam.h

12
Targets/Bonito3a3000_7a/Bonito/tgt_machdep.c

@ -1334,19 +1334,19 @@ struct efi_memory_map_loongson * init_memory_map()
(entry)++
#if 1
/*add UMA_VIDEO_RAM area to reserved 0x60 MB memory for GPU */
EMAP_ENTRY(i, 0, SYSTEM_RAM_LOW, 0x00200000, 0x0ee - 0x60);
EMAP_ENTRY(i, 0, UMA_VIDEO_RAM, (0xee - 0x60 + 2) << 20, 0x60);
EMAP_ENTRY(i, 0, SYSTEM_RAM_LOW, 0x00200000, 0x0ee);
/* for entry with mem_size < 1M, we set bit31 to 1 to indicate
* that the unit in mem_size is Byte not MBype */
EMAP_ENTRY(i, 0, SMBIOS_TABLE, (SMBIOS_PHYSICAL_ADDRESS & 0x0fffffff),
(SMBIOS_SIZE_LIMIT | 0x80000000));
/* 0x20000000 size 512M */
EMAP_ENTRY(i, 0, VUMA_VIDEO_RAM, 0x20000000, 0x200);
/* SYSTEM_RAM_HIGH high 512M */
EMAP_ENTRY(i, 0, UMA_VIDEO_RAM, 0x90000000ULL + ((unsigned long long)(size - 0x20000000)), 0x200);
EMAP_ENTRY(i, 0, SYSTEM_RAM_HIGH, 0x90000000, size >> 20);
EMAP_ENTRY(i, 0, SYSTEM_RAM_HIGH, 0x90000000, (size - 0x20000000) >> 20);
#endif
#ifdef MULTI_CHIP
if(memorysize_high_n1) {
EMAP_ENTRY(i, 1, SYSTEM_RAM_LOW, 0x00000000000L, 0x100);

2
pmon/arch/mips/ls7a/ht.h

@ -57,6 +57,8 @@
#define LS3A_HT_RX_CACHE_WIN0_OFFSET 0x60
#define LS3A_HT_RX_CACHE_WIN1_OFFSET 0x68
#define LS3A_HT_RX_CACHE_WIN2_OFFSET 0x70
#define LS3A_HT_RX_CACHE_WIN3_OFFSET 0x148
#define LS3A_HT_RX_CACHE_WIN4_OFFSET 0x150
#define LS3A_HT_TX_POST_WIN0_OFFSET 0xD0
#define LS3A_HT_TX_POST_WIN1_OFFSET 0xD8
#define LS3A_HT_RX_UNCACHE_WIN0_OFFSET 0xF0

21
pmon/arch/mips/ls7a/ls3a7a_ht_init.S

@ -87,19 +87,32 @@ ls3a7a_ht_init:
li a0, 0xc0000000
sw a0, (LS3A_HT_RX_CACHE_WIN0_OFFSET+0)(t0)
move a1, msize
li a0, 0xff
and a1, a0
sll a1, 5
//translate 0x20000000 ~ 0x40000000 to (high mem - 512M)
//mem start address is 0x80000000
li a0, 0x0020ffe0
sw a0, (LS3A_HT_RX_CACHE_WIN1_OFFSET+4)(t0)
li a0, 0xc0000060 //0x80000000 - 0x20000000
addu a0, a1
sw a0, (LS3A_HT_RX_CACHE_WIN1_OFFSET+0)(t0)
//open RX window: 0x0 ~ 0x7f_ffff_ffff
li a0, 0x0000e000
sw a0, (LS3A_HT_RX_CACHE_WIN1_OFFSET+4)(t0)
sw a0, (LS3A_HT_RX_CACHE_WIN2_OFFSET+4)(t0)
li a0, 0x80000000
sw a0, (LS3A_HT_RX_CACHE_WIN1_OFFSET+0)(t0)
sw a0, (LS3A_HT_RX_CACHE_WIN2_OFFSET+0)(t0)
#ifdef MULTI_CHIP
//related to system chip number, not the 3A - 7A connection
//recover node 1 access address (bit 37: node id)
li a0, 0x2000e000
sw a0, (LS3A_HT_RX_CACHE_WIN2_OFFSET+4)(t0)
sw a0, (LS3A_HT_RX_CACHE_WIN3_OFFSET+4)(t0)
li a0, 0xc0100000
sw a0, (LS3A_HT_RX_CACHE_WIN2_OFFSET+0)(t0)
sw a0, (LS3A_HT_RX_CACHE_WIN3_OFFSET+0)(t0)
#endif
#if 0 //uncache DMA currently, configured by kernel

3
pmon/cmds/bootparam.h

@ -16,7 +16,8 @@
#define ACPI_TABLE 9
#define SMBIOS_TABLE 10
#define UMA_VIDEO_RAM 11
#define MAX_MEMORY_TYPE 12
#define VUMA_VIDEO_RAM 12
#define MAX_MEMORY_TYPE 13
#define VRAM_TYPE_SP 0
#define VRAM_TYPE_UMA 1

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