chage al1, append default. ctrl-c to abort

Signed-off-by: surenyi <surenyi82@163.com>

.gitignore

@@ -1,3 +1,14 @@
 *.o
 zloader/LS2K.dtb.i
 zloader/gzrom
+Targets/LS2K/compile/ls2k/lib/libc/libc.a
+Targets/LS2K/compile/ls2k/lib/libm/libm.a
+Targets/LS2K/compile/ls2k/lib/libz/libz.a
+Targets/LS2K/compile/ls2k/pmon
+Targets/LS2K/compile/ls2k/pmon.bin
+Targets/LS2K/compile/ls2k/vers.c
+Targets/LS2K/compile/ls2k/vers.h
+Targets/LS2K/compile/ls2k/version
+zloader/initmips.c
+zloader/pmon.bin.c
+zloader/pmon.bin.gz

Targets/LS2K/compile/ls2k/vers.c

@@ -1,6 +0,0 @@
-char ostype[] = "PMON";
-char osrelease[] = "4.0.0-Release";
-char osversion[] = "ls2k#51";
-char sccs[8] = { ' ', ' ', ' ', ' ', '@', '(', '#', ')' };
-char vers[] =
-    "PMON 4.0.0-Release (ls2k) #51: Mon May 13 10:48:46 CST 2024 commit c71005b010100385a039f4a2fcff51d3fe198a43 Author: surenyi <surenyi82@163.com> Date:   Sat May 11 11:40:20 2024 +0800 ";

Targets/LS2K/compile/ls2k/vers.h

@@ -1 +0,0 @@
-#define VERS "PMON 4.0.0-Release (ls2k) #51: Mon May 13 10:48:46 CST 2024\r\n"

Targets/LS2K/compile/ls2k/version

@@ -1 +0,0 @@
-52

pmon/common/main.c

@@ -1,3 +1,4 @@
+/* vim: set ts=4 sw=4 et fdm=marker: */
 /* $Id: main.c,v 1.1.1.1 2006/09/14 01:59:08 root Exp $ */
 
 /*
@@ -625,8 +626,12 @@ static int autoload(char *s)
 		}
 
 		SBD_DISPLAY ("AUTO", CHKPNT_AUTO);
-		printf("Press <Enter> to execute loading image:%s\n",s);
-		printf("Press any other key to abort.\n");
+        /* {{{: Press key to abort */
+		/* printf("Press <Enter> to execute loading image:%s\n",s); */
+		/* printf("Press any other key to abort.\n"); */
+		printf("Press <CTRL-c> to abort.\n");
+		printf("Press any other key to execute loading image:%s\n",s);
+        /* }}} */
 		ioctl (STDIN, CBREAK, &sav);
 		lastt = 0;
 		if (!dly) ioctl (STDIN, FIONREAD, &cnt);
@@ -643,13 +648,16 @@ static int autoload(char *s)
 			}
 		} while (dly != 0 && cnt == 0);
 
-		if(cnt > 0 && strchr("\n\r", getchar())) {
+		if ((cnt > 0) && (strchr("\n\r", getchar()))) {
             cnt = 0;
         }
-
 		ioctl (STDIN, TCSETAF, &sav);
 		putchar ('\n');
 
+        /* {{{: Force to load, only support CTRL-C */
+        cnt = 0;
+        /* }}} */
+
 		if(cnt == 0) {
 	        if(getenv("autocmd"))
 			{

zloader/Makefile.inc

@@ -154,7 +154,7 @@ define dtb_rules
 	make -C ../Targets/${TARGET}/compile/${TARGETEL}/ DTB_O=`pwd`/${TARGET}.dtb.i DTB_I=`pwd`/../Targets/${TARGET}/conf/${TARGET}$(@:dtb%=%).dts dtb
 	./dtc -I dts -O dtb -o ${TARGET}.dtb  ${TARGET}.dtb.i
 	( echo  "#include <include/load_dtb.h>";echo NVRAM_OFFS; echo DTB_OFFS; )| make -C ../Targets/${TARGET}/compile/${TARGETEL}/ DTB_O=`pwd`/dtbinfo.txt DTB_I=- dtb
-	[ -f gzrom.bin ] && cp gzrom.bin gzrom-dtb.bin && python2 ../tools/pmonenv.py -O $$((`tail -n 1 dtbinfo.txt`)) -o $$((`tail -n 2 dtbinfo.txt|head -n 1`)) -f gzrom-dtb.bin -d ${TARGET}.dtb -w  al=\(usb0,0\)/boot/vmlinuz al1=\(wd0,0\)/boot/vmlinuz append="'console=ttyS0,115200 console=tty initcall_debug=1 loglevel=20'" FR=1
+	[ -f gzrom.bin ] && cp gzrom.bin gzrom-dtb.bin && python2 ../tools/pmonenv.py -O $$((`tail -n 1 dtbinfo.txt`)) -o $$((`tail -n 2 dtbinfo.txt|head -n 1`)) -f gzrom-dtb.bin -d ${TARGET}.dtb -w  al=\(usb0,0\)/boot/vmlinuz al1=/dev/mtd0 append="'console=ttyS0,115200 init=/init console=ttyS0,115200 rootfstype=yaffs2 rw root=/dev/mtdblock1'" FR=1
 endef
 
 dtb:

zloader/initmips.c

@@ -1,137 +0,0 @@
-void realinitmips(unsigned long long msize);
-void enable_cache()
-{
-	    __asm__ volatile(
-		".set mips2;\n" \
-"        mfc0   $4,$16;\n" \
-"        and    $4,$4,0xfffffff8;\n" \
-"        or     $4,$4,0x3;\n" \
-"        mtc0   $4,$16;\n" \
-"		.set mips0;\n"
-		::
-		:"$4"
-		);
-}
-
-#ifndef NOCACHE2
-void flush_cache2()
-{
-asm volatile(
-".set mips3;\n" \
-"	mfc0	$3, $15;			# read processor ID register;\n" \
-" 	li		$2, 0x6303;				#godson2f prid;\n" \
-" 	beq		$2, $3, godson_2f;\n" \
-" 	nop;\n" \
-"	li		$2, 0x6302;				#godson2e prid;\n" \
-"	bne     $2, $3,11f;             #godson3a/2g need not flush\n" \
-"	nop;\n" \
-"# godson2e;\n" \
-" godson_2f: " \
-"	li	  $2, 0x80000000;\n" \
-"   addu  $3,$2,512*1024;\n" \
-"10:\n" \
-"	cache	3, 0($2);\n" \
-"	cache	3, 1($2);\n" \
-"	cache	3, 2($2);\n" \
-"	cache	3, 3($2);\n" \
-"	addu	$2, 32;\n" \
-"	bne	    $2,$3, 10b;\n" \
-"	nop;\n" \
-"11:\n" \
-:::"$2","$3"
-);
-}
-#else
-void flush_cache()
-{
-
-#ifndef WAYBIT
-#define WAYBIT 0
-#endif
-#define WAY__(x) #x
-#define WAY_(x,y) WAY__((x<<y))
-#define WAY(x) WAY_(x,WAYBIT)
-asm volatile(
-"		.set mips3;\n" 
-"        li    $5,0x80000000;\n" 
-"        addu  $6,$5,16384;\n" 
-"1:\n" 
-"        cache  1," WAY(0) "($5);\n" 
-"        cache  1," WAY(1) "($5);\n" 
-"        cache  1," WAY(2) "($5);\n" 
-"        cache  1," WAY(3) "($5);\n" 
-"        cache  0," WAY(0) "($5);\n" 
-"        cache  0," WAY(1) "($5);\n" 
-"        cache  0," WAY(2) "($5);\n" 
-"        cache  0," WAY(3) "($5);\n" 
-"        add    $5,$5,32;\n" 
-"        bne    $5,$6,1b;\n" 
-"        nop;\n" 
-"		.set mips0;\n" 
-::: "$5","$6");
-}
-#endif
-void initmips(unsigned long long msize,unsigned long long dmsize, unsigned long long dctrl)
-{
-    long *edata=(void *)0x8f256d98;
-    long *end=(void *)0x8f29d65c;
-    int *p;
-
-	int debug=(msize==0);
-#if defined(LS3A2H_STR) || defined(LS2K_STR)
-    long long str_ra,str_flag,str_sp;
-    str_ra = *((long long*)0xafaaa040);
-    str_sp = *((long long*)0xafaaa048);
-    str_flag = *((long long*)0xafaaa050);
-#endif 
-//	CPU_TLBClear();
-    tgt_puts("Uncompressing Bios");
-    if(!debug||dctrl&1)enable_cache();
-	
-#if defined(LS3A2H_STR) || defined(LS2K_STR)
-    if ((str_sp < 0x9800000000000000) || (str_ra < 0xffffffff80000000)
-		    || (str_flag != 0x5a5a5a5a5a5a5a5a)) {
-#endif
-	    while(1)
-	    {
-		    if(run_unzip(biosdata,0x8f010000)>=0)break;
-	    }
-#if defined(LS3A2H_STR) || defined(LS2K_STR)
-    }
-#endif	
-    tgt_puts("OK,Booting Bios\r\n");
-    for(p=edata;p<=end;p++)
-    {
-        *p=0;
-    }
-	memset(0x8f010000-0x1000,0,0x1000);//0x8f010000-0x1000 for frame(registers),memset for pretty
-	run_unzip(gdbstub, (int)0x80008000);
-	*(int *)(int)0x80008018 = COM1_BASE_ADDR;
-#ifdef NOCACHE2
-	flush_cache();
-#else
-	flush_cache2();
-#endif
-    realinitmips(debug?dmsize:msize);
-}
-
-
-void realinitmips(unsigned long long msize)
-{
-	     asm ("li  $29,0x8f010000-0x4000;\n" \
-"		       li $2,0x8f0d1164;\n" \
-"			   move $4,%0;\n" \
-"			   jalr $2;\n" \
-"			   nop;\n" \
-"			  1: b 1b;nop;" \
-          :
-          : "r" (msize)
-          : "$29", "$2","$4");
-
-}
-int tgt_puts(char *str)
-{
-	while(*str)
-	tgt_putchar(*str++);
-	return 0;
-}