add reserved_cores_mask for selective booting APs

*.  3a780e, 3aserver, 3c780e and 3cserver all use core 0 as BP
and boot all other core, this is compatiable to previous version;

*.  When changing the BOOTCORE_ID and/or RESERVED_COREMASK, you
NEED "make cfg", to let it take effect

Change-Id: I8d6485407408baa969fce4f5473cabc4c2ee40af

Targets/Bonito3a780e/Bonito/loongson3_def.h

@@ -166,8 +166,6 @@ nop
 
 #define HT_REMOTE_NODE  0x900010003ff01000
 
-/*BOOTCORE_ID at [0, 3]*/
-#define	BOOTCORE_ID 0
 
 #define Index_Store_Tag_I			0x08
 #define Index_Store_Tag_D			0x09

Targets/Bonito3a780e/conf/Bonito.3a780e

@@ -37,6 +37,8 @@ option      LS3_HT              # Enable the IO cache coherent of HT
 #option      USE_LPC_UART
 #option      MULTI_CHIP
 option      ENABLE_SATA         #Enable SATA  ,when enable IDE can also use, when commended only IDE can use
+option		BOOTCORE_ID=0
+option		RESERVED_COREMASK=0xff00
 
 #
 # Uart serial baud rate selection

Targets/Bonito3aserver/Bonito/loongson3_def.h

@@ -199,8 +199,6 @@ GPIO_CLEAR_OUTPUT(0x1<<14);
 
 #define HT_REMOTE_NODE  0x900010003ff01000
 
-/*BOOTCORE_ID at [0, 3]*/
-#define	BOOTCORE_ID 0
 
 #define Index_Store_Tag_I			0x08
 #define Index_Store_Tag_D			0x09

Targets/Bonito3aserver/conf/Bonito.3aserver

@@ -37,6 +37,8 @@ option      LS3_HT              # Enable the IO cache coherent of HT
 #option      USE_SB700_LPC_UART
 option      MULTI_CHIP
 option      ENABLE_SATA         #Enable SATA  ,when enable IDE can also use, when commended only IDE can use
+option		BOOTCORE_ID=0
+option		RESERVED_COREMASK=0xff00
 
 option		BOOT_PARAM
 option	    LOONGSON_3ASERVER

Targets/Bonito3c780e/Bonito/loongson3_def.h

@@ -164,8 +164,6 @@ nop
 
 #define HT_REMOTE_NODE  0x900010003ff01000
 
-/*BOOTCORE_ID at [0, 3]*/
-#define	BOOTCORE_ID 0
 
 #define Index_Store_Tag_I			0x08
 #define Index_Store_Tag_D			0x09

Targets/Bonito3c780e/conf/Bonito.3c780e

@@ -32,6 +32,9 @@ option      MULTI_CHIP
 option      ENABLE_SATA         #Enable SATA  ,when enable IDE can also use, when commended only IDE can use
 option      LS3B
 
+option		BOOTCORE_ID=0
+option		RESERVED_COREMASK=0xff00
+
 option      AUTO_DDR_CONFIG
 option      USE_SB_I2C
 

Targets/Bonito3cserver/Bonito/loongson3_def.h

@@ -165,9 +165,6 @@ nop
 
 #define HT_REMOTE_NODE  0x900010003ff01000
 
-/*BOOTCORE_ID at [0, 3]*/
-#define	BOOTCORE_ID 0
-
 #define Index_Store_Tag_I			0x08
 #define Index_Store_Tag_D			0x09
 #define Index_Store_Tag_V			0x0a

Targets/Bonito3cserver/conf/Bonito.3cserver

@@ -33,6 +33,9 @@ option      LS3B
 option      DUAL_3B
 option      MULTI_CHIP
 
+option		BOOTCORE_ID=0
+option		RESERVED_COREMASK=0xff00
+
 option      AUTO_DDR_CONFIG
 option      USE_SB_I2C
 

pmon/cmds/bootparam.c

@@ -274,7 +274,14 @@ struct efi_cpuinfo_loongson *init_cpu_info()
 	c->total_node = 1;
 	c->nr_cpus = 1;
 #endif
-  c->cpu_startup_core_id = (available_core_mask >> 16) & 0xf;
+#ifdef	BOOTCORE_ID
+	c->cpu_startup_core_id = BOOTCORE_ID;
+	c->reserved_cores_mask = RESERVED_COREMASK;
+#else
+	c->cpu_startup_core_id = 0;
+	c->reserved_cores_mask = 0;
+#endif
+
 
 return c;
 }

pmon/cmds/bootparam.h

@@ -60,7 +60,8 @@ struct efi_cpuinfo_loongson {
 	enum loongson_cpu_type  cputype;//3a-3b
 	unsigned int         total_node;   /* physical core number */
 
-	unsigned int         cpu_startup_core_id; /* Core id: */
+	unsigned short cpu_startup_core_id; /* Core id: */
+	unsigned short reserved_cores_mask; /* Core id: */
 	unsigned int  cpu_clock_freq; //cpu_clock
 	unsigned int nr_cpus;
 }__attribute__((packed));