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loongson2k ddr param add DDR_CLOCK_MASK. 

Change-Id: I78274f358f652412f8fde75828b9308ab533b57b
Signed-off-by: QiaoChong <qiaochong@loongson.cn>
master
QiaoChong 5 years ago
committed by Chong Qiao
parent
db088985f8
commit
899381d5f0
1 changed files with 10 additions and 2 deletions
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  1. 12
      Targets/LS2K/ls2k/loongson_mc2_param.S

12
Targets/LS2K/ls2k/loongson_mc2_param.S
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@ -47,6 +47,14 @@ ddr2_RDIMM_reg_data_mc1:
#define _DDR_PARAM_210(x) x
#endif
#ifdef DDR_CLOCK_MASK
#define _DDR_PARAM_140(x) 0x0003000001ff0100|DDR_CLOCK_MASK
#elif !defined(DDR_PARAM_140)
#define _DDR_PARAM_140(x) x
#else
#define _DDR_PARAM_140(x) DDR_PARAM_140
#endif
#define DDR_PARAM(x,y) _DDR_PARAM_##x(y)
@ -138,7 +146,7 @@ MC0_DDR3_CTRL_0x130: .dword 0x0000000003020202
//hXXXXXX (RD) 0000000_0 pm_wrdq_clkdelay_8 0000_0000 pm_odt_oe_end_8 0000_0000 pm_odt_oe_begin_8 000000_00 pm_odt_stop_edge_8 000000_00 pm_odt_start_edge_8
MC0_DDR3_CTRL_0x138: .dword 0x00000020207f6000
//hXXXXXX (RD) _00000000 pm_dll_rddqs_n_8 _00000000 pm_dll_rddqs_p_8 _00000000 pm_dll_wrdqs_8 _00000000 pm_dll_wrdata_8 _00000000 pm_dll_gate_8
MC0_DDR3_CTRL_0x140: .dword 0x0003000001ff01ff
MC0_DDR3_CTRL_0x140: .dword DDR_PARAM(140, 0x0003000001ff01ff)
//00000_000 pm_pad_ocd_clk 00000_000 pm_pad_ocd_ctl 0000000_0 pm_pad_ocd_dqs 0000000_0 pm_pad_ocd_dq 0000000_0_00000000 pm_pad_enzi 0000000_0 pm_pad_en_ctl _00000000 pm_pad_en_clk
MC0_DDR3_CTRL_0x148: .dword 0x0000000000010100
//_0000 pm_pad_adj_ncode_dq _0000 pm_pad_adj_pcode_dq 00000 _0 pm_pad_outodt_dq _0 pm_pad_slewrate_dq _0 pm_pad_code_dq _0000 pm_pad_adj_ncode_dq _0000 pm_pad_adj_pcode_dq 00000 _0 pm_pad_outodt_dq _0 pm_pad_slewrate_dq _0 00000000 0000000_0 pm_pad_vref_internal 0000000_0 pm_pad_odt_se 0000000_0 pm_pad_modezi1v8
@ -371,7 +379,7 @@ MC0_DDR3_RDIMM_CTRL_0x130: .dword 0x0000000003020202
//hXXXXXX (RD) 0000000_0 pm_wrdq_clkdelay_8 0000_0000 pm_odt_oe_end_8 0000_0000 pm_odt_oe_begin_8 000000_00 pm_odt_stop_edge_8 000000_00 pm_odt_start_edge_8
MC0_DDR3_RDIMM_CTRL_0x138: .dword 0x00000020207f6000
//hXXXXXX (RD) _00000000 pm_dll_rddqs_n_8 _00000000 pm_dll_rddqs_p_8 _00000000 pm_dll_wrdqs_8 _00000000 pm_dll_wrdata_8 _00000000 pm_dll_gate_8
MC0_DDR3_RDIMM_CTRL_0x140: .dword 0x0003000001ff01ff
MC0_DDR3_RDIMM_CTRL_0x140: .dword DDR_PARAM(140, 0x0003000001ff01ff)
//00000_000 pm_pad_ocd_clk 00000_000 pm_pad_ocd_ctl 0000000_0 pm_pad_ocd_dqs 0000000_0 pm_pad_ocd_dq 0000000_0_00000000 pm_pad_enzi 0000000_0 pm_pad_en_ctl _00000000 pm_pad_en_clk
MC0_DDR3_RDIMM_CTRL_0x148: .dword 0x0000000000010100
//_0000 pm_pad_adj_ncode_dq _0000 pm_pad_adj_pcode_dq 00000 _0 pm_pad_outodt_dq _0 pm_pad_slewrate_dq _0 pm_pad_code_dq _0000 pm_pad_adj_ncode_dq _0000 pm_pad_adj_pcode_dq 00000 _0 pm_pad_outodt_dq _0 pm_pad_slewrate_dq _0 00000000 0000000_0 pm_pad_vref_internal 0000000_0 pm_pad_odt_se 0000000_0 pm_pad_modezi1v8

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