From 9259f33bd26be05f2b6ab984012a7e9943c2c924 Mon Sep 17 00:00:00 2001 From: root Date: Thu, 28 Aug 2008 10:15:28 +0800 Subject: [PATCH] enable all cs5536 serials and superio 83627 serials in pmon. --- Targets/Bonito2fdev/Bonito/start_cs5536.S | 25 ++++++-- Targets/Bonito2fdev/Bonito/tgt_machdep.c | 76 ++++++++++++++++------- include/termio.h | 1 + pmon/dev/ns16550.c | 2 +- pmon/fs/termio.c | 2 +- 5 files changed, 75 insertions(+), 31 deletions(-) diff --git a/Targets/Bonito2fdev/Bonito/start_cs5536.S b/Targets/Bonito2fdev/Bonito/start_cs5536.S index ad1f8334..bf62535a 100644 --- a/Targets/Bonito2fdev/Bonito/start_cs5536.S +++ b/Targets/Bonito2fdev/Bonito/start_cs5536.S @@ -59,12 +59,9 @@ #include "target/isapnpreg.h" -#define USE_CS5536_UART1 -#ifdef USE_CS5536_UART -//#define USE_CS5536_UART1 +#define USE_CS5536_UART1 #define USE_CS5536_UART2 -#endif #define DEBUG_LOCORE /***************************************************************/ @@ -159,7 +156,7 @@ stack = start - 0x4000 /* Place PMON stack below PMON start in RAM */ la gp, _gp GPIOLED_SET(1) - bal uncached /* Switch to uncached address space */ +// bal uncached /* Switch to uncached address space */ nop GPIOLED_SET(2) @@ -734,6 +731,13 @@ reginit: /* local name */ nop PRINTSTR("\r\n") + bnez s0,1f + nop + li a0,128 + la v0,initmips + jr v0 + nop +1: /* * Now determine DRAM configuration and size by * reading the I2C EEROM on the DIMMS @@ -1833,9 +1837,13 @@ LEAF(superio_init) // lo : bit+16 = 1 and bit = 0 #ifdef USE_CS5536_UART1 +#ifdef USE_CS5536_UART /* config uart1 as 0x2f8 */ CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x14), 0x04050003, 0x0); - +#else + /* config uart1 as 0x2e8 */ + CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x14), 0x04040003, 0x0); +#endif /* config uart1 legacy configuration */ CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x3a), 0x2, 0x0); @@ -1860,8 +1868,13 @@ LEAF(superio_init) #endif #ifdef USE_CS5536_UART2 +#ifdef USE_CS5536_UART /* config uart2 as 0x3f8 */ CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x14), 0x04700003, 0x0); +#else + /* config uart2 as 0x3e8 */ + CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x14), 0x04600003, 0x0); +#endif /* config uart2 legacy configuration */ CS5536_MSR_WRITE((CS5536_DIVIL_MSR_BASE | 0x3e), 0x2, 0x0); diff --git a/Targets/Bonito2fdev/Bonito/tgt_machdep.c b/Targets/Bonito2fdev/Bonito/tgt_machdep.c index 4ba93dd5..f14196ac 100644 --- a/Targets/Bonito2fdev/Bonito/tgt_machdep.c +++ b/Targets/Bonito2fdev/Bonito/tgt_machdep.c @@ -367,8 +367,11 @@ volatile int *p=0xbfe00108; #endif tgt_printf("memsz %d\n",memsz); /*enable float*/ -//memsz=512; tgt_fpuenable(); + +#if PCI_IDSEL_CS5536 != 0 +superio_reinit(); +#endif /* * Set up memory address decoders to map entire memory. * But first move away bootrom map to high memory. @@ -439,14 +442,6 @@ asm(\ printf("BEV in SR set to zero.\n"); -#if 0 - /* memtest */ - addr_tst1(); - addr_tst2(); - movinv1(2,0,~0); - movinv1(2,0xaa5555aa,~0xaa5555aa); - printf("memtest done\n"); -#endif if(getenv("powermg")) { @@ -600,21 +595,10 @@ outb(0xbfd0002e,0xaa); outb(0xbfd0002e,0xaa); } #endif -void -tgt_devinit() -{ -#if (PCI_IDSEL_VIA686B != 0) - SBD_DISPLAY("686I",0); - - vt82c686_init(); -#endif - -#if (PCI_IDSEL_CS5536 != 0) - SBD_DISPLAY("5536",0); - cs5536_init(); -#endif #if PCI_IDSEL_CS5536 != 0 +static void superio_reinit() +{ w83627_write(0,0x24,0xc1); w83627_write(5,0x30,1); w83627_write(5,0x60,0); @@ -626,16 +610,62 @@ w83627_write(5,0x72,0xc); w83627_write(5,0xf0,0x80); _wrmsr(GET_MSR_ADDR(0x5140001F), 0, 0);//no keyboard emulation -#ifndef USE_CS5536_UART +#ifdef USE_CS5536_UART +//w83627_UART1 +w83627_write(2,0x30,0x01); +w83627_write(2,0x60,0x03); +w83627_write(2,0x61,0xe8); +w83627_write(2,0x70,0x04); +w83627_write(2,0xf0,0x00); + +//w83627_UART2 +w83627_write(3,0x30,0x01); +w83627_write(3,0x60,0x02); +w83627_write(3,0x61,0xe8); +w83627_write(3,0x70,0x03); +w83627_write(3,0xf0,0x00); +#else +//w83627_UART1 w83627_write(2,0x30,0x01); w83627_write(2,0x60,0x03); w83627_write(2,0x61,0xf8); w83627_write(2,0x70,0x04); w83627_write(2,0xf0,0x00); + +//w83627_UART2 +w83627_write(3,0x30,0x01); +w83627_write(3,0x60,0x02); +w83627_write(3,0x61,0xf8); +w83627_write(3,0x70,0x03); +w83627_write(3,0xf0,0x00); #endif +////w83627_PALLPort +w83627_write(1,0x30,0x01); +w83627_write(1,0x60,0x03); +w83627_write(1,0x61,0x78); +w83627_write(1,0x70,0x07); +w83627_write(1,0x74,0x04); +w83627_write(1,0xf0,0xF0); +ConfigTable[0].flag=1;//reinit serial +} #endif +void +tgt_devinit() +{ +#if (PCI_IDSEL_VIA686B != 0) + SBD_DISPLAY("686I",0); + + vt82c686_init(); +#endif + +#if (PCI_IDSEL_CS5536 != 0) + SBD_DISPLAY("5536",0); + cs5536_init(); +#endif + + /* * Gather info about and configure caches. */ diff --git a/include/termio.h b/include/termio.h index 3a31c9e6..3ed9854c 100644 --- a/include/termio.h +++ b/include/termio.h @@ -114,6 +114,7 @@ typedef struct ConfigEntry { int rxqsize; int brate; unsigned long freq; + unsigned int flag; } ConfigEntry; #include "queue.h" diff --git a/pmon/dev/ns16550.c b/pmon/dev/ns16550.c index 2d7385dd..6dfc57b1 100644 --- a/pmon/dev/ns16550.c +++ b/pmon/dev/ns16550.c @@ -100,7 +100,7 @@ static int rates[] = { outb(&dp->data, brtc & 0xff); outb(&dp->ier, brtc >> 8); outb(&dp->cfcr, CFCR_8BITS); - outb(&dp->mcr, MCR_IENABLE | MCR_DTR | MCR_RTS); + outb(&dp->mcr, MCR_IENABLE/* | MCR_DTR | MCR_RTS*/); outb(&dp->ier, 0); return 0; } diff --git a/pmon/fs/termio.c b/pmon/fs/termio.c index 7491a0e9..b3e083e9 100644 --- a/pmon/fs/termio.c +++ b/pmon/fs/termio.c @@ -389,7 +389,7 @@ devinit (void) if ((s = getenv(dname)) == 0 || (brate = getbaudrate(s)) == 0) brate = q->brate; - if (brate != q->brate) { + if ((brate != q->brate)||(q->flag&1)) { if ((*p->handler)(OP_BAUD, p, NULL, brate)) { brate = q->brate; (void)(*p->handler)(OP_BAUD, p, NULL, brate);