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2.add a function set_mac to update ls7a spi mac address Change-Id: Icdf38805c6ad6fce752c69ba31773a4090a1ffa6master
wuze
6 years ago
5 changed files with 361 additions and 2 deletions
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#include <sys/queue.h> |
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#include <sys/param.h> |
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#include <sys/systm.h> |
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#include <sys/kernel.h> |
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#include <sys/malloc.h> |
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#include <sys/fcntl.h> |
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#include <sys/buf.h> |
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#include <sys/stat.h> |
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#include <sys/syslog.h> |
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#include <sys/device.h> |
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#define DEFAULT_LOOP_VARIABLE 10000 |
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#define DEFAULT_DELAY_VARIABLE 10 |
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#define GMAC0_MAC_REG_ADDR ((*(volatile unsigned int *)(0xba000000 | (0 << 16) | (3 << 11) | (0 << 8) | 0x10))) |
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#define GMAC1_MAC_REG_ADDR ((*(volatile unsigned int *)(0xba000000 | (0 << 16) | (3 << 11) | (1 << 8) | 0x10))) |
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#define Readl(Base) *(volatile unsigned int *)(Base) |
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enum GmacRegisters |
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{ |
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GmacConfig = 0x0000, /* Mac config Register */ |
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GmacFrameFilter = 0x0004, /* Mac frame filtering controls */ |
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GmacHashHigh = 0x0008, /* Multi-cast hash table high */ |
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GmacHashLow = 0x000C, /* Multi-cast hash table low */ |
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GmacGmiiAddr = 0x0010, /* GMII address Register(ext. Phy) */ |
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GmacGmiiData = 0x0014, /* GMII data Register(ext. Phy) */ |
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GmacFlowControl = 0x0018, /* Flow control Register */ |
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GmacVlan = 0x001C, /* VLAN tag Register (IEEE 802.1Q) */ |
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GmacVersion = 0x0020, /* GMAC Core Version Register */ |
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GmacWakeupAddr = 0x0028, /* GMAC wake-up frame filter adrress reg */ |
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GmacPmtCtrlStatus = 0x002C, /* PMT control and status register */ |
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GmacInterruptStatus = 0x0038, /* Mac Interrupt ststus register */ |
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GmacInterruptMask = 0x003C, /* Mac Interrupt Mask register */ |
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GmacAddr0High = 0x0040, /* Mac address0 high Register */ |
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GmacAddr0Low = 0x0044, /* Mac address0 low Register */ |
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GmacAddr1High = 0x0048, /* Mac address1 high Register */ |
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GmacAddr1Low = 0x004C, /* Mac address1 low Register */ |
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GmacAddr2High = 0x0050, /* Mac address2 high Register */ |
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GmacAddr2Low = 0x0054, /* Mac address2 low Register */ |
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GmacAddr3High = 0x0058, /* Mac address3 high Register */ |
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GmacAddr3Low = 0x005C, /* Mac address3 low Register */ |
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GmacAddr4High = 0x0060, /* Mac address4 high Register */ |
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GmacAddr4Low = 0x0064, /* Mac address4 low Register */ |
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GmacAddr5High = 0x0068, /* Mac address5 high Register */ |
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GmacAddr5Low = 0x006C, /* Mac address5 low Register */ |
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GmacAddr6High = 0x0070, /* Mac address6 high Register */ |
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GmacAddr6Low = 0x0074, /* Mac address6 low Register */ |
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GmacAddr7High = 0x0078, /* Mac address7 high Register */ |
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GmacAddr7Low = 0x007C, /* Mac address7 low Register */ |
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GmacAddr8High = 0x0080, /* Mac address8 high Register */ |
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GmacAddr8Low = 0x0084, /* Mac address8 low Register */ |
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GmacAddr9High = 0x0088, /* Mac address9 high Register */ |
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GmacAddr9Low = 0x008C, /* Mac address9 low Register */ |
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GmacAddr10High = 0x0090, /* Mac address10 high Register */ |
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GmacAddr10Low = 0x0094, /* Mac address10 low Register */ |
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GmacAddr11High = 0x0098, /* Mac address11 high Register */ |
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GmacAddr11Low = 0x009C, /* Mac address11 low Register */ |
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GmacAddr12High = 0x00A0, /* Mac address12 high Register */ |
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GmacAddr12Low = 0x00A4, /* Mac address12 low Register */ |
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GmacAddr13High = 0x00A8, /* Mac address13 high Register */ |
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GmacAddr13Low = 0x00AC, /* Mac address13 low Register */ |
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GmacAddr14High = 0x00B0, /* Mac address14 high Register */ |
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GmacAddr14Low = 0x00B4, /* Mac address14 low Register */ |
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GmacAddr15High = 0x00B8, /* Mac address15 high Register */ |
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GmacAddr15Low = 0x00BC, /* Mac address15 low Register */ |
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/*Time Stamp Register Map*/ |
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GmacTSControl = 0x0700, /* Controls the Timestamp update logic : only when IEEE 1588 time stamping is enabled in corekit */ |
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GmacTSSubSecIncr = 0x0704, /* 8 bit value by which sub second register is incremented : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSHigh = 0x0708, /* 32 bit seconds(MS) : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSLow = 0x070C, /* 32 bit nano seconds(MS) : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSHighUpdate = 0x0710, /* 32 bit seconds(MS) to be written/added/subtracted : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSLowUpdate = 0x0714, /* 32 bit nano seconds(MS) to be writeen/added/subtracted : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSAddend = 0x0718, /* Used by Software to readjust the clock frequency linearly : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSTargetTimeHigh = 0x071C, /* 32 bit seconds(MS) to be compared with system time : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSTargetTimeLow = 0x0720, /* 32 bit nano seconds(MS) to be compared with system time : only when IEEE 1588 time stamping without external timestamp input */ |
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GmacTSHighWord = 0x0724, /* Time Stamp Higher Word Register (Version 2 only); only lower 16 bits are valid */ |
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//GmacTSHighWordUpdate = 0x072C, /* Time Stamp Higher Word Update Register (Version 2 only); only lower 16 bits are valid */
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GmacTSStatus = 0x0728, /* Time Stamp Status Register */ |
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}; |
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/**********************************************************
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* GMAC DMA registers |
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* For Pci based system address is BARx + GmaDmaBase |
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* For any other system translation is done accordingly |
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**********************************************************/ |
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enum DmaRegisters |
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{ |
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DmaBusMode = 0x0000, /* CSR0 - Bus Mode Register */ |
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DmaTxPollDemand = 0x0004, /* CSR1 - Transmit Poll Demand Register */ |
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DmaRxPollDemand = 0x0008, /* CSR2 - Receive Poll Demand Register */ |
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DmaRxBaseAddr = 0x000C, /* CSR3 - Receive Descriptor list base address */ |
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DmaTxBaseAddr = 0x0010, /* CSR4 - Transmit Descriptor list base address */ |
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DmaStatus = 0x0014, /* CSR5 - Dma status Register */ |
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DmaControl = 0x0018, /* CSR6 - Dma Operation Mode Register */ |
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DmaInterrupt = 0x001C, /* CSR7 - Interrupt enable */ |
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DmaMissedFr = 0x0020, /* CSR8 - Missed Frame & Buffer overflow Counter */ |
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DmaTxCurrDesc = 0x0048, /* - Current host Tx Desc Register */ |
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DmaRxCurrDesc = 0x004C, /* - Current host Rx Desc Register */ |
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DmaTxCurrAddr = 0x0050, /* CSR20 - Current host transmit buffer address */ |
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DmaRxCurrAddr = 0x0054, /* CSR21 - Current host receive buffer address */ |
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}; |
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enum GmacGmiiAddrReg |
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{ |
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GmiiDevMask = 0x0000F800, /* (PA)GMII device address 15:11 RW 0x00 */ |
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GmiiDevShift = 11, |
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GmiiRegMask = 0x000007C0, /* (GR)GMII register in selected Phy 10:6 RW 0x00 */ |
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GmiiRegShift = 6, |
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GmiiCsrClkMask = 0x0000001C, /*CSR Clock bit Mask 4:2 */ |
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GmiiCsrClk5 = 0x00000014, /* (CR)CSR Clock Range 250-300 MHz 4:2 RW 000 */ |
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GmiiCsrClk4 = 0x00000010, /* 150-250 MHz */ |
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GmiiCsrClk3 = 0x0000000C, /* 35-60 MHz */ |
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GmiiCsrClk2 = 0x00000008, /* 20-35 MHz */ |
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GmiiCsrClk1 = 0x00000004, /* 100-150 MHz */ |
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GmiiCsrClk0 = 0x00000000, /* 60-100 MHz */ |
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GmiiWrite = 0x00000002, /* (GW)Write to register 1 RW */ |
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GmiiRead = 0x00000000, /* Read from register 0 */ |
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GmiiBusy = 0x00000001, /* (GB)GMII interface is busy 0 RW 0 */ |
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}; |
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unsigned int gmac_read(unsigned long long base, unsigned int reg) |
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{ |
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unsigned long long addr; |
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unsigned int data; |
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addr = base + (unsigned long long)reg; |
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data = Readl(addr); |
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return data; |
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} |
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void gmac_write(unsigned long long base, unsigned int reg, unsigned int data) |
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{ |
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unsigned long long addr; |
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addr = base + (unsigned long long)reg; |
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Readl(addr) = data; |
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return; |
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} |
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int gmac_phy_read(unsigned long long base,unsigned int PhyBase, unsigned int reg, unsigned short * data ) |
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{ |
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unsigned int addr; |
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unsigned int loop_variable; |
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addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((reg << GmiiRegShift) & GmiiRegMask) | GmiiCsrClk3; |
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addr = addr | GmiiBusy ; |
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gmac_write(base,GmacGmiiAddr,addr); |
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for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ |
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if (!(gmac_read(base,GmacGmiiAddr) & GmiiBusy)){ |
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break; |
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} |
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int i = DEFAULT_DELAY_VARIABLE; |
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while (i--); |
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} |
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if(loop_variable < DEFAULT_LOOP_VARIABLE) |
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* data = (unsigned short)(gmac_read(base,GmacGmiiData) & 0xFFFF); |
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else{ |
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printf( "\rError::: PHY not responding Busy bit didnot get cleared !!!!!!\n"); |
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return -2; |
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} |
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return 0; |
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} |
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int gmac_phy_write(unsigned long long base, unsigned int PhyBase, unsigned int reg, unsigned short data) |
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{ |
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unsigned int addr; |
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unsigned int loop_variable; |
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gmac_write(base,GmacGmiiData,data); |
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addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((reg << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3; |
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addr = addr | GmiiBusy ; |
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gmac_write(base,GmacGmiiAddr,addr); |
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for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){ |
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if (!(gmac_read(base,GmacGmiiAddr) & GmiiBusy)){ |
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break; |
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} |
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int i = DEFAULT_DELAY_VARIABLE; |
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while (i--); |
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} |
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if(loop_variable < DEFAULT_LOOP_VARIABLE){ |
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return 0; |
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} |
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else{ |
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printf( "\rError::: PHY not responding Busy bit didnot get cleared !!!!!!\n"); |
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return -1; |
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} |
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} |
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unsigned int synop_GMAC_set_mac_addr(unsigned long long mac_base, unsigned int MacHigh, unsigned int MacLow, unsigned char *MacAddr) |
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{ |
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unsigned int data; |
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data = (MacAddr[5] << 8) | MacAddr[4]; |
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gmac_phy_write(mac_base,16,MacHigh,data); |
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data = (MacAddr[3] << 24) | (MacAddr[2] << 16) | (MacAddr[1] << 8) | MacAddr[0] ; |
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gmac_phy_write(mac_base,16,MacLow,data); |
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return 0; |
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} |
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void gmac_mac_setting(unsigned short id,unsigned long long mac_base) |
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{ |
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unsigned char mac_addr0[6] = {0}; |
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extern void ls7a_spi_read_mac(unsigned char * Inbuf,int num); |
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extern unsigned char mac_read_spi_buf[22]; |
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ls7a_spi_read_mac(mac_read_spi_buf,id); |
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if(id == 0) |
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memcpy(mac_addr0,mac_read_spi_buf,6); |
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else if(id == 1) |
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memcpy(mac_addr0,mac_read_spi_buf + 16,6); |
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synop_GMAC_set_mac_addr(mac_base,GmacAddr0High,GmacAddr0Low,mac_addr0); |
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} |
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void gmac_mac_init() |
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{ |
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unsigned short data; |
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unsigned short id; |
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unsigned long long mac_base; |
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struct device *dev; |
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unsigned int exists_syn0 = 0,exists_syn1 = 0; |
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TAILQ_FOREACH(dev,&alldevs,dv_list){ |
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if ((strcmp(dev->dv_xname,"syn0") == 0)) |
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exists_syn0 = 1; |
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if ((strcmp(dev->dv_xname,"syn1") == 0)) |
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exists_syn1 = 1; |
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} |
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if(exists_syn0 && exists_syn1) |
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return; |
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for (id = 0;id < 2;id++) { |
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if (id == 0) |
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mac_base = ((GMAC0_MAC_REG_ADDR & (~0xf)) | 0x80000000); |
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else if (id == 1) |
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mac_base = ((GMAC1_MAC_REG_ADDR & (~0xf)) | 0x80000000); |
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gmac_phy_read(mac_base,16,0x14,&data); |
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data = data | 0x82; |
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gmac_phy_write(mac_base,16,0x14,data); |
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gmac_phy_read(mac_base,16,0x00,&data); |
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data = data | 0x8000; |
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gmac_phy_write(mac_base,16,0x00,data); |
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gmac_mac_setting(id,mac_base); |
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} |
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} |
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