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change mem freq info print 

new board use define print_mem_freq to override the default
print_mem_freq in pmon/common/main.c

Change-Id: I78428515e2f8e9448f809447d5dfa57fa19f901b
master
Huang Pei 10 years ago
parent
a13c95949c
commit
acb5847b15
2 changed files with 112 additions and 61 deletions
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  1. 61
      Targets/Bonito3a8780e/Bonito/tgt_machdep.c
  2. 112
      pmon/common/main.c

61
Targets/Bonito3a8780e/Bonito/tgt_machdep.c
View File

@ -2324,3 +2324,64 @@ struct efi_memory_map_loongson * init_memory_map()
return emap;
#undef EMAP_ENTRY
}
#define HW_CONFIG 0xbfe00180
#define HW_SAMPLE 0xbfe00190
#define HT_MEM_PLL 0xbfe001c0
static inline int mem_is_hw_bypassed()
{
int32_t hw_sample = readl(HW_SAMPLE + 0x4);
return ((hw_sample >> 5) & 0x1f) == 0x1f;
}
static inline int mem_is_sw_setup()
{
int32_t hw_sample = readl(HW_SAMPLE + 0x4);
return ((hw_sample >> 5) & 0x1f) == 0x0f;
}
static inline int mem_hw_freq_mul()
{
int32_t hw_mul = (readl(HW_SAMPLE + 0x4) >> 5) & 0xf;
return hw_mul + 30;
}
static inline int mem_hw_freq_div()
{
int32_t hw_div = (readl(HW_SAMPLE + 0x4) >> 9) & 0x1;
return hw_div + 3;
}
static inline int mem_sw_freq_mul()
{
int32_t sw_mul = (readl(HT_MEM_PLL) >> 14) & 0x3ff;
return sw_mul;
}
static inline int mem_sw_freq_div()
{
int32_t sw_div = (readl(HT_MEM_PLL) >> 24) & 0x3f;
return sw_div;
}
void print_mem_freq(void)
{
int mem_ref_clock = 33; /* int Mhz */
printf("\n");
if ( mem_is_hw_bypassed()) {
printf("hw bypassed! mem@ %dMhz\n", mem_ref_clock);
return;
}
if (!mem_is_sw_setup())
printf("hw selected! mem@ %dMhz\n", (mem_hw_freq_mul() * mem_ref_clock)/mem_hw_freq_div());
else
printf("sw selected! mem@ %dMhz\n", (mem_sw_freq_mul() * mem_ref_clock)/mem_sw_freq_div());
}

112
pmon/common/main.c
View File

@ -76,6 +76,7 @@ unsigned int show_menu;
#include "../cmds/bootparam.h"
void print_mem_freq(void);
extern int bios_available;
extern int cmd_main_mutex;
extern int ohci_index;
@ -766,9 +767,6 @@ void
dbginit (char *adr)
{
unsigned long long memsize, freq;
int memfreq,clk,clk30,clk4, clk20, clk34, mem_vco;
unsigned short div_refc, div_loopc, div_out;
char fs[10], *fp;
char *s;
@ -852,64 +850,8 @@ dbginit (char *adr)
fp[1] = fp[0];
fp[0] = '.';
printf (" %s MHz", fs);
clk = get_mem_clk();
#if defined(LOONGSON_3BSINGLE) || defined (LOONGSON_3BSERVER)
/*for 3c/3b1500 ddr control*/
if(clk != 0xf)
{
#ifndef LOONGSON_3B1500
clk20 = clk & 0x07;
clk34 = (clk >> 3) & 0x03;
mem_vco = 100 * (20 + clk20 * 2 + (clk20 == 7) * 2) / 3;
memfreq = mem_vco / (1 << (clk34 + 1));
#else
if ((clk & 0x8) == 0x0) { /* set ddr frequency by software */
div_refc = ((*(volatile unsigned int *)(0xbfe001c0)) >> 8) & 0x3f;
div_loopc = ((*(volatile unsigned int *)(0xbfe001c0)) >> 14 ) & 0x3ff;
div_out = ((*(volatile unsigned int *)(0xbfe001c0)) >> 24) & 0x3f;
memfreq = ((100 / div_refc) * div_loopc) / div_out / 3;
} else { /* set ddr frequency by hareware */
clk20 = clk & 0x07;
clk34 = (clk >> 3) & 0x03;
mem_vco = 100 * (20 + clk20 * 2 + (clk20 == 7) * 2) / 3;
memfreq = mem_vco / (1 << (clk34 + 1));
}
printf("/ Bus @ %d MHz\n",memfreq);
#endif
}
else
printf("/ Bus @ 33 MHz\n");
#else /*for 3a/3b ddr controller */
if(clk != 0x1f)
{
clk30 = clk & 0x0f;
clk4 = (clk >> 4) & 0x01;
memfreq = 100*(clk30 + 30)/(clk4 + 3)/3;/*to calculate memory frequency.we can find this function in loongson 3A manual,memclk*(clksel[8:5]+30)/(clksel[9]+3)*/
printf("/ Bus @ %d MHz\n",memfreq);
}
else
printf("/ Bus @ 33 MHz\n");
#endif
/*
memorysize_total = ((memsize + memorysize_high + (16 << 20)) >> 20);
#ifdef MULTI_CHIP
if(memorysize_high_n1 == 0)
memorysize_total += (memorysize_high_n1 >> 20);
else
memorysize_total += ((memorysize_high_n1 + (256 << 20)) >> 20);
#endif
#ifdef DUAL_3B
if(memorysize_high_n2 != 0 && memorysize_high_n3 == 0)
memorysize_total += ((memorysize_high_n2 + (256 << 20)) >> 20);
else if(memorysize_high_n2 == 0 && memorysize_high_n3 != 0)
memorysize_total += ((memorysize_high_n3 + (256 << 20)) >> 20);
else if(memorysize_high_n2 !=0 && memorysize_high_n3 != 0)
memorysize_total += ((memorysize_high_n2 + (256 << 20) + memorysize_high_n3 + (256 << 20)) >> 20);
#endif
*/
print_mem_freq();
printf ("Memory size %lld MB .\n", memorysize_total);
@ -1197,3 +1139,51 @@ void get_memorysize(unsigned long long raw_memsz) {
#endif
*/
}
/* default mem freq print, overrided by board print_mem_freq() */
void __attribute__((weak)) print_mem_freq(void)
{
int memfreq,clk,clk30,clk4, clk20, clk34, mem_vco;
unsigned short div_refc, div_loopc, div_out;
clk = get_mem_clk();
#if defined(LOONGSON_3BSINGLE) || defined (LOONGSON_3BSERVER)
/*for 3c/3b1500 ddr control*/
if(clk != 0xf)
{
#ifndef LOONGSON_3B1500
clk20 = clk & 0x07;
clk34 = (clk >> 3) & 0x03;
mem_vco = 100 * (20 + clk20 * 2 + (clk20 == 7) * 2) / 3;
memfreq = mem_vco / (1 << (clk34 + 1));
#else
if ((clk & 0x8) == 0x0) { /* set ddr frequency by software */
div_refc = ((*(volatile unsigned int *)(0xbfe001c0)) >> 8) & 0x3f;
div_loopc = ((*(volatile unsigned int *)(0xbfe001c0)) >> 14 ) & 0x3ff;
div_out = ((*(volatile unsigned int *)(0xbfe001c0)) >> 24) & 0x3f;
memfreq = ((100 / div_refc) * div_loopc) / div_out / 3;
} else { /* set ddr frequency by hareware */
clk20 = clk & 0x07;
clk34 = (clk >> 3) & 0x03;
mem_vco = 100 * (20 + clk20 * 2 + (clk20 == 7) * 2) / 3;
memfreq = mem_vco / (1 << (clk34 + 1));
}
printf("/ Bus @ %d MHz\n",memfreq);
#endif
}
else
printf("/ Bus @ 33 MHz\n");
#else /*for 3a/3b ddr controller */
if(clk != 0x1f)
{
clk30 = clk & 0x0f;
clk4 = (clk >> 4) & 0x01;
memfreq = 100*(clk30 + 30)/(clk4 + 3)/3;/*to calculate memory frequency.we can find this function in loongson 3A manual,memclk*(clksel[8:5]+30)/(clksel[9]+3)*/
printf("/ Bus @ %d MHz\n",memfreq);
}
else
printf("/ Bus @ 33 MHz\n");
#endif
}

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