1. Move defination CHECK_ARB_LEVEL_DIMM into AUTO_DDR_CONFIG for smarter code.

2. Add a #if/#endif for easier debug.

Targets/Bonito2gq2h/Bonito/start.S

@@ -1231,7 +1231,9 @@ after_ht:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 //#define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR
@@ -2604,11 +2606,7 @@ watchdog_enable:
 #######################################
 #include "ddr_dir/ddr_config.S"
 #ifdef ARB_LEVEL
-#ifdef DDR3_DIMM
 #include "ddr_dir/ARB_level_new.S"
-#else
-#include "ddr_dir/ARB_level.S"
-#endif
 #endif
 #ifdef  DEBUG_DDR
 #include "ddr_dir/Test_Mem.S"

Targets/Bonito2gq780e/Bonito/start.S

@@ -1348,7 +1348,9 @@ gs_2f_v3_ddr2_cfg:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 //#define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR
@@ -3006,11 +3008,7 @@ cache_init_finish:
 #######################################
 #include "ddr_dir/ddr_config.S"
 #ifdef ARB_LEVEL
-#ifdef DDR3_DIMM
 #include "ddr_dir/ARB_level_new.S"
-#else
-#include "ddr_dir/ARB_level.S"
-#endif
 #endif
 #ifdef  DEBUG_DDR
 #include "ddr_dir/Test_Mem.S"

Targets/Bonito3a2h/Bonito/start.S

@@ -1212,7 +1212,9 @@ after_ht:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 #define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR
@@ -2620,11 +2622,7 @@ watchdog_enable:
 #######################################
 #include "ddr_dir/ddr_config.S"
 #ifdef ARB_LEVEL
-#ifdef DDR3_DIMM
 #include "ddr_dir/ARB_level_new.S"
-#else
-#include "ddr_dir/ARB_level.S"
-#endif
 #endif
 #ifdef  DEBUG_DDR
 #include "ddr_dir/Test_Mem.S"

Targets/Bonito3a780e/Bonito/start.S

@@ -1203,7 +1203,9 @@ wait_scache_out:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 #define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR
@@ -2895,11 +2897,7 @@ slave_inter_loop:
 #######################################
 #include "ddr_dir/ddr_config.S"
 #ifdef ARB_LEVEL
-#ifdef DDR3_DIMM
 #include "ddr_dir/ARB_level_new.S"
-#else
-#include "ddr_dir/ARB_level.S"
-#endif
 #endif
 #ifdef  DEBUG_DDR
 #include "ddr_dir/Test_Mem.S"

Targets/Bonito3aserver/Bonito/start.S

@@ -1336,7 +1336,9 @@ gs_2f_v3_ddr2_cfg:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 #define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR
@@ -3832,11 +3834,7 @@ idle1000:
 
 #include "ddr_dir/ddr_config.S"
 #ifdef ARB_LEVEL
-#ifdef DDR3_DIMM
 #include "ddr_dir/ARB_level_new.S"
-#else
-#include "ddr_dir/ARB_level.S"
-#endif
 #endif
 #ifdef  DEBUG_DDR
 #include "ddr_dir/Test_Mem.S"

Targets/Bonito3b780e/Bonito/start.S

@@ -1755,7 +1755,9 @@ gs_2f_v3_ddr2_cfg:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 #define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR

Targets/Bonito3bserver/Bonito/start.S

@@ -1317,7 +1317,9 @@ gs_2f_v3_ddr2_cfg:
 #endif
 #ifdef  AUTO_ARB_LEVEL
 #define CHECK_ARB_LEVEL_FREQ
+#ifdef  AUTO_DDR_CONFIG
 #define CHECK_ARB_LEVEL_DIMM
+#endif
 //#define DEBUG_AUTO_ARB_LEVEL
 #endif
 //#define DEBUG_DDR

pmon/arch/mips/mm/3B_ddr_config.S

@@ -214,6 +214,7 @@ ddr2_config:
     or      a2, a2, a1
     sd      a2, ADDRESS_MIRROR_ADDR(t8)
 
+#if 1
     //reconfig ODT map
     //set default first
     dli     a2, 0x0804020100000000
@@ -349,6 +350,7 @@ ddr2_config:
     and     a1, a1, a2
     sd      a1, MR2_DATA_3_ADDR(t8)
 2:
+#endif
 
     //set data bus width
     ld      a2, REDUC_ADDR(t8)

pmon/arch/mips/mm/ddr_config.S

@@ -202,6 +202,7 @@ ddr2_config:
     or      a2, a2, a1
     sd      a2, ADDRESS_MIRROR_ADDR(t8)
 
+#if 1
     //reconfig ODT map
     //set default first
     dli     a2, 0x0804020100000000
@@ -337,6 +338,7 @@ ddr2_config:
     and     a1, a1, a2
     sd      a1, MR2_DATA_3_ADDR(t8)
 2:
+#endif
 
     //set data bus width
     ld      a2, REDUC_ADDR(t8)