From c0a06f5e4044c8c27e7de6f661b2f863e39a0165 Mon Sep 17 00:00:00 2001 From: LI Wengang Date: Thu, 12 Aug 2010 16:09:17 +0800 Subject: [PATCH] Set HT controller to 800MHz. Set HT controller to 800MHz. --- .../Bonito3a780e/Bonito/loongson3_HT_init.S | 261 +++++++----------- Targets/Bonito3a780e/pci/rs780_cmn.h | 2 +- 2 files changed, 107 insertions(+), 156 deletions(-) diff --git a/Targets/Bonito3a780e/Bonito/loongson3_HT_init.S b/Targets/Bonito3a780e/Bonito/loongson3_HT_init.S index ccee3d72..eeabe6c8 100644 --- a/Targets/Bonito3a780e/Bonito/loongson3_HT_init.S +++ b/Targets/Bonito3a780e/Bonito/loongson3_HT_init.S @@ -7,9 +7,9 @@ ###################################################### #define HT_32bit_TRANS #define WITH_HT -//#define HT_800M +#define HT_800M //#define HT_16bit -//#define HT_RECONNECT +#define HT_RECONNECT //#define HT_REG_TRANS ###################################################### @@ -17,10 +17,9 @@ TTYDBG("32 bit PCI space translate to 64 bit HT space\r\n") dli t0, 0x900000003ff02000 - dli t2, 0x900000003ff02800 + dli t2, 0x900000003ff02700 1: -#if 1 //map HT: PCI IO : 0x90000efd_fc000000 --> 0x18000000 //map 0x90000efd_fd000000 --> 0x19000000 //map HT: PCI CFG: 0x90000efd_fe000000 --> 0x1a000000 @@ -83,72 +82,6 @@ bne t0, t2, 1b nop -#else -/******************************************/ -##################################### LEVEL-1 XBAR : CPU ######################################### -###HT CFG : TYPE 0: -###map 0x90000efd_fe000000 --> 0x1fe80000, size 0x00080000 - dli t1, 0x000000001fe80000 - sd t1, 0x0(t0) - dli t1, 0xfffffffffff80000 - sd t1, 0x40(t0) - dli t1, 0x00000efdfe0000f7 - sd t1, 0x80(t0) -###HT CFG : TYPE 1: -###map 0x90000efd_ff000000 --> 0x1e000000, size 0x01000000 - dli t1, 0x000000001e000000 - sd t1, 0x8(t0) - dli t1, 0xffffffffff000000 - sd t1, 0x48(t0) - dli t1, 0x00000efdff0000f7 - sd t1, 0x88(t0) - -###HT LOW MEM -###map 0x90000e00_00000000 --> 0x10000000, size 0x04000000 - dli t1, 0x0000000010000000 - sd t1, 0x10(t0) - dli t1, 0xfffffffffc000000 - sd t1, 0x50(t0) - dli t1, 0x00000e00000000f7 - sd t1, 0x90(t0) - -###HT HIGH MEM -###map 0x90000e00_10000000 --> 0x14000000, size 0x04000000 - dli t1, 0x0000000014000000 - sd t1, 0x18(t0) - dli t1, 0xfffffffffc000000 - sd t1, 0x58(t0) - dli t1, 0x00000e00140000f7 - sd t1, 0x98(t0) - -###HT IO -###map 0x90000efd_fc000000 --> 0x1fd00000, size 0x01000000 - dli t1, 0x000000001fd00000 - sd t1, 0x20(t0) - dli t1, 0xfffffffffff00000 - sd t1, 0x60(t0) - dli t1, 0x00000efdfc0000f7 - sd t1, 0xa0(t0) - -###HT BRIDGE CFG -###map 0x90000efd_fb000000 --> 0x1b000000, size 0x01000000 - dli t1, 0x000000001b000000 - sd t1, 0x28(t0) - dli t1, 0xffffffffff000000 - sd t1, 0x68(t0) - dli t1, 0x00000efdfb0000f7 - sd t1, 0xa8(t0) - -### ANY ELSE DEFAULY MEMORY -### Mapping 0x0 ---> 0x0, size 0x00001000_00000000 - - daddiu t0, t0, 0x100 - bne t0, t2, 1b - nop - - -/******************************************/ -#endif #endif @@ -666,8 +599,8 @@ ht_next_id : dli t0, 0x90000efdfe000000 #li t1, 0x01 //DRIVER 16bit li t1, 0x11 - sb t1, 0x4b(t0) - lw a0, 0x48(t0) + sb t1, 0xcb(t0) + lw a0, 0xc8(t0) bal hexserial nop TTYDBG("\r\n") @@ -676,8 +609,10 @@ ht_next_id : //li t0, 0xba000000 dli t0, 0x90000efdfe000000 li t1, 0x00 - sb t1, 0x4b(t0) - lw a0, 0x48(t0) + sync + sb t1, 0xcb(t0) + sync + lw a0, 0xc8(t0) bal hexserial nop TTYDBG("\r\n") @@ -690,126 +625,140 @@ ht_next_id : dli t0, 0x90000efdfe000000 #li t1, 0x2 //Frequency : 400Mhz li t1, 0x5 //Frequency : 800Mhz - sb t1, 0x51(t0) - lw a0, 0x4c(t0) - bal hexserial - nop - TTYDBG("\r\n") + sync + sb t1, 0xd1(t0) + sync + lw a0, 0xd0(t0) + sync #endif #if 1 //Watch dog Trying TTYDBG("Setting Watch Dog to make a WARM RESET\r\n") -#ifdef WD_DEBUG - TTYDBG("Setting Watch dog BAR\r\n") - nop - //li t0, 0xba00096c - dli t0, 0x90000efdfe00096c - lw a0, 0(t0) - bal hexserial - nop - TTYDBG("\r\n") -#endif - //li t0, 0xba00096c - dli t0, 0x90000efdfe00096c - li a0, 0x00001000 - sw a0, 0(t0) + li t1, 10 +//#define WD_DEBUG + TTYDBG("Watch dog Enable\r\n") + dli t0, 0x90000efdfc000cd6 + li a0, 0x00000069 + sync + sb a0, 0(t0) + sync + li a0, 0x00000000 + sb a0, 1(t0) + sync + lb a0, 1(t0) + sync + //bal hexserial + nop + TTYDBG("\r\n") + nop + dli t0, 0x90000efdfc000cd6 + li a0, 0x0000006c + sb a0, 0(t0) + li a0, 0x00000000 + sb a0, 1(t0) + nop + li a0, 0x0000006d + sb a0, 0(t0) + li a0, 0x00000000 + sb a0, 1(t0) + nop + li a0, 0x0000006e + sb a0, 0(t0) + li a0, 0x00000001 + sb a0, 1(t0) + nop + li a0, 0x0000006f + sb a0, 0(t0) + li a0, 0x00000000 + sb a0, 1(t0) nop #ifdef WD_DEBUG - lw a0, 0(t0) + lb a0, 1(t0) bal hexserial nop TTYDBG("\r\n") +#endif - li t0, 0xb0001000 - lw a0, 0x0(t0) +#ifdef WD_DEBUG + lb a0, 1(t0) bal hexserial - nop + nop TTYDBG("\r\n") - TTYDBG("Watch dog Disable\r\n") - //li t0, 0xba0009e8 - dli t0, 0x90000efdfe0009e8 - lw a0, 0(t0) + TTYDBG("Watch dog base value\r\n") + li a0, 0x00000069 + sb a0, 0(t0) + lb a0, 1(t0) bal hexserial - nop + nop TTYDBG("\r\n") - lw a0, 0(t0) - li a1, 0x04000000 - or a0, a0, a1 - - sw a0, 0(t0) - nop - lw a0, 0(t0) + li a0, 0x0000006c + sb a0, 0(t0) + lb a0, 1(t0) bal hexserial - nop + nop TTYDBG("\r\n") - li t0, 0xb0001000 - lw a0, 0x0(t0) + li a0, 0x0000006d + sb a0, 0(t0) + lb a0, 1(t0) bal hexserial nop TTYDBG("\r\n") - - TTYDBG("Watch dog Enable\r\n") - //li t0, 0xba0009e8 - dli t0, 0x90000efdfe0009e8 - lw a0, 0(t0) + li a0, 0x0000006e + sb a0, 0(t0) + lb a0, 1(t0) bal hexserial - nop + nop TTYDBG("\r\n") -#endif - //li t0, 0xba0009e8 - dli t0, 0x90000efdfe0009e8 - lw a0, 0(t0) - li a1, 0xfbffffff - and a0, a0, a1 - - sw a0, 0(t0) - nop -#ifdef WD_DEBUG - lw a0, 0(t0) + li a0, 0x0000006f + sb a0, 0(t0) + lb a0, 1(t0) bal hexserial nop TTYDBG("\r\n") - li t0, 0xb0001000 - lw a0, 0x0(t0) +#endif + TTYDBG("Watch dog decode enable\r\n") + dli t0, 0x90000efdfe00a041 + li a0, 0xff + sb a0, 0(t0) + lb a0, 0(t0) bal hexserial nop TTYDBG("\r\n") - TTYDBG("Watch dog counter value\r\n") - li t0, 0xb0001000 - lw a0, 0x8(t0) + TTYDBG("Watch dog control value\r\n") + dli t0, 0x90000e0000010000 + sync + lw a0, 0(t0) bal hexserial nop TTYDBG("\r\n") -#endif - li t0, 0xb0001000 - li a0, 0x1 - sw a0, 0x8(t0) - - TTYDBG("Watch dog begin to work\r\n") - li t0, 0xb0001000 - li t1, 0x1 - sw t1, 0(t0) - li t1, 0x81 - sw t1, 0(t0) - li t0, 0xb0001000 - lw a0, 0x0(t0) + sync + lw a0, 4(t0) bal hexserial nop TTYDBG("\r\n") + TTYDBG("Set Watch dog control value\r\n") + li a0, 0x15 + sw a0, 4(t0) + nop + li a0, 0x01 + sw a0, 0(t0) + nop + li a0, 0x81 + sw a0, 0(t0) + nop - TTYDBG("Watch dog counter value\r\n") - li t0, 0xb0001000 - li t1, 0x1 +#if 0 1: - lw a0, 0x8(t0) + lw a0, 4(t0) bal hexserial nop TTYDBG("\r\n") - lw a0, 0x8(t0) + lb a0, 4(t0) bne a0, t1, 1b nop +#endif #endif @@ -882,9 +831,11 @@ ht_next_id : //li t0, 0xba000000 dli t0, 0x90000efdfe000000 li t1, 0x00 - sb t1, 0x4b(t0) - lw a0, 0x48(t0) - bal hexserial + sync + sb t1, 0xd1(t0) + sync + lw a0, 0xd0(t0) + sync nop TTYDBG("\r\n") //li t1, 0x0 diff --git a/Targets/Bonito3a780e/pci/rs780_cmn.h b/Targets/Bonito3a780e/pci/rs780_cmn.h index 2f703797..080682ef 100644 --- a/Targets/Bonito3a780e/pci/rs780_cmn.h +++ b/Targets/Bonito3a780e/pci/rs780_cmn.h @@ -43,7 +43,7 @@ void _pci_conf_writen(device_t tag, int reg, u32 data,int width); extern int printf (const char *fmt, ...); -#define DAWNINGBLADE_DEBUG +//#define DAWNINGBLADE_DEBUG #ifdef DAWNINGBLADE_DEBUG #define printk_emerg(fmt, arg...) printf(fmt, ##arg) #define printk_alert(fmt, arg...) printf(fmt, ##arg)