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add sm712 support 

git-svn-id: file:///svn/pmon-all/pmon-all@88 214b0138-1524-0410-9122-e5cb4b5bc56c
master
root 18 years ago
parent
7417914b30
commit
c2ce8aee46
6 changed files with 921 additions and 1348 deletions
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  1. 50
      Targets/Bonito2edev/Bonito/tgt_machdep.c
  2. 165
      Targets/Bonito2edev/conf/Bonito.smi
  3. 1
      conf/files
  4. 1347
      lib/libc/Makefile
  5. 181
      sys/dev/pci/smi712.c
  6. 525
      sys/dev/pci/smi712.h

50
Targets/Bonito2edev/Bonito/tgt_machdep.c
View File

@ -65,9 +65,12 @@
#include "mod_x86emu_int10.h" #include "mod_x86emu_int10.h"
#include "mod_x86emu.h" #include "mod_x86emu.h"
#include "mod_vgacon.h" #include "mod_vgacon.h"
#include "mod_framebuffer.h"
#include "mod_smi.h"
#if (NMOD_X86EMU_INT10 > 0)||(NMOD_X86EMU >0) #if (NMOD_X86EMU_INT10 > 0)||(NMOD_X86EMU >0)
extern void vga_bios_init(void); extern void vga_bios_init(void);
#endif #endif
extern int radeon_init(void);
extern int kbd_initialize(void); extern int kbd_initialize(void);
extern int write_at_cursor(char val); extern int write_at_cursor(char val);
extern const char *kbd_error_msgs[]; extern const char *kbd_error_msgs[];
@ -83,7 +86,7 @@ extern const char *kbd_error_msgs[];
#if (NMOD_X86EMU_INT10 == 0)&&(NMOD_X86EMU == 0) #if (NMOD_X86EMU_INT10 == 0)&&(NMOD_X86EMU == 0)
int vga_available=0; int vga_available=0;
#else #else
#include "vgarom.c" //#include "vgarom.c"
#endif #endif
extern struct trapframe DBGREG; extern struct trapframe DBGREG;
@ -107,6 +110,7 @@ void nvram_put(char *);
#endif #endif
extern int vgaterm(int op, struct DevEntry * dev, unsigned long param, int data); extern int vgaterm(int op, struct DevEntry * dev, unsigned long param, int data);
extern int fbterm(int op, struct DevEntry * dev, unsigned long param, int data);
void error(unsigned long *adr, unsigned long good, unsigned long bad); void error(unsigned long *adr, unsigned long good, unsigned long bad);
void modtst(int offset, int iter, unsigned long p1, unsigned long p2); void modtst(int offset, int iter, unsigned long p1, unsigned long p2);
void do_tick(void); void do_tick(void);
@ -128,7 +132,11 @@ ConfigEntry ConfigTable[] =
{ (char *)COM3_BASE_ADDR, 0, ns16550, 256, CONS_BAUD, NS16550HZ }, { (char *)COM3_BASE_ADDR, 0, ns16550, 256, CONS_BAUD, NS16550HZ },
#endif #endif
#if NMOD_VGACON >0 #if NMOD_VGACON >0
#if NMOD_FRAMEBUFFER >0
{ (char *)1, 0, fbterm, 256, CONS_BAUD, NS16550HZ },
#else
{ (char *)1, 0, vgaterm, 256, CONS_BAUD, NS16550HZ }, { (char *)1, 0, vgaterm, 256, CONS_BAUD, NS16550HZ },
#endif
#endif #endif
{ 0 } { 0 }
}; };
@ -311,16 +319,56 @@ unsigned int addr;
extern void vt82c686_init(void); extern void vt82c686_init(void);
int psaux_init(void); int psaux_init(void);
extern int fb_init(unsigned long,unsigned long);
void void
tgt_devconfig() tgt_devconfig()
{ {
#if NMOD_VGACON > 0 #if NMOD_VGACON > 0
int rc; int rc;
#if NMOD_FRAMEBUFFER > 0
unsigned long fbaddress,ioaddress;
extern struct pci_device *vga_dev;
#endif
#endif #endif
_pci_devinit(1); /* PCI device initialization */ _pci_devinit(1); /* PCI device initialization */
#if (NMOD_X86EMU_INT10 > 0)||(NMOD_X86EMU >0) #if (NMOD_X86EMU_INT10 > 0)||(NMOD_X86EMU >0)
SBD_DISPLAY("VGAI", 0); SBD_DISPLAY("VGAI", 0);
vga_bios_init(); vga_bios_init();
#endif
#if (NMOD_X86EMU_INT10 == 0 && defined(RADEON7000))
SBD_DISPLAY("VGAI", 0);
rc = radeon_init();
#endif
#if NMOD_FRAMEBUFFER > 0
if(!vga_dev) {
printf("ERROR !!! VGA device is not found\n");
rc = -1;
}
if (rc > 0) {
fbaddress =_pci_conf_read(vga_dev->pa.pa_tag,0x10);
ioaddress =_pci_conf_read(vga_dev->pa.pa_tag,0x18);
fbaddress = fbaddress &0xffffff00; //laster 8 bit
ioaddress = ioaddress &0xfffffff0; //laster 4 bit
printf("fbaddress 0x%x\tioaddress 0x%x\n",fbaddress, ioaddress);
#if NMOD_SMI > 0
fbaddress |= 0xb0000000;
ioaddress |= 0xbfd00000;
smi712_init((unsigned char *)fbaddress,(unsigned char *)ioaddress);
#endif
fb_init(fbaddress, ioaddress);
printf("after fb_init\n");
} else {
printf("vga bios init failed, rc=%d\n",rc);
}
#endif
#if (NMOD_FRAMEBUFFER > 0) || (NMOD_VGACON > 0 )
if (rc > 0)
if(!getenv("novga")) vga_available=1;
#endif #endif
config_init(); config_init();
configure(); configure();

165
Targets/Bonito2edev/conf/Bonito.smi
View File

@ -0,0 +1,165 @@
# $Id: Bonito,v 1.1.1.1 2006/09/14 01:59:09 root Exp $ # # GENERIC configuration for Galileo EV64240 # # This file is supposed to be included by target file after # endian has been defined.
#
machine Bonito2edev mips # CPU Architecture, Platform
config pmon
#
# Define target endian
#
makeoptions ENDIAN=EL # Little endian version.
#include "conf/GENERIC_ALL"
#
# System Name and Target Name
#
option SYSTYPE="\"Bonito\""
option TARGETNAME="\"Bonito\""
#
# Platform options
#
option BONITOEL
option DEVBD2E
option MIPS
option INET
select mod_flash_amd # AMD flash device programming
select mod_flash_intel # intel flash device programming
select mod_flash_sst # intel flash device programming
select mod_debugger # Debugging module
select mod_symbols # Symbol table handling
select mod_s3load # Srecord loading
#select mod_fastload # LSI Fastload
select mod_elfload # ELF loading
#
# Command selection. Selects pmon commands
#
select cmd_newmt
select cmd_setup
select cmd_about # Display info about PMON
select cmd_boot # Boot wrapper
select cmd_mycmd
select cmd_newmt
select cmd_cache # Cache enabling
#select cmd_call # Call a function command
select cmd_date # Time of day command
select cmd_env # Full blown environment command set
select cmd_flash # Flash programming cmds
select cmd_hist # Command history
select cmd_ifaddr # Interface address command
select cmd_l # Disassemble
select cmd_mem # Memory manipulation commands
select cmd_more # More paginator
select cmd_mt # Simple memory test command
select cmd_misc # Reboot & Flush etc.
#select cmd_stty # TTY setings command
select cmd_tr # Host port-through command
select cmd_devls # Device list
select cmd_set # As cmd_env but not req. cmd_hist
select cmd_testdisk
#
select cmd_shell # Shell commands, vers, help, eval
#
#
# Platform options
#
select mod_uart_ns16550 # Standard UART driver
#option CONS_BAUD=B9600
option CONS_BAUD=B115200
select ext2
select fatfs
#select mod_x86emu # X86 emulation for VGA
option MY40IO
#select mod_x86emu_int10
select mod_framebuffer
select mod_smi # X86 emulation for VGA
select mod_vgacon
option NOPCINAMES # Save some space for x86emu
#option FASTBOOT
select vt82c686 #via686a/b code
#
# Functional options.
#
option NOSNOOP # Caches are no-snooping
#
# HAVE options. What tgt level provide
#
option HAVE_TOD # Time-Of-Day clock
option HAVE_NVENV # Platform has non-volatile env mem
option HAVE_LOGO # Output splash logo
option USE_SUPERIO_UART
#option USE_LEGACY_RTC
#option GODSONEV2A
#option LINUX_PC
#option LONGMENG
#option RADEON7000
#option DEBUG_EMU_VGA
option AUTOLOAD
#option CONFIG_PCI0_LARGE_MEM
#option CONFIG_PCI0_HUGE_MEM
#option CONFIG_PCI0_GAINT_MEM
option CONFIG_CACHE_64K_4WAY
option NVRAM_IN_FLASH
#
# Now the Machine specification
#
mainbus0 at root
localbus0 at mainbus0
#fd0 at mainbus0
pcibr0 at mainbus0
#pcibr1 at mainbus0
pci* at pcibr?
#ppb* at pci? dev ? function ? # PCI-PCI bridges
#pci* at ppb? bus ?
#### USB
#uhci* at pci? dev ? function ?
#### SCSI support
#siop* at pci? dev ? function ? # Symbios/NCR 53c...
#scsibus* at siop?
#sd* at scsibus? target ? lun ?
#cd* at scsibus? target ? lun ?
#### Networking Devices
#gt0 at localbus? base 4
#gt1 at localbus? base 5
#gt2 at localbus? base 6
# fxp normally only used for debugging (enable/disable both)
fxp0 at pci? dev ? function ? # Intel 82559 Device
#inphy* at mii? phy ? # Intel 82555 PHYs
rtl* at pci? dev ? function ?
#uhci* at pci? dev ? function ?
#ohci0 at pci? dev ? function ?
#usb* at usbbus ?
#ohci1 at pci? dev ? function ?
#select mod_usb
#select mod_usb_storage
#select mod_usb_uhci
#select mod_usb_ohci
#select mod_usb_kbd
#### IDE controllers
pciide* at pci ? dev ? function ? flags 0x0000
#### IDE hard drives
wd* at pciide? channel ? drive ? flags 0x0000
#### Pseudo devices
pseudo-device loop 1 # network loopback
ide_cd* at pciide? channel ? drive ? flags 0x0001
select iso9660
option IDECD
#option HAVE_NB_SERIAL
option USE_ENVMAC
#option LOOKLIKE_PC

1
conf/files
View File

@ -337,3 +337,4 @@ file sys/dev/usb/usb_kbd.c mod_usb_kbd & mod_usb needs-flag
file sys/dev/usb/cmd_usb.c mod_usb & mod_usb_storage file sys/dev/usb/cmd_usb.c mod_usb & mod_usb_storage
file sys/dev/usb/usb_uhci.c mod_usb_uhci needs-flag file sys/dev/usb/usb_uhci.c mod_usb_uhci needs-flag
file sys/dev/pci/smi712.c mod_smi needs-flag

1347
lib/libc/Makefile
View File

File diff suppressed because it is too large

181
sys/dev/pci/smi712.c
View File

@ -0,0 +1,181 @@
/***************************************************************************
* Name:
* smi712.c
* License:
* 2003-2007, Copyright by BLX IC Design Co., Ltd.
* Description:
* smi712 driver
*
***************************************************************************/
#include "smi712.h"
//#if ENABLE_VGA_SMI712
////////////////////////////////
extern void video_hw_init();
////////////////////////////////
static void smi_set_timing(struct par_info *hw)
{
int i=0,j=0;
u32 m_nScreenStride;
// video_hw_init(); //xuhua
for (j=0;j < numVGAModes;j++) {
if (VGAMode[j].mmSizeX == hw->width &&
VGAMode[j].mmSizeY == hw->height &&
VGAMode[j].bpp == hw->bits_per_pixel &&
VGAMode[j].hz == hw->hz)
{
smi_mmiowb(0x0,0x3c6);
smi_seqw(0,0x1);
smi_mmiowb(VGAMode[j].Init_MISC,0x3c2);
for (i=0;i<SIZE_SR00_SR04;i++) /* init SEQ register SR00 - SR04 */
{
smi_seqw(i,VGAMode[j].Init_SR00_SR04[i]);
}
for (i=0;i<SIZE_SR10_SR24;i++) /* init SEQ register SR10 - SR24 */
{
smi_seqw(i+0x10,VGAMode[j].Init_SR10_SR24[i]);
}
for (i=0;i<SIZE_SR30_SR75;i++) /* init SEQ register SR30 - SR75 */
{
if (((i+0x30) != 0x62) && ((i+0x30) != 0x6a) && ((i+0x30) != 0x6b))
smi_seqw(i+0x30,VGAMode[j].Init_SR30_SR75[i]);
}
for (i=0;i<SIZE_SR80_SR93;i++) /* init SEQ register SR80 - SR93 */
{
smi_seqw(i+0x80,VGAMode[j].Init_SR80_SR93[i]);
}
for (i=0;i<SIZE_SRA0_SRAF;i++) /* init SEQ register SRA0 - SRAF */
{
smi_seqw(i+0xa0,VGAMode[j].Init_SRA0_SRAF[i]);
}
for (i=0;i<SIZE_GR00_GR08;i++) /* init Graphic register GR00 - GR08 */
{
smi_grphw(i,VGAMode[j].Init_GR00_GR08[i]);
}
for (i=0;i<SIZE_AR00_AR14;i++) /* init Attribute register AR00 - AR14 */
{
smi_attrw(i,VGAMode[j].Init_AR00_AR14[i]);
}
for (i=0;i<SIZE_CR00_CR18;i++) /* init CRTC register CR00 - CR18 */
{
smi_crtcw(i,VGAMode[j].Init_CR00_CR18[i]);
}
for (i=0;i<SIZE_CR30_CR4D;i++) /* init CRTC register CR30 - CR4D */
{
smi_crtcw(i+0x30,VGAMode[j].Init_CR30_CR4D[i]);
}
for (i=0;i<SIZE_CR90_CRA7;i++) /* init CRTC register CR90 - CRA7 */
{
smi_crtcw(i+0x90,VGAMode[j].Init_CR90_CRA7[i]);
}
}
}
smi_mmiowb(0x67,0x3c2);
/* set VPR registers */
writel(hw->m_pVPR+0x0C, 0x0);
writel(hw->m_pVPR+0x40, 0x0);
/* set data width */
m_nScreenStride = (hw->width * hw->bits_per_pixel) / 64;
/* case 16: */
writel(hw->m_pVPR+0x0, 0x00020000);
writel(hw->m_pVPR+0x10, (u32)(((m_nScreenStride + 2) << 16) | m_nScreenStride));
}
/***************************************************************************
* We need to wake up the LynxEM+, and make sure its in linear memory mode.
***************************************************************************/
static inline void
smi_init_hw(void)
{
#if 0
outb(0x18, 0x3c4);
outb(0x11, 0x3c5);
#endif
linux_outb(0x18, 0x3c4);
linux_outb(0x11, 0x3c5);
}
int smi712_init(char * fbaddress,char * ioaddress)
{
u32 smem_size;
smi_init_hw();
hw.m_pLFB = SMILFB = fbaddress;
hw.m_pMMIO = SMIRegs = SMILFB + 0x00700000; /* ioaddress */
hw.m_pDPR = hw.m_pLFB + 0x00408000;
hw.m_pVPR = hw.m_pLFB + 0x0040c000;
/* now we fix the mode */
#if 0
hw.width = 800;
hw.height = 600;
#endif
#if 1
hw.width = 640;
hw.height = 480;
#endif
hw.bits_per_pixel = 16;
hw.hz = 60;
if (!SMIRegs)
{
printf(" unable to map memory mapped IO\n");
return -1;
}
/*xuhua*/
smi_seqw(0x21,0x00);
/*****/
smi_seqw(0x62,0x7A);
smi_seqw(0x6a,0x0c);
smi_seqw(0x6b,0x02);
smem_size = 0x00400000;
/* LynxEM+ memory dection */
*(u32 *)(SMILFB + 4) = 0xAA551133;
if (*(u32 *)(SMILFB + 4) != 0xAA551133)
{
smem_size = 0x00200000;
/* Program the MCLK to 130 MHz */
smi_seqw(0x6a,0x12);
smi_seqw(0x6b,0x02);
smi_seqw(0x62,0x3e);
}
smi_set_timing(&hw);
printf("Silicon Motion, Inc. LynxEM+ Init complete.\n");
return 0;
}
//#endif
/* ---------------------------------------------------------------------- */
// $Log$

525
sys/dev/pci/smi712.h
View File

@ -0,0 +1,525 @@
/***************************************************************************
* Name:
* smi712.h
* License:
* 2003-2007, Copyright by BLX IC Design Co., Ltd.
* Description:
* Smi 712 VGA card bios driver for BLX 1A
* The code from linux framebuffer drivers.
*
***************************************************************************/
#ifndef __SMI_712_
#define __SMI_712_
#if 0
#include <config.h>
#include <io.h>
#endif
#if 1 //xuhua
#include <linux/io.h>
#include <linux/types.h>
//#include <ctype.h>
#endif
#include <string.h>
#define IO_BASE 0xbfd00000
////#ifdef CONFIG_CPU_GS32I
////#define IO_BASE 0x50000000
////#else
//#error no #define IO_BASE
////#endif
static char *SMIRegs; /* point to virtual Memory Map IO starting address */
static char *SMILFB; /* point to virtual video memory starting address */
static struct par_info hw; /* used to record hardware information */
#ifndef writeb
#define writeb(addr, data) (*(volatile unsigned char *)(addr) = (data))
#endif
#ifndef writew
#define writew(addr, data) (*(volatile unsigned short *)(addr) = (data))
#endif
#ifndef writel
#define writel(addr, data) (*(volatile unsigned long *)(addr) = (data))
#endif
#define smi_mmiowb(dat,reg) writeb(SMIRegs + (reg), (dat))
#define smi_mmioww(dat,reg) writew(SMIRegs + (reg), (dat))
#define smi_mmiowl(dat,reg) writel(SMIRegs + (reg), (dat))
#define smi_mmiorb(reg) readb((unsigned long)(SMIRegs + (reg)))
#define smi_mmiorw(reg) readw((unsigned long)(SMIRegs + (reg)))
#define smi_mmiorl(reg) readl((unsigned long)(SMIRegs + (reg)))
#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
#define SIZE_VPR (0x6C + 1)
#define SIZE_DPR (0x44 + 1)
#define numVGAModes 6
#define numChipIDs 3
#define NR_PALETTE 256
#define NR_RGB 2
/****************************************************************************
* Minimum X and Y resolutions
****************************************************************************/
#define MIN_XRES 640
#define MIN_YRES 480
static inline void smi_crtcw(int reg, int val)
{
smi_mmiowb(reg, 0x3d4);
smi_mmiowb(val, 0x3d5);
}
static inline unsigned int smi_crtcr(int reg)
{
smi_mmiowb(reg, 0x3d4);
return smi_mmiorb(0x3d5);
}
static inline void smi_grphw(int reg, int val)
{
smi_mmiowb(reg, 0x3ce);
smi_mmiowb(val, 0x3cf);
}
static inline unsigned int smi_grphr(int reg)
{
smi_mmiowb(reg, 0x3ce);
return smi_mmiorb(0x3cf);
}
static inline void smi_attrw(int reg, int val)
{
smi_mmiorb(0x3da);
smi_mmiowb(reg, 0x3c0);
smi_mmiorb(0x3c1);
smi_mmiowb(val, 0x3c0);
}
static inline void smi_seqw(int reg, int val)
{
smi_mmiowb(reg, 0x3c4);
smi_mmiowb(val, 0x3c5);
}
static inline unsigned int smi_seqr(int reg)
{
smi_mmiowb(reg, 0x3c4);
return smi_mmiorb(0x3c5);
}
struct par_info {
/* Hardware */
u16 chipID;
char *m_pLFB;
char *m_pMMIO;
char *m_pDPR;
char *m_pVPR;
u32 width;
u32 height;
u32 hz;
/* glame add */
u32 bits_per_pixel;
};
/* The next structure holds all information relevant for a specific video mode. */
struct ModeInit
{
int mmSizeX;
int mmSizeY;
int bpp;
int hz;
unsigned char Init_MISC;
unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
};
struct ModeInit VGAMode[numVGAModes] =
{
{
/* mode#0: 640 x 480 8Bpp 60Hz */
640, 480, 8, 60,
/* Init_MISC */
0xE3,
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x00, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
},
{ /* Init_SR80_SR93 */
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
},
{ /* Init_CR90_CRA7 */
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
},
},
{
/* mode#1: 640 x 480 16Bpp 60Hz */
640, 480, 16, 60,
/* Init_MISC */
0xE3,
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x00, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
},
{ /* Init_SR80_SR93 */
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
},
{ /* Init_CR90_CRA7 */
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
},
},
{
/* mode#2: 640 x 480 24Bpp 60Hz */
640, 480, 24, 60,
/* Init_MISC */
0xE3,
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x00, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
},
{ /* Init_SR80_SR93 */
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
},
{ /* Init_CR90_CRA7 */
0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
},
},
{/* mode#3: 800 x 600 8Bpp 60Hz */
800,600,8,60,
0x2B, /* Init_MISC */
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x03, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x24, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
},
{ /* Init_SR80_SR93 */
0xFF, 0x87, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
0x90, 0x01, 0x2C, 0x01, 0xFF, 0x00, 0x24, 0x24,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
},
{ /* Init_CR90_CRA7 */
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
},
},
{/* mode#4: 800 x 600 16Bpp 60Hz */
800, 600, 16, 60,
/* Init_MISC */
0x2B,
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x03, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x24, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
},
{ /* Init_SR80_SR93 */
0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
},
{ /* Init_CR90_CRA7 */
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
},
},
{/* mode#5: 800 x 600 24Bpp 60Hz */
800,600,24,60,
0x2B,
{ /* Init_SR0_SR4 */
0x03, 0x01, 0x0F, 0x03, 0x0E,
},
{ /* Init_SR10_SR24 */
0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0xC4, 0x30, 0x02, 0x01, 0x01,
},
{ /* Init_SR30_SR75 */
0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
},
{ /* Init_SR80_SR93 */
0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
0x00, 0x00, 0x00, 0x00,
},
{ /* Init_SRA0_SRAF */
0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
},
{ /* Init_GR00_GR08 */
0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
0xFF,
},
{ /* Init_AR00_AR14 */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x41, 0x00, 0x0F, 0x00, 0x00,
},
{ /* Init_CR00_CR18 */
0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
0xFF,
},
{ /* Init_CR30_CR4D */
0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
},
{ /* Init_CR90_CRA7 */
0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
},
},
};
#endif /*__SMI_712__*/
/* ---------------------------------------------------------------------- */
// $Log$
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