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fix fcr kbd and flash.

master
root 15 years ago
parent
commit
cbcd4f5996
  1. 3
      Targets/fcr_soc/conf/fcr
  2. 4
      Targets/fcr_soc/conf/ld.script
  3. 2
      Targets/fcr_soc/dev/pflash_tgt.h
  4. 4
      Targets/fcr_soc/fcr/tgt_machdep.c
  5. 2
      pmon/cmds/mycmd.c
  6. 98
      pmon/dev/flash.c
  7. 4
      pmon/dev/flashdev.c
  8. 16
      pmon/dev/kbd.c
  9. 2
      zloader/Makefile.fcr
  10. 2
      zloader/genrom
  11. 4
      zloader/ld.script.S

3
Targets/fcr_soc/conf/fcr

@ -82,6 +82,7 @@ select mod_framebuffer
#select mod_x86emu_int10
select mod_vgacon
option NOPCINAMES # Save some space for x86emu
option CONFIG_VIDEO_SW_CURSOR
#option FASTBOOT
#select vt82c686 #via686a/b code
@ -173,7 +174,7 @@ option IDECD
#select cmd_bootp
#option FOR_GXEMUL
select fatfs
option FLOATINGPT
#option FLOATINGPT
select gzip
option INPUT_FROM_BOTH
option OUTPUT_TO_BOTH

4
Targets/fcr_soc/conf/ld.script

@ -30,6 +30,8 @@ SECTIONS
*(.data)
. = ALIGN(32);
*(.data.align32)
. = ALIGN(64);
*(.data.align64)
. = ALIGN(128);
*(.data.align128)
. = ALIGN(4096);
@ -75,6 +77,8 @@ SECTIONS
*(.bss)
. = ALIGN(32);
*(.bss.align32)
. = ALIGN(64);
*(.bss.align64)
. = ALIGN(128);
*(.bss.align128)
. = ALIGN(4096);

2
Targets/fcr_soc/dev/pflash_tgt.h

@ -48,6 +48,6 @@
*/
#define TARGET_FLASH_DEVICES_16 \
{ PHYS_TO_UNCACHED(0x1fc00000), 0x00080000, 1, 1, FL_BUS_8 }, \
{ PHYS_TO_UNCACHED(0x1fc00000), 0x00080000, 2, 1, FL_BUS_16 }, \
{ 0x00000000, 0x00000000 }

4
Targets/fcr_soc/fcr/tgt_machdep.c

@ -212,8 +212,8 @@ int init_kbd()
ldd = 5*25*APB_CLK/100000000; //5us/(4/APB_CLK)=5*25
KSEG1_STORE8(FCR_PS2_BASE+PS2_DLL, ldd & 0xff);
KSEG1_STORE8(FCR_PS2_BASE+PS2_DLH, (ldd >> 8) & 0xff);
KSEG1_STORE8(FCR_PS2_BASE+0xa,20); //kbd 100us
KSEG1_STORE8(FCR_PS2_BASE+0xb,20); //aux 100us
///KSEG1_STORE8(FCR_PS2_BASE+0xa,20); //kbd 100us
//KSEG1_STORE8(FCR_PS2_BASE+0xb,20); //aux 100us
//pckbd_init_hw();
return 1;

2
pmon/cmds/mycmd.c

@ -960,7 +960,7 @@ static int setcache(int argc,char **argv)
{
cacheflush();
__asm__ volatile(
".set mips3;\r\n"
".set mips2;\r\n"
"mfc0 $4,$16;\r\n"
"and $4,$4,0xfffffff8;\r\n"
"or $4,$4,0x2;\r\n"

98
pmon/dev/flash.c

@ -92,7 +92,11 @@ static __inline void fl_mydetect(struct fl_map *map)
outb((map->fl_map_base + ConvAddr1(0x2aa)), 0x55);
outb((map->fl_map_base + ConvAddr1(0x555)), FL_AUTOSEL);
if(inb(map->fl_map_base)!=oldc){map->fl_type=TYPE_ST;return;}
else {map->fl_type=TYPE_AMD; }
outb((map->fl_map_base + AMD_CMDOFFS1), 0xAA);
outb((map->fl_map_base + AMD_CMDOFFS2), 0x55);
outb((map->fl_map_base + AMD_CMDOFFS1), FL_AUTOSEL);
if(inb(map->fl_map_base)!=oldc){map->fl_type=TYPE_AMD;return;}
else {map->fl_type=0;printf("unknow flash type\n"); }
}
static __inline void
@ -315,36 +319,6 @@ fl_devident(void *base, struct fl_map **m)
static void get_roundup(void **ori_base, int *ori_size)
{
int mask;
struct fl_device *dev;
struct fl_map *map;
dev = fl_devident(*ori_base, &map);
if (dev == NULL) {
printf("No flash found at %x\n", (u_int32_t) ori_base);
return ; /* No flash device found at address */
}
mask = ((dev->fl_secsize * map->fl_map_width / map->fl_map_chips) - 1);
if((int)*ori_base & mask) {
*ori_size += (int)*ori_base & mask;
*ori_base = (void *)((int)*ori_base & ~mask);
} else if((*ori_size + ((int)*ori_base - map->fl_map_base)) > map->fl_map_size) {
return ; /* End beyound end of flash */
}
*ori_size = (*ori_size + mask) & ~mask; /* Round up to catch entire flash */
}
/*
* Erase the flash device(s) addressed.
*/
@ -482,42 +456,54 @@ fl_erase_device(void *base, int size, int verbose)
int fl_program(void *fl_base, void *data_base, int data_size, int verbose)
{
void *base = fl_base;
int size = data_size;
char *tmpbuf;
char *nvrambuf;
char *nvramsecbuf;
char *nvram;
int offs,count,left;
struct fl_device *dev=fl_devident(fl_base,0);
int nvram_size=dev->fl_secsize;
nvramsecbuf = (char *)malloc(nvram_size);
if(nvramsecbuf == 0) {
printf("Warning! Unable to malloc nvrambuffer!\n");
return(-1);
}
nvram = fl_base;
left = data_size;
while(left)
{
get_roundup(&base, &size);
offs = (int)nvram &(nvram_size - 1);
nvram = (int)nvram & ~(nvram_size - 1);
count = min(nvram_size-offs,left);
/* 去掉提示信息 */
// verbose = FALSE;
if (verbose)
{
printf("base %x, size %x\n", base, size);
memcpy(nvramsecbuf, nvram, nvram_size);
if(fl_erase_device(nvram, nvram_size, verbose)) {
printf("Error! Nvram erase failed!\n");
free(nvramsecbuf);
return(0);
}
tmpbuf = (char *)malloc(size);
if (tmpbuf == 0) {
printf("[fl_program] can't malloc");
return -1;
}
nvrambuf = nvramsecbuf + offs;
memcpy(tmpbuf, base, size);
memcpy(tmpbuf + (unsigned int)fl_base - (unsigned int)base,
data_base, data_size);
if (fl_erase_device(base, size, verbose) == 0 &&
fl_program_device(base, tmpbuf, size, verbose) == 0){
return 0;
}
return -1;
memcpy(nvrambuf,data_base,count);
if(fl_program_device(nvram, nvramsecbuf, nvram_size, verbose)) {
printf("Error! Nvram program failed!\n");
free(nvramsecbuf);
return(0);
}
data_base += count;
nvram += nvram_size;
left -= count;
}
free(nvramsecbuf);
return 0;
}

4
pmon/dev/flashdev.c

@ -102,6 +102,8 @@ struct fl_device fl_known_dev[] = {
/* zfx, should be compatible */
{"MX29LV040", 0xC2, 0x4F, FL_PROTO_SST, FL_CAP_DE,
512 * __KB, 64 * __KB, NULL, &fl_func_sst},
{ "Am29LV160", 0x01, 0x49, FL_PROTO_AMD, FL_CAP_DE,
2048*__KB, 8*__KB, NULL, &fl_func_amd }, //hwm
#endif /* NMOD_FLASH_AMD */
#if NMOD_FLASH_INTEL > 0
{ "i28F016SA", 0x89, 0xa0, FL_PROTO_INT, FL_CAP_A7,
@ -132,6 +134,8 @@ struct fl_device fl_known_dev[] = {
4096*__KB, 64*__KB, NULL, &fl_func_sst },
{ "SST39F040", 0x0bf, 0xd7, FL_PROTO_SST, FL_CAP_DE,
512*__KB, 4*__KB, NULL, &fl_func_sst }, /*sector size must be correct*/
{ "SST39VF6401B", 0xbf, 0x236d, FL_PROTO_SST, FL_CAP_DE,
8192*__KB, 64*__KB, NULL, &fl_func_sst }, //hwm
{ "SST39SF040", 0x0bf, 0xb7, FL_PROTO_SST, FL_CAP_DE,
512*__KB, 4*__KB, NULL, &fl_func_sst }, /*sector size must be correct*/
{ "Am29LV017", 0x01, 0xc8, FL_PROTO_SST, FL_CAP_DE,

16
pmon/dev/kbd.c

@ -304,6 +304,11 @@ int kbd_initialize(void)
* If the test is successful a x55 is placed in the input buffer.
*/
kbd_write_command_w(KBD_CCMD_SELF_TEST);
kbd_write_command_w(KBD_CCMD_SELF_TEST);
kbd_write_command_w(KBD_CCMD_SELF_TEST);
kbd_write_command_w(KBD_CCMD_SELF_TEST);
kbd_write_command_w(KBD_CCMD_SELF_TEST);
if (kbd_wait_for_input() != 0x55) {
printf("Self test cmd failed,ignored!\n");
//return 1;
@ -335,6 +340,9 @@ int kbd_initialize(void)
*/
count = 0;
do {
kbd_clear_input();
kbd_write_output_w(KBD_CMD_RESET);
kbd_clear_input();
kbd_write_output_w(KBD_CMD_RESET);
status = kbd_wait_for_input();
if (status == KBD_REPLY_ACK)
@ -348,7 +356,7 @@ int kbd_initialize(void)
} while (1);
if (kbd_wait_for_input() != KBD_REPLY_POR) {
printf("NO POR, ignored!\n");
//printf("NO POR, ignored!\n");
//return 3;
}
@ -392,17 +400,17 @@ int kbd_initialize(void)
}
#endif
if (kbd_write_output_w_and_wait(KBD_CMD_ENABLE) != KBD_REPLY_ACK) {
return 5;
//return 5;
}
/*
* Finally, set the typematic rate to maximum.
*/
if (kbd_write_output_w_and_wait(KBD_CMD_SET_RATE) != KBD_REPLY_ACK) {
return 6;
//return 6;
}
if (kbd_write_output_w_and_wait(0x00) != KBD_REPLY_ACK) {
return 7;
//return 7;
}
return 0;

2
zloader/Makefile.fcr

@ -1,7 +1,7 @@
TARGET=fcr_soc
TARGETEL=fcr
START=start.o
MEMSIZE=16
MEMSIZE=64
ZLOADER_OPTIONS=-DNOCACHE2 -DNOMSG -mips2
RAMSTARTADDR=0xffffffff80800000

2
zloader/genrom

@ -24,7 +24,7 @@ void realinitmips(unsigned int msize);
void enable_cache()
{
__asm__ volatile(
".set mips3;\\n" \\
".set mips2;\\n" \\
" mfc0 \$4,\$16;\\n" \\
" and \$4,\$4,0xfffffff8;\\n" \\
" or \$4,\$4,0x3;\\n" \\

4
zloader/ld.script.S

@ -28,6 +28,8 @@ SECTIONS
*(.data)
. = ALIGN(32);
*(.data.align32)
. = ALIGN(64);
*(.data.align64)
. = ALIGN(128);
*(.data.align128)
. = ALIGN(4096);
@ -73,6 +75,8 @@ SECTIONS
*(.bss)
. = ALIGN(32);
*(.bss.align32)
. = ALIGN(64);
*(.bss.align64)
. = ALIGN(128);
*(.bss.align128)
. = ALIGN(4096);

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