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ls2k add cpufreq, ddrfreq env.

Change-Id: I0151c808f4dfd24c626e50630a7cf1f3c4a7ec84
Signed-off-by: QiaoChong <qiaochong@loongson.cn>
master
Chong Qiao 3 years ago
parent
commit
e6e164894f
  1. 2
      Targets/LS2K/include/bonito.h
  2. 55
      Targets/LS2K/ls2k/loongson3_clksetting.S
  3. 17
      Targets/LS2K/ls2k/tgt_machdep.c

2
Targets/LS2K/include/bonito.h

@ -85,6 +85,8 @@ struct pci_config_data {
#endif #endif
# define ETHER_OFFS 494 /* Ethernet address base */ # define ETHER_OFFS 494 /* Ethernet address base */
# define VER_OFFS 500 /* Ethernet address base */ # define VER_OFFS 500 /* Ethernet address base */
# define CPUFREQ_OFFS 504
# define DDRFREQ_OFFS 506
#else /* Use clock ram, 256 bytes only */ #else /* Use clock ram, 256 bytes only */
# define NVRAM_SIZE 114 # define NVRAM_SIZE 114
# define NVRAM_SECSIZE NVRAM_SIZE /* Helper */ # define NVRAM_SECSIZE NVRAM_SIZE /* Helper */

55
Targets/LS2K/ls2k/loongson3_clksetting.S

@ -40,6 +40,7 @@ ATTENTION:
#define GPU_DIV_L2 7 #define GPU_DIV_L2 7
#define HDA_DIV_L2 (DDR_FREQ*DDR_DIV_L2/24) #define HDA_DIV_L2 (DDR_FREQ*DDR_DIV_L2/24)
#define PLL_IN 100
/* DC @ 200Mhz */ /* DC @ 200Mhz */
/* GMAC @ 125Mhz */ /* GMAC @ 125Mhz */
#define DC_LOOPC 80 #define DC_LOOPC 80
@ -78,7 +79,31 @@ ATTENTION:
li t0, 0xbfe10480 li t0, 0xbfe10480
li t1, (0x1 << 19) //power down pll L1 first li t1, (0x1 << 19) //power down pll L1 first
sd t1, 0x0(t0) sd t1, 0x0(t0)
dli t1, (L1_LOOPC << 32) | (L1_DIV << 42) | (L1_REFC << 26) | (0x3 << 10) | (0x1 << 7) dli t1, /*(L1_LOOPC << 32) |*/ (L1_DIV << 42) | (L1_REFC << 26) | (0x3 << 10) | (0x1 << 7)
li v0, 0xbfc00000+NVRAM_OFFS+CPUFREQ_OFFS
lhu v0, (v0)
sltiu v1, v0, 60
bnez v1, 1f
nop
sltiu v1, v0,1001
bnez v1, 2f
nop
1:
li v0, CORE_FREQ
2:
li v1, L1_DIV*L1_REFC*L2_DIV
multu v0,v1
mflo v0
li v1,PLL_IN
divu v0,v1
mflo v0
dsll32 v0,0
or t1, v0
dli t2, L2_DIV dli t2, L2_DIV
sd t1, 0(t0) sd t1, 0(t0)
sd t2, 8(t0) sd t2, 8(t0)
@ -101,10 +126,36 @@ ATTENTION:
TTYDBG ("\r\nMEM :") TTYDBG ("\r\nMEM :")
li t0, 0xbfe10490 li t0, 0xbfe10490
li t1, (0x1 << 19) //power down pll first li t1, (0x1 << 19) //power down pll first
sd t1, 0x0(t0) sd t1, 0x0(t0)
dli t1, (DDR_DIV << 42) | (DDR_REFC << 26) | (DDR_LOOPC << 32) | (0x3 << 10) | (0x1 << 7) dli t1, (DDR_DIV << 42) | (DDR_REFC << 26) /*| (DDR_LOOPC << 32)*/ | (0x3 << 10) | (0x1 << 7)
li v0, 0xbfc00000+NVRAM_OFFS+DDRFREQ_OFFS
lhu v0, (v0)
sltiu v1, v0, 60
bnez v1, 1f
nop
sltiu v1, v0,601
bnez v1, 2f
nop
1:
li v0, DDR_FREQ
2:
li v1,DDR_DIV*DDR_REFC*DDR_DIV_L2
multu v0,v1
mflo v0
li v1,PLL_IN
divu v0,v1
mflo v0
dsll32 v0,0
or t1, v0
dli t2, (GPU_DIV_L2 << 22) | (DDR_DIV_L2) | (HDA_DIV_L2 << 44) dli t2, (GPU_DIV_L2 << 22) | (DDR_DIV_L2) | (HDA_DIV_L2 << 44)
sd t1, 0x0(t0) sd t1, 0x0(t0)
sd t2, 0x8(t0) sd t2, 0x8(t0)

17
Targets/LS2K/ls2k/tgt_machdep.c

@ -1536,6 +1536,7 @@ int tgt_setenv(char *name, char *value)
char *ep; char *ep;
int envlen; int envlen;
char *nvrambuf; char *nvrambuf;
unsigned short cpufreq, ddrfreq;
/* Non permanent vars. */ /* Non permanent vars. */
if (strcmp(EXPERT, name) == 0) { if (strcmp(EXPERT, name) == 0) {
@ -1582,7 +1583,21 @@ int tgt_setenv(char *name, char *value)
em_enable = strtoul(value, 0, 0); em_enable = strtoul(value, 0, 0);
} else } else
#endif #endif
if(strcmp("ls2kver", name) == 0) if(strcmp("cpufreq", name) == 0)
{
cpufreq = strtoul(value, 0, 0);
if(cpufreq > 1000 || cpufreq == 0)
cpufreq = 1000;
bcopy(&cpufreq, &nvramsecbuf[CPUFREQ_OFFS], 2);
}
else if(strcmp("ddrfreq", name) == 0)
{
ddrfreq = strtoul(value, 0, 0);
if(ddrfreq > 600 || ddrfreq == 0)
ddrfreq = 1024;
bcopy(&ddrfreq, &nvramsecbuf[DDRFREQ_OFFS], 2);
}
else if(strcmp("ls2kver", name) == 0)
{ {
ls2kver = strtoul(value, 0, 0); ls2kver = strtoul(value, 0, 0);
} }

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