Huang Shuai
86faee00d0
optimise ddr parameter for 3a82h at 500MHz
Change-Id: I2bc20367ac0526c32895e0aef3b4a50c19574ee8
10 years ago
Huang Pei
e6edae3626
add L2 Xbar Scache interleave, disabled by default
Change-Id: I50b799edf5d1024ac86f470bc44c4baf427fd1f7
10 years ago
Huang Pei
40a535e7c0
code indent and remove unused files and dead code, fix cp0 prid
to 0x146308 for 3a82h
Change-Id: I6f7af5f5434b38871b5dea7dc501930b60c587ce
10 years ago
Huang Pei
375daea571
fix mem freq info print
Change-Id: Iff998f4813428d4db6cbe150110b2c384da1f768
10 years ago
Huang Pei
e3b9ccaf1c
clean start.S
Change-Id: Ib977a9847b823d2ba14fad6fcc2c9e84215c96b0
10 years ago
Huang Pei
b2801f3dc7
clean up workaround for 2h on 3a5
Change-Id: I863e25ec33dc346d02e727b325ab69ba1c62f26c
10 years ago
Huang Pei
f2055919e9
fix XIE enabled with ELPA by mistake
Change-Id: Ibb172f7687dfe3d3f91903802d2c2240096affd4
10 years ago
Huang Pei
1d321e5401
add support for 3a82h support:
partial import 24a40dd03b
Change-Id: Ic1ea335598eb7a511e8a53b93997a4a16262af5c
10 years ago
Huang Pei
8a184568ef
print BogoMIPS for new board instead of cpu freq
Change-Id: I90005a453ed80ed911c7ef112cb0d8e51ca0e3c9
10 years ago
Huang Shuai
4106b63fcc
add macro CHANGE_RD_OE in ddr3_leveling.S to support the frequency change of DDR (now only 500MHz and 600MHz tested at 3a8780e board)
Change-Id: I64b9c2cd6761a4ef0e66b99873190e4854096909
10 years ago
Huang Shuai
e94dd1f458
fix a bug in ddr3_leveling.S: when rd_after_wr is set, for DIMM without ECC, there is no need to leveling the 9th device
Change-Id: Ie1db15da46bfb5e77c06ec27c9915c84857ac63a
10 years ago
Huang Pei
00e4cdda69
fix board info description
new board define board_device_info() overriding the default one in
pmon/common/bootparam.c
Change-Id: I53e896e52be941c70052fd69622bfb296ce6d396
10 years ago
Huang Pei
0499cdba70
assume all cores are ok
Change-Id: I7d76d4c50baa63046a0870bfb1b2475e2e02b659
10 years ago
Huang Pei
2df9c7d9e6
add L2 Xbar Scache interleave, disabled by default
Change-Id: Ica5da5e76f2653f8d5178d1bd7ce1cdef8684d43
10 years ago
Huang Pei
eda4112f1d
fix the cp0 prid to 0x146308
Change-Id: I17b94d180e4fa1ff5993947f1c8dca44c82a9930
10 years ago
Huang Pei
9eff8640dd
clean up start.S and let the beep out
Change-Id: I7eb28037c0c0cabd7d74ca1f055df3bc8f0a7c45
10 years ago
Huang Pei
810f8983b8
remove duplicated win configuration and add scache selection (no used by default)
Change-Id: I984e228271dca240990dd50c36c45f6611bcb64e
10 years ago
Huang Pei
39045092a4
remove unused files and clean up indent
Change-Id: I638cd4f4d0663a0336c770660dad79c16b1d231a
10 years ago
Huang Pei
ed4ad00624
fix XIE set with ELPA by mistake
this make the boot core on 3a8 with XIE open by accident
Change-Id: I3e03bf322996b745abe550f14b31c7b888ab0da5
10 years ago
Huang Pei
acb5847b15
change mem freq info print
new board use define print_mem_freq to override the default
print_mem_freq in pmon/common/main.c
Change-Id: I78428515e2f8e9448f809447d5dfa57fa19f901b
10 years ago
Huang Pei
a13c95949c
import devel commit 34e8b77211a4c6c51ef99e027d4d34dde6f9d9e6 ON 3a878e
origin commit msg is:
Change parameter to optimise 667MHz DDR performance
(but this version may cause error, change tCCD to 0x6 can fix this error.
add MC1 DDR, 667MHz still has error, this version CPU 850MHz, DDR 600MHz,
SPEC ref pass)
Change-Id: I71e6a7d7271008509120293bc26d37bfd954b7f2
10 years ago
Huang Pei
ebc78ca3b8
import devel commit c36de43fb41bde2a57a262a1a0cf3d132d3ab655 from
Huang Shuai
origin commit msg:
Change ddr parameters, now 667MHz can pass ref (DDR Kinston UDIMM 667MHz,
CPU 800MHz, Note that the RDIMM parameter should be ignored now)
Change-Id: Icca937516d7d4b65bfabf2a84346bc9bd42960c5
10 years ago
Huang Pei
19b4cbf178
add 3a8780e support
Change-Id: Ib245ff02bb7f8f16d72f5fcdfa89b601be356bb6
10 years ago
Huang Pei
6845bcacc5
add basic LSMC2 support
Change-Id: Id4c28e8af54d4a0df25ca293c57f2f9b7029768b
10 years ago
zhangbaoqi
3781555e58
3A2H: Modify pmon can not start normally when the pcie worked on x4 mode.
Change-Id: Ib9abadc2e98e8ed29d28b8d9b2f69f8bedb8f07d
10 years ago
lixuefeng
6823d94ced
Add S3 mode of acpi function for LS3A2H
Change-Id: I8edf8aa8dfbe9045602ea49b27f0789976fcac26
10 years ago
Huang Pei
a2d15a6bef
protect I/O manipulation from gcc optimization
submitted by Qiao Chong <qiaochong@loongson.cn>
Change-Id: Id03066a6b2bbcaef5bc60af0f7bdc0ed005fbb77
10 years ago
Huang Pei
8e4e297210
fix missing label when DEBUG_DDR is open
Change-Id: I25e062f959b32ccc44b9f02543787c691cc06175
10 years ago
zhangbaoqi
2caf5ebee2
3A2H: Add the intel 82574 and 82576 net card support.
Now the net card only the ping command is normally.
Change-Id: I7fa6c3729921226d39336f7ac41c87a3b7d290bb
10 years ago
zhangbaoqi
24a40dd03b
3A2H: Add the pciscan command support.
Change-Id: Ia686873e98d2bbf5430ac8229fc83bc19d1e751f
10 years ago
zhangbaoqi
f4433ecf7e
This patch is for 3A2H GMAC generate MAC address.
Change-Id: I82374752ed0ccf421535172ffd0b93682b765591
10 years ago
wanghongmei
e27e95a638
update 3A2H version to release 0.7
Change-Id: Iea6249c30909db8d2837978692bf2e2d67cef039
10 years ago
wanghongmei
235602eb7e
update 3B1500780E release info to v0.5
Change-Id: Icef2920a47f6356da50fc5161968fb20bee45113
10 years ago
lixuefeng
f32a99ae20
Fixup the memory window which be transfered from pmon to kernel as a
parameter,reserve the memory : 0~2MB and 240~256MB
Change-Id: I23224a682249cf46ab71d5ef07e47ab3e41845ce
Target:LS2G1A
10 years ago
Huang Pei
4b53594e93
[3c780e]: fix wrong sing_double_channel setting
Change-Id: If772c99f61fd3470363d9d4451e849a30e6cb10f
10 years ago
mengtianfang
2e203b09e5
Modify gpio configure for nand flash,
otherwise the nand can be read.
Change-Id: I87a169337efd89d00c98147b77c8bf5a9435b28f
Target:LS2G1A
10 years ago
mengtianfang
dfc20acdf1
Change 1A uart clock frequence,
because the ddr frequence multiplication has been changed to 5.
Change-Id: Ib64dc19381c3844ca6ecd6f089cb809391edea23
Target:LS2G1A
10 years ago
lixuefeng
1e1e215266
Change ddr frequence and the 1a pci window size
1.change the ddr frequence from 150MHz to 125MHz
2.change the 1a pci window size from 256MB to 64MB
Change-Id: I0e2cd0af01288412cb616e2cec223a45549b19e0
Target:LS2G1A
10 years ago
lixuefeng
17cc4da154
Change the 1a pci dma window
1.change the 1a pci dma window size from 192MB to 2GB,and start
address at 0x8000000
2.fix up the code of dma address convert for OHCI,sata,1a gmac
3.fix up the parameter of DMA64 option which be tranfered to kernel
Change-Id: I943e3aac77c4cdbd04bb6a28058a3f423b74b998
Target:LS2G1A
10 years ago
mengtianfang
eaf8baa12d
Add Main Menu support.
1.Modify Targets/Bonito2g1a/Bonito/tgt_machdep.c
Initialise variable.
2.Modify pmon/cmds/cmd_main/cmd_main.c
Modify pmon/cmds/cmd_main/window.c
Add usb keyboard and uart backspace key support.
Change-Id: I8cbca6a6a4c799ae757b98ea96d4f0d536964aca
Target:LS2G1A
10 years ago
mengtianfang
cd857546d6
Add i2c support for AUTO_DDR_CONFIG, and clean up code.
Change-Id: I1cfe4269be1d5496c419d2dd84d507ad503e8ade
Target:LS2G1A
10 years ago
lixuefeng
bcf860f1fe
Change dc input clock source from 12MHz to 25MHz
1.change ddr_mul to 6,so ddr pll output is 25MHz*6 = 150MHz
2.change gpu pll output to 150MHz
3.change dc pll input clock source to 25MHz
Change-Id: I6f3ee7774c556d4a4f2edc2358556ab2f81d1d44
Target:LS2G1A
10 years ago
Chen Xinke
228389aa71
Update 2g1a MC initialization code. (Auto DDR configure is not finished now) use start.S instead of start_2g1a.S. remove unused files under Bonito2g1a/Bonito.
Change-Id: If513a698e9c454f6b19beffd1c4efd7182b4d6e9
10 years ago
mengtianfang
a4c824c9b1
Remove useless files in Targets/Bonito2g1a/compile* out of git reposition.
Change-Id: If6341f001c83883c5e4fa8c7a223978362f11bd4
10 years ago
mengtianfang
8c594791a8
Add 2G1A uart support
1.Modify Targets/Bonito2g1a/Bonito/start_2g1a.S
initialize the 1A uart
2.Modify Targets/Bonito2g1a/Bonito/tgt_machdep.c
add dev ConfigTable for 1A uart
3.Modify Targets/Bonito2g1a/include/bonito.h
define 1A uart base addr
4.Modify pmon/dev/ns16550.c and pmon/dev/ns16550.h
define some functions to access 1A uart
Change-Id: I4f3067219ac9efdf19541e1e1cf7b4ef9992e1be
Target:LS2G1A
10 years ago
mengtianfang
c631a2c9b8
Add the cursor display.
1.Modify Targets/Bonito2g1a/conf/Bonito.2g1a
Add option CONFIG_VIDEO_SW_CURSOR
Change-Id: I0f58a36b60cf5db9063ef56bb5013b91da4d13e6
Target:LS2G1A
10 years ago
mengtianfang
19badfd192
The variable s in the function physio needs a initialisation value,
otherwise the usb keyboard cann't be used while USB CD-ROM being used to load,
because usb keyboard cann't be polled during this time.
The variable s is used for polling.
1.Modify pmon/fs/devfs.c
Change-Id: I8c783b0ce4e992b9cb896e1209dbb270eec75c8a
Target:2G5536/2G1A
10 years ago
mengtianfang
0071351eef
1.Modify pmon/common/main.c
The speed of programming flash pmon is very slow,
because the south bridge 1A hasn't been stopped.
2.Modify sys/dev/usb/usb_storage.c
Fixup the ohci_storage code bug about pioneer DVD-ROM.
According to the Change-Id: Iba56042f1d3596aa40bd85e05c908c4b2663ecd8
and Change-Id: I11b499266503fbdb2091484e5e18e9372beecf40 from lixuefeng.
Change-Id: I76d536e9cf1a43beb0bf3e07d2ee66c681918de7
Target:LS2G1A
10 years ago
Huang Pei
bb4d6c8d56
[3cserver]:porting 508a34afa4
to 3cserver
Change-Id: I0d53cad3d1be629ff03a2b62326157775114ab6e
10 years ago
Huang Pei
f56c2529eb
[3aserver]:porting 508a34afa4
to 3a2h
Change-Id: I6f436c7ae4e091e3622fe64eb4d2bf9275d38ef0
10 years ago