Xuefeng Li
83bbde115c
Setup coherent bit for non-coherent mode
Target:LS2K
Change-Id: I355a7d738ba0cffa93bccefb4ebc5adc84380cb7
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
yijun
f8ddb5878b
Fix bug of maxpayload size and max read request size.
The device will fixup the mps and mrrs size with the
minimal mps of the device and the bridge which belongs to.
The bridges should not fixup up mps and mrrs with its mrrs.
Change-Id: I01a90c6c7f69ac13bcea8efaf708afe106cdf7ce
7 years ago
zhangbaoqi
acc44ed86c
Fixup ls2k gmac driver code error.
Change-Id: I412b729260ef0d773c47ea385cfbb5eb88bf7f4f
7 years ago
Chen Xinke
8ec430b0f4
Fix multi-reboot stuck bug.
1. change the HT CRC error reset to infinite loop to fix boot stuck.
2. modify ls7a_config.h to make change HT GEN 1/3 easy.
Change-Id: Ifc0e003d73a4203284947a843ac67126fad71dc5
7 years ago
Chen Xinke
96f2d39f3d
change the LPC IO BAR to MEM BAR.
Change-Id: Ifda6634353bf462fc9f8406889ae5727c7203812
7 years ago
Chen Xinke
bea182fc3d
Fix 1way/2way board DDR stability.
1. configure 1way to 1.4G/600M, 2way to 1.2G/660M.
2. make the PLL configure easy.
Change-Id: I9a7b5ae5bf06d190a4eaf5cd030ce3f774fd80dd
7 years ago
yijun
7caa8d8813
Setup max payload size and max read request size.
Target:LS2K, LS7A
Change-Id: I602e3b3eba248a4e4aa3acde3b5bd30af1635aea
7 years ago
Chen Xinke
6c24f77ddd
Code fix:
1. Fix 2 way HT reset sequence when PCB connect HT rstn together.
2. Fix HT CRC error stuck.
3. Add support to LS7A1000 test mark.
4. Fix mc param predict precharge configure.
Change-Id: I5be2bf0b5ec2d45cdf8e64a73bdfc7ae41f0ff5a
7 years ago
Chen Xinke
b13a558832
Fix LPC IO-BAR fail problem.
Change-Id: I1b7b1c8f79523f366fa357bc83a193ff72d546d7
7 years ago
张宝祺
c52e173f6c
Merge "Setup PCIE DMA window for pci msi interrupt"
7 years ago
Xuefeng Li
95989de445
Setup PCIE DMA window for pci msi interrupt
Target:LS2K
Change-Id: I15e8e84587120406a3e502fada91761a656b4b7d
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
Chen Xinke
e147994555
Fix bug of x86emu process when enable LS7A LPC.
The old code forgets processing the high 16 bit of IO_BASE/IO_LIMIT.
Change-Id: If1c61ac0eea16f18015b5ee981e954ff6b3fa3dd
7 years ago
Chen Xinke
57062f63fd
Fix LPC header class code and IO BAR's size.
Powerdown SATA/PCIE PHY when not used to save power.
Add macro define to close integrate graphics module.
Change-Id: If530169c0c6efe41082431a2731d0220282da94d
7 years ago
Chen Xinke
a62773b4e3
Optimize power measurement LTC2946 driver.
Change-Id: Ic22a648d4f36b9512e5dad21cdab9a99dd3c9b51
7 years ago
Huang Shuai
5490aee875
fix the bus error exception of LW
Change-Id: If7d91441f01582e2ee04a54a233b75843ed096cd
7 years ago
Xuefeng Li
1b1ba8b1d6
Add APB member in struct pci_config_data array to set
apb bar address before running kernel.
Target:LS2K
Change-Id: I4b45990e854fc4ce575ac551a701322f903b7aa7
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
Xuefeng Li
6fea74e9b7
1.Change pci mem for pcie graphics card.
2.Clear bar0 reg of pcie brigde device.
Target:LS2K
Change-Id: I31acfbc18059dd9c4baf53ea0cbec93d284dc1bc
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
mashuai
51affc1637
Fixup the pci mem space conflict before run kernel
Target:LS2K
Change-Id: I0d04942754bdb4c484f8d87dc7022248ede55798
7 years ago
Xuefeng Li
7a71346f66
Set Max_Payload_Size & Max_Read_Request_Size for pcie bridge
Target:LS2K
Change-Id: Id41446b0794dd60120514cd90f532c5b73ee71d9
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
Xuefeng Li
2858a36a79
Set up the pci io/mem space and irq number before run kernel
Target:LS2K
Change-Id: Ida980ab5973e7f38468a5b190e6cfa367cd23cbe
Signed-off-by: Xuefeng Li <lixuefeng@loongson.cn>
7 years ago
Chen Xinke
09f5910d06
Fix HT PLL configure bug and opt FAN speed control.
Change-Id: I8ccea81448034ad054d38d6883dd03290bc1f0f8
7 years ago
Chen Xinke
a42938a015
Fix macro define sequence bug for 2way and skip HT bus reset when define no connect.
Change-Id: I7afb5aae5408ec1be5e91c44aea034310cefe4ba
7 years ago
zhangbaoqi
0c1186a4aa
Fixup ls7a code error it cause the 3a2h sata can not be used.
Set ls7a and ls2k sata to 2.0 mode.
Change-Id: I8e53f5a086610cad4b5b51c53048e35a9a067fcb
7 years ago
zhangbaoqi
f5a0f755bd
add ls2k graphics card support.
Change-Id: I82547c47bc38ff48f47eab1fa171567b34e2956b
7 years ago
Chen Xinke
b3d16404e6
modify HT 1.6G PLL configure parameter for better stability and move some macros from start.S to ls7a_config.h.
Change-Id: Ia1808a150e3bcac7ad99c6e082ce4775d5a9c1da
7 years ago
Chen Xinke
e474d94e0a
modify default HT1 setting to HT3.0 1600MHz, and 16 bit for 1 way, 8 bit for 2 way.
Change-Id: Ic76cc00babc0240dd277025fa7f7f5fadad83613
7 years ago
zhangbaoqi
c737c828cb
change config to support 3A3000_7A 1way and make it as default config.
Change-Id: I579a4d67a907be08508d260fb427a74bdbb8130a
7 years ago
zhangbaoqi
ee9334eb4a
add ls7a graphics card support.
Change-Id: Id33137844265484cd58e8ff76e5949bb16542cbe
7 years ago
Chen Xinke
e84dd74ac2
Fix problems for LS3A3000-7A 2way and change config to 2way.
Change-Id: I626ff5fc19906c04dc828ac2488c2c35ebb7ae37
7 years ago
Chen Xinke
0899c558ad
move ht init files to public dir and fix some codes.
Change-Id: Ifffdf462d1b3d87fd09c3e8425655d9ab3574322
7 years ago
Chen Xinke
1dc6c073d0
modify 3A-7A HT1 setup code parameter for better scalebility.
Change-Id: Ibe1ad59404653299ea7f9d8e241fba26a9a11a56
7 years ago
Chen Xinke
f50652de10
1. Update setup 3a7a HT1 link code and move ls7a configure to seperate file ls7a_config.h
2. remove 3A HT TX post window for dc accellerate because GMEM space is not fixed.
Change-Id: I586f7b51a1c71e757345012d40270657403d53e3
7 years ago
zhangbaoqi
0dc7b4917d
add delay after usb/sata PHY de-reset to fixup the device sometimes access error.
Change-Id: I08d82ef68b260d4ec7fac0d8c34e6c84a5aaec52
7 years ago
Chen Xinke
122984b983
Fix PCI scan bugs and clean pciconf.c file.
1. fix error on PCI bridge BAR space allocation.
2. fix error on PCI bridge expand ROM space allocation.
3. fix 7A/2K PCIE bridge wrong class/subclass code bug by fake the configure access return value.
Change-Id: I19a15959b2c4046f773707a3c605e893c3cf378c
7 years ago
Chen Xinke
2f75caf73e
Fix PCIE device found fail problem by correct the PHY cfg code.
Change-Id: Id5add3f844d171beda181cd88f51acbfcc86f342
7 years ago
zhangbaoqi
e726734c54
add USB3.0 device spi flash update support.
Change-Id: I110e0fe74d1e120f722b3f8dff5e9eb7fb5ebc27
7 years ago
zhangbaoqi
de02b0b8af
Add 3A3000 + LS7A board support.
Change-Id: Iaebaa30d5a7b6f0d781940a2cab6db9d83c2b693
7 years ago
Xuefeng Li
e1143a1ebc
2K1000: Disable clear memory/io access bit when stop ohci DMA.
Change-Id: I6c66e6024dbf3d256f80e688e68b873fb5439c77
7 years ago
liuzhijia
ca1dd680c8
For 3a9780e & 3a92h
1. Add the ODT set
2. Change some dipicted message
3. Support the 16 mode & 32 mode(7A)
Change-Id: I009efa1be8fb2746eadad9df2e207771fd64401b
7 years ago
zhangbaoqi
7b9a766d45
ls2k remove some useless code.
Change-Id: I6ef07ced1412d9e957b83074eb6f1437706d8eaf
7 years ago
zhouxuezhi
f3ae3a3b54
fix the compile error(u64 redefine) .
relevency:3A2H 3A82H 3A92H
Change-Id: If08e9b96ffcef63df07cbfa443a52ed51b4af232
7 years ago
zhangbaoqi
272d3eb1ce
fixup the intel 82574 can not used on ls2k board
Change-Id: I1d6662d3794ee5b782e58d9d0ba6281fa7125dff
7 years ago
zhangbaoqi
338607f49e
add sysfan speed control by w83527 chip for 3A9780E
Change-Id: I8dba6b49a52e49ca64af3e5c16c8df8e6ab1165d
7 years ago
zhangbaoqi
81dd6a0497
enlarge ddr parameter number to 116 for 3a3000
Change-Id: Ic70a623f35482e9625488230dab3f42d42b2ac47
7 years ago
liuzhijia
441da71a2a
fix ddr pll config method for 3a9
Change-Id: I21d2e0f0a8b29c9db5a115043d33b2964d84ee34
7 years ago
liuzhijia
2d24d34fb4
1. Add new leveling file to 3a92h 3a9780e and 3a84w
2. Repair some old problem
3. Fixup the lthalf param for 3a92h
4. Support a kind of SODIMM
Change-Id: I2a4cc0c2d79c353f219e8bc32d5619c079e7cc65
8 years ago
zhangbaoqi
1e17e46211
Fixup the gmac1 phy address for it can be used.
Change-Id: I10c44dedd4e75c47001d30d83a7c778013b90344
7 years ago
zhangbaoqi
c4924ffcf4
Add the LOONGSON 2K support.
Change-Id: I982c1da3b68f7d034d85406e14c5fb2264255d1d
7 years ago
Huang Shuai
3030990631
fix ddr pll config method for 3a9
Change-Id: Ibaebb470f2feced7e5a33dbc36bcd90fc4999c55
7 years ago
zhouxuezhi
422dc5e7af
1.Modification of file bootparam.h based 3.10.0 ;
2.Modify 'cpu_type' according to the interface spec;
3.Initialize the member of DoSuspend(for 3A_SINGLE);
4.Add the spec version macro 'SPEC_VERS';
Change-Id: Ideb212d0c5e6f67506954a428642e21d53ccd0ce
relevancy:all branch.
7 years ago