1324 Commits (452ced32a9034a4b5215e3524a8cf5baef738e29)
 

Author SHA1 Message Date
Xuefeng Li 83bbde115c Setup coherent bit for non-coherent mode 7 years ago
yijun f8ddb5878b Fix bug of maxpayload size and max read request size. 7 years ago
zhangbaoqi acc44ed86c Fixup ls2k gmac driver code error. 7 years ago
Chen Xinke 8ec430b0f4 Fix multi-reboot stuck bug. 7 years ago
Chen Xinke 96f2d39f3d change the LPC IO BAR to MEM BAR. 7 years ago
Chen Xinke bea182fc3d Fix 1way/2way board DDR stability. 7 years ago
yijun 7caa8d8813 Setup max payload size and max read request size. 7 years ago
Chen Xinke 6c24f77ddd Code fix: 7 years ago
Chen Xinke b13a558832 Fix LPC IO-BAR fail problem. 7 years ago
张宝祺 c52e173f6c Merge "Setup PCIE DMA window for pci msi interrupt" 7 years ago
Xuefeng Li 95989de445 Setup PCIE DMA window for pci msi interrupt 7 years ago
Chen Xinke e147994555 Fix bug of x86emu process when enable LS7A LPC. 7 years ago
Chen Xinke 57062f63fd Fix LPC header class code and IO BAR's size. 7 years ago
Chen Xinke a62773b4e3 Optimize power measurement LTC2946 driver. 7 years ago
Huang Shuai 5490aee875 fix the bus error exception of LW 7 years ago
Xuefeng Li 1b1ba8b1d6 Add APB member in struct pci_config_data array to set 7 years ago
Xuefeng Li 6fea74e9b7 1.Change pci mem for pcie graphics card. 7 years ago
mashuai 51affc1637 Fixup the pci mem space conflict before run kernel 7 years ago
Xuefeng Li 7a71346f66 Set Max_Payload_Size & Max_Read_Request_Size for pcie bridge 7 years ago
Xuefeng Li 2858a36a79 Set up the pci io/mem space and irq number before run kernel 7 years ago
Chen Xinke 09f5910d06 Fix HT PLL configure bug and opt FAN speed control. 7 years ago
Chen Xinke a42938a015 Fix macro define sequence bug for 2way and skip HT bus reset when define no connect. 7 years ago
zhangbaoqi 0c1186a4aa Fixup ls7a code error it cause the 3a2h sata can not be used. 7 years ago
zhangbaoqi f5a0f755bd add ls2k graphics card support. 7 years ago
Chen Xinke b3d16404e6 modify HT 1.6G PLL configure parameter for better stability and move some macros from start.S to ls7a_config.h. 7 years ago
Chen Xinke e474d94e0a modify default HT1 setting to HT3.0 1600MHz, and 16 bit for 1 way, 8 bit for 2 way. 7 years ago
zhangbaoqi c737c828cb change config to support 3A3000_7A 1way and make it as default config. 7 years ago
zhangbaoqi ee9334eb4a add ls7a graphics card support. 7 years ago
Chen Xinke e84dd74ac2 Fix problems for LS3A3000-7A 2way and change config to 2way. 7 years ago
Chen Xinke 0899c558ad move ht init files to public dir and fix some codes. 7 years ago
Chen Xinke 1dc6c073d0 modify 3A-7A HT1 setup code parameter for better scalebility. 7 years ago
Chen Xinke f50652de10 1. Update setup 3a7a HT1 link code and move ls7a configure to seperate file ls7a_config.h 7 years ago
zhangbaoqi 0dc7b4917d add delay after usb/sata PHY de-reset to fixup the device sometimes access error. 7 years ago
Chen Xinke 122984b983 Fix PCI scan bugs and clean pciconf.c file. 7 years ago
Chen Xinke 2f75caf73e Fix PCIE device found fail problem by correct the PHY cfg code. 7 years ago
zhangbaoqi e726734c54 add USB3.0 device spi flash update support. 7 years ago
zhangbaoqi de02b0b8af Add 3A3000 + LS7A board support. 7 years ago
Xuefeng Li e1143a1ebc 2K1000: Disable clear memory/io access bit when stop ohci DMA. 7 years ago
liuzhijia ca1dd680c8 For 3a9780e & 3a92h 7 years ago
zhangbaoqi 7b9a766d45 ls2k remove some useless code. 7 years ago
zhouxuezhi f3ae3a3b54 fix the compile error(u64 redefine) . 7 years ago
zhangbaoqi 272d3eb1ce fixup the intel 82574 can not used on ls2k board 7 years ago
zhangbaoqi 338607f49e add sysfan speed control by w83527 chip for 3A9780E 7 years ago
zhangbaoqi 81dd6a0497 enlarge ddr parameter number to 116 for 3a3000 7 years ago
liuzhijia 441da71a2a fix ddr pll config method for 3a9 7 years ago
liuzhijia 2d24d34fb4 1. Add new leveling file to 3a92h 3a9780e and 3a84w 8 years ago
zhangbaoqi 1e17e46211 Fixup the gmac1 phy address for it can be used. 7 years ago
zhangbaoqi c4924ffcf4 Add the LOONGSON 2K support. 7 years ago
Huang Shuai 3030990631 fix ddr pll config method for 3a9 7 years ago
zhouxuezhi 422dc5e7af 1.Modification of file bootparam.h based 3.10.0 ; 7 years ago