1. Disable LPC CTRL/MEM/MMIO-BAR and set them to fix address.
CTRL: 0x10002000~0x10002fff;
MEM: 0x12000000~0x13ffffff;
IO: 0x18000000~0x1801ffff;
As the kernel need also be modified to reserve the low 128KB IO space and skip LPC BAR, so we disable board LPC now.
The GPU emu code is also modified.
2. Fix GPU/DC class code.
3. Disable 3A HT dw_write to support mask write and change the PIX pll default setting.
4. Fix WatchDog control defination.
5. Disable HT freq soft configure to fix possible HT link fail. And add check of HT pll lock.
Change-Id: I1ac3eaacc1fcda52b8ae1a0dbbdc0306833da7dc
1.
Targets/Bonito3a2h/Bonito/loongson3_HT_init_2h.S
Targets/Bonito3a82h/Bonito/loongson3_HT_init_2h.S
use window 5(no use before) for pcie graphic card in this patch
2.
pmon/cmds/pcicmds.c
sys/dev/pci/pciconf.c
sys/dev/pci/pcireg.h
sys/kern/subr_autoconf.c
sys/linux/io.h
x86emu/int10/generic.c
x86emu/int10/helper_exec.c
x86emu/int10/xf86int10.c
these file are basic code that modified in this path
3.
Targets/Bonito3a2h/Bonito/loongson3_HT_init_2h.S
Targets/Bonito3a2h/Bonito/tgt_machdep.c
Targets/Bonito3a2h/conf/Bonito.3a2h
Targets/Bonito3a2h/pci/ls2h_pci.c
Targets/Bonito3a2h/pci/pci_machdep.c
Targets/Bonito3a82h/Bonito/loongson3_HT_init_2h.S
Targets/Bonito3a82h/Bonito/tgt_machdep.c
Targets/Bonito3a82h/conf/Bonito.3a82h
Targets/Bonito3a82h/pci/ls2h_pci.c
Targets/Bonito3a82h/pci/pci_machdep.c
these files have only relate to 3a2h and 3a82h
Change-Id: I4a182bcbb8ca83f3fd34028145d362e7d2e683f0
1:add Targets / Bonito2g1a director
2:add zloader .2 g1a director
3:add LOONGSON2G1A configure option
4:add start_2g1a.S and modify some config window
5:fixup some problem to support 2 g1a in start_2g1a.S
6:disable some funtions, then the pmon can run on command line
Change-Id: I19ee7a6d90c7efda3d6e986d12903da20ccc6ad5
Target:LS2G1A
the rom code will be loaded fail sometimes.
Now we flush the cache which match the pci rom space will fixup the bug.
Change-Id: Ie501897423e238a1a413f20f543a4a37c96becf9
Target:2G5536
When the discrete graphic in COM21 slot,use it firstly
and the intergrate graphic can not work.
If nothing in pcie-slot(COM21),use the intergrate graphic.
pmon/cmds/bootparam.c: In this file, use the special->resource[0] to
pass the sharevram and vramsize to the kernel.And you must use special->resource[0]
to pass the two values.
NOTICE:
1, This function only work well for ati-card and nvida card do not be supportted.
Now,HD4500,HD4350 and HD5750 have been tested. They are OK.
2, When you open the CONFIG_UMA to use UMA modle in PMON, you can not use the discrete graphic.
Target:Bonito3a780e,Bonito3b780e,Bonito3c780e
When you use AST2050' VGA,you should open USE_BMC and VGA_BASE=0xb4000000 options.
Default:
rs780e vga option has been open:
USE_780E_VGA
VGA_BASE=0xbe000000
Targets: Bonito3aserver
Now support GFXUMA and GFXSP mode includes: SP mode (2G,4G)X(64M,128M),UMA mode
(2G,4G)X(64M,128M,256M,512M). Notice that: In UMA mode, change physical memory
address starting from 0x80000000 in order to satisfy 32-bit pci config address
access to internal gfx device. So This bios can go ok only with the suitable
kernel image in which pysical memory address also begins with 0x80000000. In UMA
mode, if glxgears is running, sometimes black screen will appear, this may be due
to it uses too much system bandwidth. While in SP mode, this problem never occures.
Now video frame buffer size can be assigned in configuration file:Bonito.3a780e,
Changing "VRAM_SIZE=128" means set video memory size to be 128M in UMA or SP mode.
No other code need to be changed. Notice: in GFX_SP mode, max video ram size is 128M
becasue of the graphic memory capacity limit in LS3A780E board at this moment.
Submmited and tested by xiaqichao@ict.ac.cn
Target:Bonito3a780e
Now all the video memory(128M) of the graphic memory chip on LS3A780E board
are availabe. By the way, enlarge usable PCI MEM size from 0x0400000 to
0x40000000, this size shoulde be enough for lots fo bridge chip groups at
this moment. Network, usb device and ps2 keyboard are all normal both in BIOS
and kernle. Thanks xiangy@lemote.com.
NOTICE HERE: the vga bios base address of gpu driver in kernle code should
be changed to 0xc7f00000 from original 0xc7f00000 if this patch is applied,
otherwise no vga or graphic output during boot kernel.
Target: Bonito3a780e
large video frame buffer up to 512M for bridge chip connected with HT bus.
It PASS test only in GUP_SP mode, which is the defalut mode in 3A780e branch of PMON.
Address space between 0x40000000 and 0x7fffffff is map to 1G memory space before, now
system momery size is at leaset 2G, so the space is left free to be used as PCI MEM space.
While PCI IO Space and HT Space is the same as before.
NOTICE: pci mem space base address need to be changed to 0x40000000 in kenrel source code
if this patch is applied, otherwise kernel will boot fail. If the bridge chip is connected
to PCIX controler in Loongson CPU, this patch should be changed to be applied.
Target: Bontio3a780e
1. Add Macro RS780E, USE_780E_VGA to indicate using 780e's vga with macro SERVER_3A to identify this board
2. Now framebuffer can only be accessed through pci mem address for tlb not configured properly
3. Device 2 and Device 3 should not be opened, otherwise VGA could not work
1. Porting the 3A+690E x86emu module to 2G+690e platform and it works
correctly.
2. The HT frequency is adjusted to 800MHz.
3. The start address of PCI IO and memory space are adjusted according
to the 3A+690E platform.
4. The framebuffer address(0xb0000000) doesn't map through TLB. The
pcitlb.c is added in start.S, but it doesn't work.
5. Fix the IO-read/write base from 0xa000_0000 to 0x0000_0000 in
sys/linux/io.h.
change sm502's rgb12 to not default.
add x86emu testchar() to debug and emulate inb 0x61.
git-svn-id: file:///svn/pmon-all/pmon-all@276 214b0138-1524-0410-9122-e5cb4b5bc56c
Chen Xinke
zhangbaoqi
zhuchen
mengtianfang
Zhigang Liang
lixuefeng
sizhiying
meiwenbin
wanghongmei
xiaqichao
TAI Yunfang
LI Wengang
LIU Qi
wanghuandong
wanghuandong
qiaochong
root
cpu
root