Update version according to Loongson firmware version
spec released on 2021/1/28.
Change-Id: I5256f80123b52aa537ca9c4c4ccce000ac28491d
Signed-off-by: lvjianmin <lvjianmin@loongson.cn>
Check the mac addr in dtb & eeprom after boot, or after load_dtb;
If mem size in dtb is larger than max mem size, abort cmd "g";
Change-Id: I7b122658199915493a79cc99812485f43dc08c35
when running on a build machine, the output of 'date' command can be affected by the locale
setting of the host.If the host locale is zh_CN, then the output is chinese and may not be
proper displayed. Set the locale to en_US.UTF-8, no chinese output.
Change-Id: Ie16d5ec9ec2b576858e605a8f575409b224aff31
Now ls3c2h platform support added, SPI flash/AHCI sata/Gmac/LPC/DC
are all OK, however there are still some work to do:
1.The command "ifaddr eth0" can't work, but "ifaddr syn0" works;
2.It hasn't been test with Dimms on con5 and con7;
3.CPU Frequency aren't calculated by RTC, it's fixed by program.
4.It cost ls3c a long time to wait Vide Ram intilized by ls2h, the
time should be shrunken largely.
Target: Bonito3c2h
Original code only support boot from LPC, now boot from SPI flash
is OK. Original code only support some spi command such as "spiid",
"spiprogram" and "spierase", now 4K-erase and othe sector size is
support. Original spi driver code can't save enviroment variable,
Now enviroment variable can be saved, and command such as "set" and
"unset" are both OK. By the way, now more SPI flash types are supported,
user just add flash type in "pmon/dev/flashdev.c".
Target:Bonito3c780e
1, Original code the CPU temperature is wrong, now we change reading mechanism of the CPU temperature.
2, Change the code position of initialization function "loongson_smbios_init" into the function "dbginit".
3, Add uuid support for smbios.
4, Optimization some details about smbios.
Targets: all
When you use the smbios, you need to run the "dmidecode" command to see some information
in the kernel.
Now the smbios support the following form:
BIOS Information, System Information, Base Board Information, Processor Information,
Temperature Probe, End Of Tabele.
Thanks meiwenbin@loongson.cn and fandongdong@loongson.cn
Targets: all
Now ohci usb mode support is added, both usb keyboard and usb disk
are ok. However, only DELL usb keyboard pass test. It's said this
is maybe becuase the usb signal is not very good.Thanks ZangJiading.
NOTICE:if BIOS option "INTERFACE_3A780E" is removed, usb keyboard
will fail to use, becuase some usb keyboard poll code won't be executed
if micro "INTERFACE_3A780E" isn't defined. By the way, the option
"INTERFACE_3A780E" has no relation with RS780E, it's used to mean
BIOS MENU and windows interface is enable.
Target:Bonito3a2h
1, This version currently supports the processor core, UART, I2C bus, DDR2 controller,
GMAC controller, NAND controller, interrupt controller, the LPC controller, SPI controller,
HDA controller, the RTC, Watchdog, the HT interface.
2, This version does not support media processors, GPU, Display Controller, SATA controller,
USB 2.0 controller, ACPI power management, PCIE interface.
3, If you want to fall back to the previous version, please use the following command:
"git clone http://10.2.5.28/gitweb/pmon-loongson3a+2h", then git reset to the place you want to reach.
Before this patch, user has to test a lot of options to disable/enable
gpu driver, even some branch fail to pass compilation. Now all options
related with gpu driver selection is placed together. User can disable
or enable them together. It has passed compilation in all branches both
with gpu driver and without gpu driver support. It has pased test on in
ls3a780e branch in both mode with and without gpu driver.
Target:Bonito3a780e, Bonito3b780e, Bonito3c780e,Bonito3aserver,Bonito3bserver
Before: The code of kernel should be modified corresponding to computer of different
type.
Now: The code of kernel neednot be modified if we change the type of computer. The
realizing method is reserving low memory space to complete the function that transfers
poweroff/reboot from kernel to bios for 3A/3B.(BIOS PART) When we input "poweroff" in
the kernel, it will jump to the bios to execute the command.
Test method: Input the command of "poweroff" or "reboot" in the kernel, it will shut
down or restart.
Target: All
Before: LSI 8708EM2 SAS RAIDm can not work.
Now: LSI 8708EM2 SAS RAIDm can work.
Test: In pmon, LSI 8708EM2 SAS RAIDm can work.
Thanks wanchao@loongson.cn
Targets:Bonito3asever
Before: The pmon haven't a ShowBootMenu switch.
Now: The pmon have a ShowBootMenu switch.
Test: Start to pmon state, ShowBootMenu switch is turned on by default, when setting ShowBootMenu to no, you can turn off this switch.
Targets: all
For files:
bootparam.h : structs to hold the interface.
bootparam.c : give the value to interface.
env.c : build this interface as an enviroment.
main.c : put the interface pointer into a2 register which will be passed
to the kernel.
Thanks sizhiying@loongson.cn
Signed-off-by: mengxiaofu <mengxiaofu@ict.ac.cn>
Now, ddr2/ddr3 can use the same codes and can be detected autoly.
Default:
ddr3 option has been open.So,you can use for ddr3-server.
If,you want to use ddr2:
you should close DDR3_DIMM option which is in "Targets/Bonito3aserver/conf/Bonito.3aserver" file.
Thanks chenxinke@ict.ac.cn and sizhiying@loongson.cn
Target:Bonito3aserver
routing
add the command "windows" to check L1 cross bar and L2 cross bar
windows, use
this command to verify whther the configuraton fit below rules:
1.Move PCI MEM base from 0x10000000 to 0x40000000
2.The interrupt line register of all devices in the pci/pcie device on
3a780e
has bee assigned
Now the interrupt line checking has been done after setting interrupt
line register,
and only configuration with 2GX1 and 2GX2 memory can pass test. By the
way, replace
some unused code with interrupt talbe.
Target: Bonito3a780e
1. Porting the 3A+690E x86emu module to 2G+690e platform and it works
correctly.
2. The HT frequency is adjusted to 800MHz.
3. The start address of PCI IO and memory space are adjusted according
to the 3A+690E platform.
4. The framebuffer address(0xb0000000) doesn't map through TLB. The
pcitlb.c is added in start.S, but it doesn't work.
5. Fix the IO-read/write base from 0xa000_0000 to 0x0000_0000 in
sys/linux/io.h.
QiaoChong
lvjianmin
xuwenrui
zhangbaoqi
lixuefeng
wanghongmei
Huang Pei
Liu Shaozong
xiaqichao@ict.ac.cn
Zhang Lihong
HUO Wenyang
Chen Xinke
meiwenbin
xuhaoyu
sizhiying
mengxiaofu
LI Wengang
root
root
root
root