Chong Qiao
df3068d31e
del u64 typedef, has been defined sys/linux/types.h.
Change-Id: I9c32efee30a4a95adcff4dff316dca81de13f5fd
Signed-off-by: Chong Qiao <qiaochong@loongson.cn>
4 years ago
zhangbaoqi
75c695d4de
Add LS3A4000+LS7A support
Change-Id: I75c3fd7abe373364f4f61003bb7b659497f766c4
4 years ago
wusheng
a982a1598d
Loongson3A7A: add 83627 superio driver for EVB_V1.3
Change-Id: I4dce57dfadbca86bec678501ad95d58ebbe0cbd0
6 years ago
wusheng
22dd2d1001
Add config of CORE_FREQ
Change-Id: I386081d12a10b105a9b9d17edd428d9b38bbbe40
6 years ago
wusheng
ed090ea5ce
Fix bug caused by commit 2dec78933f
3a3000 tRFC reconfig and other leveling modified
Change-Id: Ia91782cb5f3d81f21d7595be479c9f320db89b64
6 years ago
xuwenrui
21460b17a0
Set HT-access cache/uncache before goto kernel
Target:LS3A8 LS3A9
Change-Id: If6f56ed90ee6911391ca4886ad7abf0ac956beb6
6 years ago
QiaoChong
ddcf059d5b
spi write byte need wait sr to wait complete.
Change-Id: Ife9654c821140db2a03066280efd74f524947629
Signed-off-by: QiaoChong <qiaochong@loongson.cn>
6 years ago
liuzhijia
2d24d34fb4
1. Add new leveling file to 3a92h 3a9780e and 3a84w
2. Repair some old problem
3. Fixup the lthalf param for 3a92h
4. Support a kind of SODIMM
Change-Id: I2a4cc0c2d79c353f219e8bc32d5619c079e7cc65
8 years ago
Huang Shuai
11478f5582
unify DISABLE_DDR_A15 for 3A2000 and 3A3000
Change-Id: Ia2b9d3382b8abfb88934db74cd9284f585c4eaaa
7 years ago
zhangbaoqi
a6c96464f9
Add the ddr leveling for 3A3000 and 3A2000
Add signal depict func and fix a bug in leveling
Change-Id: Ibeeb3954f69aa4719f321031146c212866f6a0df
8 years ago
zhangbaoqi
984de8613a
Update the 3A3000 BBGEN configuration.
Fixup the RS780E HT post error.
Change-Id: Ie6ba53c82b414d96a82c4974a698104c30d146a1
8 years ago
Wang Huandong
687c6dee6e
fix the NODE3 problem by disable the path from node0 to node3
Change-Id: Iefd2528ecccd81463ef2e25c9feec58b5ad073dc
Target:3A84W
8 years ago
zhangbaoqi
1939f30913
When the 3A84W HT link failed,watch dog reboot the board
Change-Id: Ifd0aa3406cb5ee003519760cc5c795c5401aad6d
Target:3A84W
8 years ago
lixuefeng
269e6bc5d8
Fixup highmem size for loongson3
Change-Id: I0950840d2d26cada71d2c0330086dcbb84b4717a
8 years ago
zhangbaoqi
c9008bf63b
1.Fixup the mainframe chassis power LED and front usb ports errors
2.Fixup the new board GPIO i2c error
3.Fixup the pcie bus2 device irq error
Change-Id: Ia5d902efbbb5f16b8080a01ed0afef694c813a6a
Target:3A84W
8 years ago
zhangbaoqi
1a7f4a6bfa
1.Fix the Scache and HT LL/SC random latency
2.Add HT config for catch the cross node exception address Target:3A84W
Change-Id: I4537f0840135c04d7179562a2568cc76925cc635
Target:3A84W
8 years ago
zhangbaoqi
fa6432197a
Add support board boot from spi or lpc.
Target:3A84W
Change-Id: Ifc02bebf6306bc5ec1ea911c48f6ae13c8e970af
9 years ago
zhangbaoqi
ce205e06ef
Remove the DDR_DLL_BYPASS definition because it cause memory access exception.
Target:3A8
Change-Id: I012d008815bfa68a793520f3ba1f7fc743faab1f
9 years ago
zhangbaoqi
9cb8b73479
change include file for loongson3C_ddr3_leveling.S
Change-Id: I34f29a7055450ca26cde2acffac91ab152bd763e
9 years ago
zhangbaoqi
04a4e905ef
make loongson3C_ddr3_leveling.S a unique file for 3a84w and resume the commit(9887e) for the common same file
because the change for 3a84w will cause 3a8780e stuck(DDR400M, Kingston 2G UDIMM)
Change-Id: I994ab9bf2793ec5263a885c27785bc067fbcaf3b
9 years ago
zhangbaoqi
bf5007433f
Add the W83795ADG chip init for through temperature control fan speed.
Change-Id: Ia8fe64a78c62e647c211eeadbfe229288db1f97a
Target:3A84W
9 years ago
zhangbaoqi
eb64bc04fd
Assign irq4/irq5 to bnx0/bnx1(04:00:0/04:00.1)
Change-Id: I95b6bf6b3a4930eb959ffc0aeee78b680cf11711
Target:3A84W
9 years ago
zhangbaoqi
35ad0d396f
Improve the X link frequency to 1.6G.
Enable DDR read interleave improve the the performance.
Change-Id: I373d8f4841abd911f1d45aa6d600717c706b3420
Target:3A84W
9 years ago
zhangbaoqi
a60b3b7429
Program the BNX flash make the net card can be used and add the set MAC function.
Change-Id: I1d40ffeb96f62ee73905c534c643eed7f3a83eb0
Target:3A84W
9 years ago
zhangbaoqi
9887acf4fc
reverse rddqs_lt_half set method to fix ddr stuck problem.
Changed the ddr i2c address for the node get ture infomation.
Change-Id: Ibe3912682d6b1b5cc03787434a40e4e5c7da6893
9 years ago
zhangbaoqi
ab5588e66f
3A8: Fix the ddr freq show error.
Change-Id: Ie2a4bbc88306b12276b93347afbf6f7ec22a7161
9 years ago
zhangbaoqi
9a3298d7ff
3A84W: Add the reboot function,set the gpio 14 output zero for the display shift rs780e VGA.
Change-Id: Ib5266e3e857e51e116765d6f33df7cebbfdcce3e
9 years ago
zhangbaoqi
4e71ace66f
From: Wang Huandong <wanghuandong@loongson.cn>
Target: Bonito3a84w
1. add define for printing DDR params
2. add multi-thread ddr init (but disabled, because boot is soon enough if not printing DDR params)
3. enable the AUTO_DDR_CONFIG
Change-Id: I8f9c6be423750d49a071558a3860a473ca952077
9 years ago
zhangbaoqi
5536aedc3a
From: Wang Huandong <wanghuandong@loongson.cn>
Target: Bonito3a84w
1. add debug HT RX signals in loongson3_HT_init.S (disabled)
2. change clock frequency to 800/533
3. change the DDR3 params and pass the memory test
4. fix the conf files (AUTO_DDR_CONFIG not supported yet)
5. fix the command files about kernel parameters
6. fix the i2c read by GPIO
Change-Id: I6ceba17f5f149e16615caec2fb9e0726d2840b3e
9 years ago
Wang Huandong
f2c9c8d75d
Add 3a2000 4 way
Change-Id: I71978f74f26aca443100136e1e50dd2280f031e3
9 years ago