xuwenrui
21460b17a0
Set HT-access cache/uncache before goto kernel
Target:LS3A8 LS3A9
Change-Id: If6f56ed90ee6911391ca4886ad7abf0ac956beb6
6 years ago
baoqingyuan
2b10ae1fb9
3a2000 dll clk loop test trainning
Change-Id: I81b81bad270d8080efcd89171d879e4cc093d9c2
7 years ago
Huang Shuai
11478f5582
unify DISABLE_DDR_A15 for 3A2000 and 3A3000
Change-Id: Ia2b9d3382b8abfb88934db74cd9284f585c4eaaa
7 years ago
zhangbaoqi
984de8613a
Update the 3A3000 BBGEN configuration.
Fixup the RS780E HT post error.
Change-Id: Ie6ba53c82b414d96a82c4974a698104c30d146a1
8 years ago
liuzhijia
23ca286d55
add the func to 3a2000 and 3a3000 @leveling
Change-Id: Ie98c8690afdba444b18fee9beca702b9fbfec208
8 years ago
lixuefeng
269e6bc5d8
Fixup highmem size for loongson3
Change-Id: I0950840d2d26cada71d2c0330086dcbb84b4717a
8 years ago
lixuefeng
53ce8f62db
Fixup the CPU and memory frequency display
Target:LS3A2000780E
Change-Id: Ia87a518a7cf5cd7914f07d50b9e30e68a02a330b
9 years ago
zhangbaoqi
ab5588e66f
3A8: Fix the ddr freq show error.
Change-Id: Ie2a4bbc88306b12276b93347afbf6f7ec22a7161
9 years ago
Huang Shuai
a193d5320f
change DDR DLL to nobypas mode, now reboot and stability test OK
Change-Id: Id5e90de194e1e9ce455e9718eb75dbcd8e8302db
9 years ago
Huang Shuai
60696fe9ae
add support for kingston 2G UDIMM at 400MHz
Change-Id: I96b97ed379698fb3ca3b51e1daca156b232a74c6
9 years ago
zhangbaoqi
90fa065c22
3A8:Disable 3A2000 sw combine function.
Change-Id: I3ffa94f5154ed4942d2b8cdc5574fac77c9655f5
9 years ago
Huang Pei
e6a25897a0
fix unintended address mapping and two ehci bar issue on 3a780e, 3a8780e,
3cserver, 3c780 and 3aserver
*. pcitlb.S mapped 33 instead of 32 tlb entry, the 33th of which mapped
cpu address 0x0 ~ 0x2000000 to physical address 0x8000 0000 ~ 0x8200 0000.
This COVERS NULL reference
*. ehci device was not enabled, so did not get bar initialized
during PCI bus enumeration
*. value in BAR0 is PCI address space, when need CPU address
tranformation
Change-Id: I576534bf61c7cd374dc2917454b8818e793851a6
9 years ago
Huang Pei
b614242f9a
power down pll L1 first for 3a8
Change-Id: Ife77af9549a2631871e56d27b7c678b931d46812
9 years ago
Huang Pei
76b496aa79
Fix the bug of the hot-fix code for mother-board lack of DDR_A15 pin. (please define DDR_ADDR_PIN_15 before including "loongson*_ddr2_config.S")
Change-Id: I49df2a53d9e92a4a2e707ef254ad4bb2a5d761fa
9 years ago
Huang Shuai
96cbab3242
optimise the 3a8780e DDR performace at 667MHz for SCS 8G RDIMM(the RL and tRFC almost the minimum), now 2MC 667MHz SPEC refx3 pass
Change-Id: I3dec9f22f36ec1109c5d0c975f0e033f8b1ab61e
10 years ago
Huang Pei
0322aa5c50
merge 3a8b93c319872db52a4566efbab86634c5d65be9 from Huang Shuai change parameter for RDIMM on 3a8780e, now the 2 channel RDIMM can work at 667MHz stable
Change-Id: I16b6fcfa6c911720d74065e3106fdbe0e0feaa39
10 years ago
Chen Xinke
943fa7143a
Organize the MC initialization related code for 3B5+/3A8.
1. put the Memory controller/chip-specific code into separate files.
2. Clean up the Bonito directory of some branch.
Change-Id: Idf6a4cab4fa1b9af3b819756d69da036f7cfac4a
9 years ago
Huang Pei
8a184568ef
print BogoMIPS for new board instead of cpu freq
Change-Id: I90005a453ed80ed911c7ef112cb0d8e51ca0e3c9
10 years ago
Huang Pei
00e4cdda69
fix board info description
new board define board_device_info() overriding the default one in
pmon/common/bootparam.c
Change-Id: I53e896e52be941c70052fd69622bfb296ce6d396
10 years ago
Huang Pei
0499cdba70
assume all cores are ok
Change-Id: I7d76d4c50baa63046a0870bfb1b2475e2e02b659
10 years ago
Huang Pei
2df9c7d9e6
add L2 Xbar Scache interleave, disabled by default
Change-Id: Ica5da5e76f2653f8d5178d1bd7ce1cdef8684d43
10 years ago
Huang Pei
eda4112f1d
fix the cp0 prid to 0x146308
Change-Id: I17b94d180e4fa1ff5993947f1c8dca44c82a9930
10 years ago
Huang Pei
9eff8640dd
clean up start.S and let the beep out
Change-Id: I7eb28037c0c0cabd7d74ca1f055df3bc8f0a7c45
10 years ago
Huang Pei
810f8983b8
remove duplicated win configuration and add scache selection (no used by default)
Change-Id: I984e228271dca240990dd50c36c45f6611bcb64e
10 years ago
Huang Pei
39045092a4
remove unused files and clean up indent
Change-Id: I638cd4f4d0663a0336c770660dad79c16b1d231a
10 years ago
Huang Pei
ed4ad00624
fix XIE set with ELPA by mistake
this make the boot core on 3a8 with XIE open by accident
Change-Id: I3e03bf322996b745abe550f14b31c7b888ab0da5
10 years ago
Huang Pei
acb5847b15
change mem freq info print
new board use define print_mem_freq to override the default
print_mem_freq in pmon/common/main.c
Change-Id: I78428515e2f8e9448f809447d5dfa57fa19f901b
10 years ago
Huang Pei
a13c95949c
import devel commit 34e8b77211a4c6c51ef99e027d4d34dde6f9d9e6 ON 3a878e
origin commit msg is:
Change parameter to optimise 667MHz DDR performance
(but this version may cause error, change tCCD to 0x6 can fix this error.
add MC1 DDR, 667MHz still has error, this version CPU 850MHz, DDR 600MHz,
SPEC ref pass)
Change-Id: I71e6a7d7271008509120293bc26d37bfd954b7f2
10 years ago
Huang Pei
ebc78ca3b8
import devel commit c36de43fb41bde2a57a262a1a0cf3d132d3ab655 from
Huang Shuai
origin commit msg:
Change ddr parameters, now 667MHz can pass ref (DDR Kinston UDIMM 667MHz,
CPU 800MHz, Note that the RDIMM parameter should be ignored now)
Change-Id: Icca937516d7d4b65bfabf2a84346bc9bd42960c5
10 years ago
Huang Pei
19b4cbf178
add 3a8780e support
Change-Id: Ib245ff02bb7f8f16d72f5fcdfa89b601be356bb6
10 years ago