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243 lines
7.1 KiB
243 lines
7.1 KiB
//Created by mtf for Display Controller pmon for 2f1a
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#include <pmon.h>
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#include <stdlib.h>
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#include <stdio.h>
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typedef unsigned long u32;
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typedef unsigned short u16;
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typedef unsigned char u8;
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typedef signed long s32;
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typedef signed short s16;
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typedef signed char s8;
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typedef int bool;
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typedef unsigned long dma_addr_t;
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#define DC_FB1 1
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#define DC_FB0 1
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#define writeb(val, addr) (*(volatile u8*)(addr) = (val))
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#define writew(val, addr) (*(volatile u16*)(addr) = (val))
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#define writel(val, addr) (*(volatile u32*)(addr) = (val))
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#define readb(addr) (*(volatile u8*)(addr))
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#define readw(addr) (*(volatile u16*)(addr))
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#define readl(addr) (*(volatile u32*)(addr))
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#define write_reg(addr,val) writel(val,addr)
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#define EXTRA_PIXEL 0
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#define DC_BASE_ADDR 0xb0301240
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#define DC_BASE_ADDR_1 0xb0301250
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#define GPUPLL_IN_25M_OUT_150M 0x1218
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#define RANDOM_HEIGHT_Z 37
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static char *ADDR_CURSOR = 0xb6000000;
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static char *MEM_ptr = 0xb4000000;
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static int MEM_ADDR =0;
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struct vga_struc{
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long pclk;
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int hr,hss,hse,hfl;
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int vr,vss,vse,vfl;
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}
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vgamode[] =
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{
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{/*"320x240_60.00"*/ 5260, 320, 304, 336, 352, 240, 241, 244, 249 },
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{/*"640x480_70.00"*/ 28560, 640, 664, 728, 816, 480, 481, 484, 500 },
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{/*"640x640_60.00"*/ 33100, 640, 672, 736, 832, 640, 641, 644, 663 },
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{/*"640x768_60.00"*/ 39690, 640, 672, 736, 832, 768, 769, 772, 795 },
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{/*"640x800_60.00"*/ 42130, 640, 680, 744, 848, 800, 801, 804, 828 },
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{/*"800x480_70.00"*/ 35840, 800, 832, 912, 1024, 480, 481, 484, 500 },
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{/*"800x600_60.00"*/ 38220, 800, 832, 912, 1024, 600, 601, 604, 622 },
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{/*"800x640_60.00"*/ 40730, 800, 832, 912, 1024, 640, 641, 644, 663 },
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{/*"832x600_60.00"*/ 40010, 832, 864, 952, 1072, 600, 601, 604, 622 },
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{/*"832x608_60.00"*/ 40520, 832, 864, 952, 1072, 608, 609, 612, 630 },
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{/*"1024x480_60.00"*/ 38170, 1024, 1048, 1152, 1280, 480, 481, 484, 497 },
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{/*"1024x600_60.00"*/ 48960, 1024, 1064, 1168, 1312, 600, 601, 604, 622 },
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{/*"1024x640_60.00"*/ 52830, 1024, 1072, 1176, 1328, 640, 641, 644, 663 },
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{/*"1024x768_60.00"*/ 64110, 1024, 1080, 1184, 1344, 768, 769, 772, 795 },
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{/*"1152x764_60.00"*/ 71380, 1152, 1208, 1328, 1504, 764, 765, 768, 791 },
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{/*"1280x800_60.00"*/ 83460, 1280, 1344, 1480, 1680, 800, 801, 804, 828 },
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{/*"1280x1024_60.00"*/ 10888, 1280, 1360, 1496, 1712, 1024, 1025, 1028, 1060 },
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{/*"1368x768_60.00"*/ 85860, 1368, 1440, 1584, 1800, 768, 769, 772, 795 },
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{/*"1440x800_60.00"*/ 93800, 1440, 1512, 1664, 1888, 800, 801, 804, 828 },
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{/*"1440x900_67.00"*/ 120280, 1440, 1528, 1680, 1920, 900, 901, 904, 935 },
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};
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enum{
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OF_BUF_CONFIG=0,
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OF_BUF_ADDR=0x20,
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OF_BUF_STRIDE=0x40,
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OF_BUF_ORIG=0x60,
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OF_DITHER_CONFIG=0x120,
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OF_DITHER_TABLE_LOW=0x140,
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OF_DITHER_TABLE_HIGH=0x160,
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OF_PAN_CONFIG=0x180,
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OF_PAN_TIMING=0x1a0,
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OF_HDISPLAY=0x1c0,
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OF_HSYNC=0x1e0,
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OF_VDISPLAY=0x240,
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OF_VSYNC=0x260,
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OF_DBLBUF=0x340,
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};
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int caclulatefreq(long long XIN,long long PCLK)
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{
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long N=4,NO=4,OD=2,M,FRAC;
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int flag=0;
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long out;
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long long MF;
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printf("PCLK=%lld\n",PCLK);
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while(flag==0){
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flag=1;
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printf("N=%lld\n",N);
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if(XIN/N<5000) {N--;flag=0;}
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if(XIN/N>50000) {N++;flag=0;}
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}
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flag=0;
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while(flag==0){
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flag=1;
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if(PCLK*NO<200000) {NO*=2;OD++;flag=0;}
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if(PCLK*NO>700000) {NO/=2;OD--;flag=0;}
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}
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MF=PCLK*N*NO*262144/XIN;
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MF %= 262144;
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M=PCLK*N*NO/XIN;
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FRAC=(int)(MF);
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out = (FRAC<<14)+(OD<<12)+(N<<8)+M;
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printf("in this case, M=%llx ,N=%llx, OD=%llx, FRAC=%llx\n",M,N,OD,FRAC);
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return out;
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}
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int config_cursor()
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{
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printf("framebuffer Cursor Configuration\n");
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write_reg((0xb0301520 +0x00),0x00020200);
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printf("framebuffer Cursor Address\n");
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write_reg((0xb0301530 +0x00),ADDR_CURSOR);
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printf("framebuffer Cursor Location\n");
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write_reg((0xb0301540 +0x00),0x00060122);
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printf("framebuffer Cursor Background\n");
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write_reg((0xb0301550 +0x00),0x00eeeeee);
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printf("what hell is this register for ?\n");
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write_reg((0xb0301560 +0x00),0x00aaaaaa);
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}
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static int fb_xsize, fb_ysize;
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int config_fb(unsigned long base)
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{
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int i,mode=-1;
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for(i = 0; i < sizeof(vgamode)/sizeof(struct vga_struc); i++)
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{
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int out;
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if(vgamode[i].hr == fb_xsize && vgamode[i].vr == fb_ysize){
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mode = i;
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out = caclulatefreq(APB_CLK/1000,vgamode[i].pclk);
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printf("out=%x\n",out);
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/*inner gpu dc logic fifo pll ctrl,must large then outclk*/
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*(volatile int *)0xb2d00414 = GPUPLL_IN_25M_OUT_150M;
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/*output pix1 clock pll ctrl*/
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// *(volatile int *)0xb2d00410 = out;
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/*output pix2 clock pll ctrl */
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*(volatile int *)0xb2d00424 = out;
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break;
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}
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}
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if(mode < 0)
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{
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printf("\n\n\nunsupported framebuffer resolution,choose from bellow:\n");
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for(i = 0; i < sizeof(vgamode)/sizeof(struct vga_struc); i++)
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printf("%dx%d, ",vgamode[i].hr,vgamode[i].vr);
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printf("\n");
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return;
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}
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// Disable the panel 0
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write_reg((base+OF_BUF_CONFIG), 0x00000000);
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// framebuffer configuration RGB565
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write_reg((base+OF_BUF_CONFIG), 0x00000003);
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write_reg((base+OF_BUF_ADDR), MEM_ADDR);
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write_reg((base+OF_DBLBUF), MEM_ADDR );
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write_reg((base+OF_DITHER_CONFIG), 0x00000000);
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write_reg((base+OF_DITHER_TABLE_LOW), 0x00000000);
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write_reg((base+OF_DITHER_TABLE_HIGH), 0x00000000);
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write_reg((base+OF_PAN_CONFIG), 0x80001311);
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write_reg((base+OF_PAN_TIMING), 0x00000000);
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write_reg((base+OF_HDISPLAY),(vgamode[mode].hfl<<16)|vgamode[mode].hr);
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write_reg((base+OF_HSYNC),0x40000000|(vgamode[mode].hse<<16)|vgamode[mode].hss);
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write_reg((base+OF_VDISPLAY),(vgamode[mode].vfl<<16)|vgamode[mode].vr);
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write_reg((base+OF_VSYNC),0x40000000|(vgamode[mode].vse<<16)|vgamode[mode].vss);
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#if defined(CONFIG_VIDEO_32BPP)
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write_reg((base+OF_BUF_CONFIG),0x00100104);
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write_reg((base+OF_BUF_STRIDE),fb_xsize*4); //1024
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#elif defined(CONFIG_VIDEO_16BPP)
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write_reg((base+OF_BUF_CONFIG),0x00100103);
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write_reg((base+OF_BUF_STRIDE),(fb_xsize*2+255)&~255); //1024
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#elif defined(CONFIG_VIDEO_15BPP)
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write_reg((base+OF_BUF_CONFIG),0x00100102);
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write_reg((base+OF_BUF_STRIDE),fb_xsize*2); //1024
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#elif defined(CONFIG_VIDEO_12BPP)
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write_reg((base+OF_BUF_CONFIG),0x00100101);
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write_reg((base+OF_BUF_STRIDE),fb_xsize*2); //1024
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#else //640x480-32Bits
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write_reg((base+OF_BUF_CONFIG),0x00100104);
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write_reg((base+OF_BUF_STRIDE),fb_xsize*4); //640
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#endif //32Bits
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}
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int dc_init()
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{
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int print_count;
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int i;
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int init_R = 0;
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int init_G = 0;
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int init_B = 0;
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int j;
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int ii = 0, tmp = 0;
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int print_addr;
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int print_data;
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printf("enter dc_init...\n");
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fb_xsize = getenv("xres")? strtoul(getenv("xres"),0,0):FB_XSIZE;
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fb_ysize = getenv("yres")? strtoul(getenv("yres"),0,0):FB_YSIZE;
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MEM_ADDR = (long)MEM_ptr & 0x03ffffff;
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if(MEM_ptr == NULL)
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{
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printf("frame buffer memory malloc failed!\n ");
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exit(0);
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}
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for(ii = 0; ii < 0x1000; ii += 4)
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*(volatile unsigned int *)(ADDR_CURSOR + ii) = 0x88f31f4f;
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ADDR_CURSOR = (long)ADDR_CURSOR & 0x03ffffff;
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printf("frame buffer addr: %x \n",MEM_ADDR);
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#ifdef DC_FB0
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config_fb(DC_BASE_ADDR);
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#endif
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#ifdef DC_FB1
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config_fb(DC_BASE_ADDR_1);
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#endif
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config_cursor();
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printf("display controller reg config complete!\n");
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return MEM_ptr;
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}
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