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119 lines
4.0 KiB
119 lines
4.0 KiB
PMON - Adding Registers
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Adding Registers
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Adding registers to PMON is very simple. You might want to do this in
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order to make PMON able to display and modify the registers of
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peripheral devices that you have on your own board. For example, if you
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have a real-time clock chip that contains 4 registers. You can add
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these registers to PMON so that you can display and set them from the
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PMON command line.
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The register information is entered into a table that is located
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in the appropriate file in the lib directory. For example, if your
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processor uses the 4001 core, you should add the registers to the
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array c4001_reglist located in the file lib/c4001.c.
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A fragment of this table is shown below..
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{mXc0,mips_cause_def,"C0_CAUSE","CAUSE",13,(F_CP0|F_MIPS)},
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{mXmem,0,"M_TIC0","TIC0",M_TMR4001+O_TIC0},
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{mXmem,Tmr4003Stat,"M_TSTAT","TSTAT",M_TMR4001+O_TSTAT},
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Reading from left to right, the field definitions are as follows...
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» The first field contains the
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address of a function that can be used to set and get the
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current value of the register.
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The prototype for a register access function is...
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unsigned long mXmem(int mode, int reg, unsigned long value)
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where:
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» mode is either zero for read, or 1 for write.
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» reg is the value from the 5th field of the reglist[] structure.
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» value (for write operations) contains the value to be
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written.
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» For reads, the return value is the value read from the
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register.
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The first example shows the definition for a register that is accessed via
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coprocessor 0. The remaining examples are for memory-mapped registers.
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» The second field contains either zero, or the address of an array
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of structures that describe the bit fields within the register. For
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example,
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char *excodes[] = {
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"Int","MOD","TLBL","TLBS","AdEL","AdES","IBE","DBE",
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"Sys","Bp","RI","CpU","Ovf","Resv","Resv","Resv",0};
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RegSpec mips_cause_def[] = {
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{1,31,"BD",2,0,1},
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{2,28,"CE",10,0,1},
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{6,10,"IP",2,0,1},
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{2,8,"SW",2,0,0},
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{4,2,"EXCODE",0,excodes,1},
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{0}};
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Where:
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» The first field of the structure definition contains the
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width of the register field in bits. For example, in the
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example above, the BD field is one bit wide, while the
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IP field is 6 bits wide.
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» The second field of the structure definition contains the
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least significant bit number of the field. For example,
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in the example above, the BD field is in bit 31,
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while the IP field starts at bit 10.
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» The third field of the structure definition contains the
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name of the register field.
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» The fourth field of the structure definition contains
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the numerical base that PMON
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should use when displaying the value of the register field. Possible
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values are 2, 8, 10, and 16. If this
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value is zero, it indicates that the next field if the structure
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contains a pointer to an array.
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» The fifth field of the structure definition contains either zero,
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or a pointer to an array that specifies the strings that
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should be displayed for each possible value of the register field.
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In this example the values of the EXCODE field are
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specified by the array excodes[].
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» The sixth field of the structure definition contains a
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flag that is used to indicate
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that this register field is read-only. In the example above,
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only the SW field is not read-only.
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In the first example, the CAUSE and TSTAT registers use this feature to
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specify the bit fields in the register.
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» The third field contains the long name of the register.
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» The fourth field contains the short (or alternate) name of the register.
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» The fifth field contains additional information that is passed to the
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register access function.
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» The sixth field (if present) contains flags that specify additional
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information about the entry. For example,
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F_RO The register is read-only.
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R_WO The register is write-only.
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Once the table has been modified, you need to rebuild PMON and make new ROMs.
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