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597 lines
16 KiB
597 lines
16 KiB
/* $Id: fan.c,v 1.1.1.1 2006/09/14 01:59:08 xqch Exp $ */
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/*
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* Copyright (c) 2001 Opsycon AB (www.opsycon.se)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Opsycon AB, Sweden.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <sys/device.h>
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#include <sys/queue.h>
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#include <pmon.h>
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#include "gmac.h"
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#define read32(x) (*(volatile unsigned int *)(x))
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#define read8(x) (*(volatile unsigned char *)(x))
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unsigned char
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cmd_usbtest(ac, av)
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int ac;
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char *av[];
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{
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unsigned int base = 0xbbe00000;
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int port,test_mode;
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if (ac != 3){
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printf("Usage:usbtest <port > <T> \n");
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printf("port0: 0\n");
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printf("port1: 1\n");
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printf("port2: 2\n");
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printf("port3: 3\n");
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printf("port4: 4\n");
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printf("port5: 5\n");
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printf("<T> 1: J_STATE\n");
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printf("<T> 2: K_STATE\n");
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printf("<T> 3: SE0_NAK\n");
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printf("<T> 4: Packet\n");
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printf("<T> 5: FORCE_ENABLE\n");
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printf("For example:usbtest 1 1 \n");
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return 0;
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}
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port = atoi(av[1]);
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test_mode = atoi(av[2]);
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read32(0xbbe00010) = 0x2;
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switch (port) {
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case 0:
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read32(base | 0x54) = ((test_mode << 16) | 0x3084);
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break;
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case 1:
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read32(base | 0x58) = ((test_mode << 16) | 0x3084);
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break;
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case 2:
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read32(base | 0x5c) = ((test_mode << 16) | 0x3084);
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break;
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case 3:
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read32(base | 0x60) = ((test_mode << 16) | 0x3084);
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break;
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case 4:
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read32(base | 0x64) = ((test_mode << 16) | 0x3084);
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break;
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case 5:
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read32(base | 0x68) = ((test_mode << 16) | 0x3084);
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break;
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default:
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printf("the port number is error!\n");
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break;
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}
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if (test_mode == 5)
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read8(0xbBe00010) = 0x1;
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return(1);
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}
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cmd_satatest(ac, av)
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int ac;
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char *av[];
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{
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unsigned int port, gen;
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unsigned int base;
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int test_mode;
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if (ac != 4){
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printf("Usage:satatest <port > <gen> <test_mode>\n");
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printf("port0: 0\n");
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printf("port1: 1\n");
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printf("gen1: 1\n");
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printf("gen2: 2\n");
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printf("test_mode: 0x0 SSOP( Simultaneous switching outputs pattern)\n");
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printf("test_mode: 0x1 HTDP( High transition density pattern) \n");
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printf("test_mode: 0x2 LTDP( Low transition density pattern) \n");
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printf("test_mode: 0x3 LFSCP( Low frequency spectral component pattern)\n");
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printf("test_mode: 0x4 COMP( Composite pattern) \n");
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printf("test_mode: 0x5 LBP( Lone bit pattern) \n");
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printf("test_mode: 0x6 MFTP( Mid frequency test pattern)\n");
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printf("test_mode: 0x7 HFTP( High frequency test pattern)\n");
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printf("test_mode: 0x8 LFTP( Low frequency test pattern)\n");
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return 0;
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}
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port = atoi(av[1]);
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gen = atoi(av[2]);
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test_mode = atoi(av[3]);
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base = (0xbbe38000 + port * 0x100);
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// printf(" -> 0x%x\n", (gen == 1 ? 0x0 : 0x9));
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if (gen == 1)
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read8(base | 0x12) = 0x0;
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else if (gen == 2)
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read8(base | 0x12) = 0x9;
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read8(base | 0x10) = 0x1;
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read32(0xbbe300f4) = port * 0x10000;
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read32(0xbbe300a4) = (0x10000 | test_mode);
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return(1);
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}
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unsigned char
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cmd_pcietest(ac, av)
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int ac;
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char *av[];
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{
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unsigned int port, gen;
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unsigned int base,test_mode;
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unsigned int pcie_clock_source;
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if (ac < 2){
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printf("if test gen1:pcietest <gen1>\n");
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printf("if test gen2:pcietest <gen2> <gen2_test_mode> \n");
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printf("gen1: 1\n");
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printf("gen2: 2\n");
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printf("gen2_test_mode: 1 ->0xf052, -3.5db De-emphasis \n");
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printf("gen2_test_mode: 2 ->0xf012, -6db De-emphasis \n");
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printf("gen2_test_mode: 3 ->0xf452, -3.5db De-emphasis, modified compliance \n");
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printf("gen2_test_mode: 4 ->0xf412, -6db De-emphasis, modified compliance \n");
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printf("gen2_test_mode: 5 ->0xfc12, -6db De-emphasis, modified compliance, compliance \n");
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printf("gen2_test_mode: 6 ->0xfc52, -3.5db De-emphasis, modified compliance, compliance SOS \n");
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printf("For example:pcietest 2 1 \n");
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return 0;
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}
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gen = atoi(av[1]);
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if (gen == 2) {
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test_mode = atoi(av[2]);
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read32(0xb811407c) = 0x533c42;// the low 4 bit must be 2.
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}
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base = 0xb8110000;
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read32(base | 0x480c) = 0x2040f;
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for (port = 0;port < 4;port++) {
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read8(base | (port * 0x100) | 0x11) = 0x21;
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read8(base | (port * 0x100) | 0x10) = 0xb;
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}
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if (gen == 2) {
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for (port = 0;port < 4;port++)
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read8(base | (port * 0x100) | 0x12) = 0xa;
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}
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read32(base | 0x8000) = 0xff204c;
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if (gen == 0x1) {
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read32(base | 0x40a0) = 0xfc51;
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} else if (gen == 0x2){
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switch (test_mode) {
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case 1:
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read32(base | 0x40a0) = 0xf052;
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break;
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case 2:
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read32(base | 0x40a0) = 0xf012;
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break;
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case 3:
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read32(base | 0x40a0) = 0xf452;
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break;
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case 4:
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read32(base | 0x40a0) = 0xf412;
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break;
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case 5:
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read32(base | 0x40a0) = 0xfc52;
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break;
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case 6:
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read32(base | 0x40a0) = 0xfc12;
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break;
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default:
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printf("The test mode is error!\n");
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break;
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}
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printf("test_mode = 0x%lx\n",test_mode);
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}
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read32(base | 0x4708) = 0x7028004;
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return(1);
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}
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#define u64 unsigned long
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#define u32 unsigned int
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#define u16 unsigned short
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#define u8 unsigned char
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#define GMAC0_MAC_REG_ADDR 0xffffffffbbe10000
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#define GMAC0_DMA_REG_ADDR 0xffffffffbbe11000
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#define GMAC1_MAC_REG_ADDR 0xffffffffbbe18000
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#define GMAC1_DMA_REG_ADDR 0xffffffffbbe19000
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#define PHY_REG20 20
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#define PHY_REG0 0
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#define PHY_REG16 16
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#define PHY_LOOPBACK (1 << 14)
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#define PHY_SPEED0 (1 << 13)
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#define PHY_DUMPLEX_FULL (1 << 8)
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#define PHY_SPEED1 (1 << 6)
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#define PHY_MODE_100M (PHY_SPEED0 & ~PHY_SPEED1)
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static u32 gmac_read(u64 base, u32 reg)
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{
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u64 addr;
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u32 data;
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addr = base + (u64)reg;
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data = ls_readl(addr);
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return data;
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}
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static void gmac_write(u64 base, u32 reg, u32 data)
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{
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u64 addr;
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addr = base + (u64)reg;
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ls_readl(addr) = data;
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return;
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}
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static signed int gmac_phy_read(u64 base,u32 PhyBase, u32 reg, u16 * data )
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{
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u32 addr;
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u32 loop_variable;
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addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((reg << GmiiRegShift) & GmiiRegMask) | GmiiCsrClk3;
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addr = addr | GmiiBusy ;
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gmac_write(base,GmacGmiiAddr,addr);
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for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
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if (!(gmac_read(base,GmacGmiiAddr) & GmiiBusy)){
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break;
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}
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int i = DEFAULT_DELAY_VARIABLE;
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while (i--);
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}
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if(loop_variable < DEFAULT_LOOP_VARIABLE)
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* data = (u16)(gmac_read(base,GmacGmiiData) & 0xFFFF);
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else{
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tgt_printf("\rError::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
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return -ESYNOPGMACPHYERR;
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}
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return -ESYNOPGMACNOERR;
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}
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static signed int gmac_phy_write(u64 base, u32 PhyBase, u32 reg, u16 data)
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{
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u32 addr;
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u32 loop_variable;
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gmac_write(base,GmacGmiiData,data);
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addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((reg << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3;
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addr = addr | GmiiBusy ;
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gmac_write(base,GmacGmiiAddr,addr);
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for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
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if (!(gmac_read(base,GmacGmiiAddr) & GmiiBusy)){
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break;
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}
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int i = DEFAULT_DELAY_VARIABLE;
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while (i--);
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}
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if(loop_variable < DEFAULT_LOOP_VARIABLE){
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return -ESYNOPGMACNOERR;
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}
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else{
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tgt_printf("\rError::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
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return -ESYNOPGMACPHYERR;
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}
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}
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unsigned char
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cmd_lantest(ac, av)
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int ac;
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char *av[];
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{
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unsigned int base,test_mode,id;
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unsigned short data;
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u64 mac_base;
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if (ac < 2){
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printf("lantest: lantest <testmode>\n");
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printf("testmode1: 1\n");
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printf("testmode2: 2\n");
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printf("testmode3: 3\n");
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printf("testmode4: 4\n");
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printf("For example:lantest 1 \n");
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return 0;
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}
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test_mode = atoi(av[1]);
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for (id = 0;id < 2;id++) {
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if (id == 0)
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mac_base = GMAC0_MAC_REG_ADDR;
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else if (id == 1)
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mac_base = GMAC1_MAC_REG_ADDR;
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switch (test_mode) {
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case 1:
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gmac_phy_read(mac_base,16,9,&data);
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printf("phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("phy 10 register value = 0x%lx\n",data);
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gmac_phy_write(mac_base,16,9,(1 << 13));
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gmac_phy_read(mac_base,16,9,&data);
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printf("changed phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("changed phy 10 register value = 0x%lx\n",data);
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break;
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case 2:
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gmac_phy_read(mac_base,16,9,&data);
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printf("phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("phy 10 register value = 0x%lx\n",data);
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gmac_phy_write(mac_base,16,9, (0x2 << 13));
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gmac_phy_read(mac_base,16,9,&data);
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printf("changed phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("changed phy 10 register value = 0x%lx\n",data);
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break;
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case 3:
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gmac_phy_read(mac_base,16,9,&data);
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printf("phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("phy 10 register value = 0x%lx\n",data);
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gmac_phy_write(mac_base,16,9,(0x3 << 13));
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gmac_phy_read(mac_base,16,9,&data);
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printf("changed phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("changed phy 10 register value = 0x%lx\n",data);
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break;
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case 4:
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gmac_phy_read(mac_base,16,9,&data);
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printf("phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("phy 10 register value = 0x%lx\n",data);
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gmac_phy_write(mac_base,16,9, (0x4 << 13));
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gmac_phy_read(mac_base,16,9,&data);
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printf("changed phy 9 register value = 0x%lx\n",data);
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gmac_phy_read(mac_base,16,10,&data);
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printf("changed phy 10 register value = 0x%lx\n",data);
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break;
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default:
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printf("Test mode is error!\n");
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break;
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}
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}
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return(1);
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}
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int gmac_w18(void)
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{
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unsigned char offset;
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unsigned char id;
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unsigned long long mac_base;
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unsigned short data;
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for (id = 0;id < 2;id++) {
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if (id == 0) {
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mac_base = GMAC0_MAC_REG_ADDR;
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} else if (id == 1){
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mac_base = GMAC1_MAC_REG_ADDR;
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}
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/*
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gmac_phy_read(mac_base,16,16,&data);
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data |= 0x300;
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gmac_phy_write(mac_base,16,16,data);
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gmac_phy_read(mac_base,16,16,&data);
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*/
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gmac_phy_read(mac_base,16,19,&data);
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data = 0x10;
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gmac_phy_write(mac_base,16,18,data);
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gmac_phy_read(mac_base,16,18,&data);
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gmac_phy_read(mac_base,16,19,&data);
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gmac_phy_read(mac_base,16,24,&data);
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data = data | 0x800;
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gmac_phy_write(mac_base,16,24,data);
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gmac_phy_read(mac_base,16,27,&data);
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data = data & (~(1 << 10));
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gmac_phy_write(mac_base,16,27,data);
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gmac_phy_read(mac_base,16,0,&data);
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data = data | 0x8000;
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gmac_phy_write(mac_base,16,0,data);
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}
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return 0;
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}
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int gmac_w(ac, av)
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int ac;
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char *av[];
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{
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unsigned char offset;
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unsigned char id;
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unsigned long long mac_base;
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unsigned short data;
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if (ac == 3) {
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data = 0x1e1;
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printf("data 0x%lx\n",data);
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for (id = 0;id < 2;id++) {
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if (id == 0) {
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mac_base = GMAC0_MAC_REG_ADDR;
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gmac_phy_write(mac_base,16,4,data);
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gmac_phy_read(mac_base,16,4,&data);
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printf("gmac0 4 0x%lx\n",data);
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gmac_phy_read(mac_base,16,0x00,&data);
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gmac_phy_write(mac_base,16,0x00,data);
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} else if (id == 1){
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data = 0xffff;
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mac_base = GMAC1_MAC_REG_ADDR;
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gmac_phy_write(mac_base,16,4,data);
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gmac_phy_read(mac_base,16,4,&data);
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printf("gmac1 4 0x%lx\n",data);
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gmac_phy_read(mac_base,16,0x00,&data);
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data = data | 0x8000;
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gmac_phy_write(mac_base,16,0x00,data);
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}
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}
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}
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if (ac == 1) {
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printf("data 0x%lx\n",data);
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for (id = 0;id < 2;id++) {
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if (id == 0) {
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data = 0x10;
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mac_base = GMAC0_MAC_REG_ADDR;
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gmac_phy_write(mac_base,16,18,data);
|
|
gmac_phy_read(mac_base,16,18,&data);
|
|
printf("gmac0 4 0x%lx\n",data);
|
|
gmac_phy_read(mac_base,16,0,&data);
|
|
data = data | 0x8000;
|
|
gmac_phy_write(mac_base,16,0,data);
|
|
} else if (id == 1){
|
|
data = 0x10;
|
|
mac_base = GMAC1_MAC_REG_ADDR;
|
|
gmac_phy_write(mac_base,16,18,data);
|
|
gmac_phy_read(mac_base,16,18,&data);
|
|
printf("gmac1 4 0x%lx\n",data);
|
|
gmac_phy_read(mac_base,16,0,&data);
|
|
data = data | 0x8000;
|
|
gmac_phy_write(mac_base,16,0,data);
|
|
}
|
|
|
|
}
|
|
}
|
|
if (ac == 2) {
|
|
for (id = 0;id < 2;id++) {
|
|
if (id == 0)
|
|
mac_base = GMAC0_MAC_REG_ADDR;
|
|
else if (id == 1)
|
|
mac_base = GMAC1_MAC_REG_ADDR;
|
|
|
|
data = 0x40;
|
|
gmac_phy_write(mac_base,16,18,data);
|
|
gmac_phy_read(mac_base,16,0x00,&data);
|
|
data = data | 0x8000;
|
|
gmac_phy_write(mac_base,16,0x00,data);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
int gmacphy_write(ac, av)
|
|
int ac;
|
|
char *av[];
|
|
{
|
|
unsigned char offset;
|
|
if (ac != 3) {
|
|
printf("the parameters is error!\n");
|
|
printf("gmacphy_write <offset> <data>\n");
|
|
return -1;
|
|
}
|
|
|
|
offset = atoi(av[1]);
|
|
|
|
unsigned char id;
|
|
unsigned long long mac_base;
|
|
unsigned short data;
|
|
data = atoi(av[2]);
|
|
printf("data 0x%lx\n",data);
|
|
for (id = 0;id < 2;id++) {
|
|
if (id == 0)
|
|
mac_base = GMAC0_MAC_REG_ADDR;
|
|
else if (id == 1)
|
|
mac_base = GMAC1_MAC_REG_ADDR;
|
|
|
|
gmac_phy_write(mac_base,16,offset,data);
|
|
}
|
|
return 0;
|
|
}
|
|
int gmacphy_read(ac, av)
|
|
int ac;
|
|
char *av[];
|
|
{
|
|
unsigned char offset;
|
|
unsigned char id;
|
|
unsigned long long mac_base;
|
|
unsigned short data;
|
|
if (ac == 1) {
|
|
for (id = 0;id < 2;id++) {
|
|
if (id == 0)
|
|
mac_base = GMAC0_MAC_REG_ADDR;
|
|
else if (id == 1)
|
|
mac_base = GMAC1_MAC_REG_ADDR;
|
|
|
|
for (offset = 0;offset < 32;offset++) {
|
|
gmac_phy_read(mac_base,16,offset,&data);
|
|
printf("gmac%d reg(%d) %lx\n",id,offset,data);
|
|
}
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
offset = atoi(av[1]);
|
|
|
|
for (id = 0;id < 2;id++) {
|
|
if (id == 0)
|
|
mac_base = GMAC0_MAC_REG_ADDR;
|
|
else if (id == 1)
|
|
mac_base = GMAC1_MAC_REG_ADDR;
|
|
|
|
gmac_phy_read(mac_base,16,offset,&data);
|
|
printf("gmac%d reg(%d) %lx\n",id,offset,data);
|
|
}
|
|
return 0;
|
|
}
|
|
/*
|
|
*
|
|
* Command table registration
|
|
* ==========================
|
|
*/
|
|
|
|
static const Cmd Cmds[] =
|
|
{
|
|
{"Misc"},
|
|
{"usbtest", "", 0, "3a2h usbtest : usbtest ", cmd_usbtest, 1, 99, 0},
|
|
{"gmacphy_read", "", 0, "read gmac phy reg", gmacphy_read, 1, 99, 0},
|
|
{"gmacphy_write", "", 0, "read gmac phy reg", gmacphy_write, 1, 99, 0},
|
|
{"gmac_w", "", 0, "read gmac phy reg", gmac_w, 1, 99, 0},
|
|
{"lantest", "", 0, "3a2h lantest : lantest ", cmd_lantest, 1, 99, 0},
|
|
{"pcietest", "", 0, "3a2h pcietest: pcietest ", cmd_pcietest, 1, 99, 0},
|
|
{"satatest", "", 0, "3a2h satatest: satatest ", cmd_satatest, 1, 99, 0},
|
|
{0, 0}
|
|
};
|
|
|
|
static void init_cmd __P((void)) __attribute__ ((constructor));
|
|
|
|
void
|
|
init_cmd()
|
|
{
|
|
cmdlist_expand(Cmds, 1);
|
|
}
|
|
|