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134 lines
2.3 KiB
134 lines
2.3 KiB
#!/usr/bin/perl
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my ($myedata,$myend,$initmips,$mystart);
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open(F,qq(mips-elf-objdump -x $ARGV[0]|));
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while(<F>)
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{
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chomp;
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if(/f{8}(\w+).+_edata/){
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$myedata=qq(0x$1);
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}
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if(/f{8}(\w+).+_end$/){
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$myend=qq(0x$1);
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}
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if(/f{8}(\w+).+initmips$/){
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$myinitmips=qq(0x$1);
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}
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if(/f{8}(\w+).+\s_start$/){
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$mystart=qq(0x$1);
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}
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}
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printf(<< "END"
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void stringserial(char *msg);
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void realinitmips(unsigned int msize);
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void enable_cache()
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{
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__asm__ volatile(
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".set mips3;
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mfc0 \$4,\$16;
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and \$4,\$4,0xfffffff8;
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or \$4,\$4,0x3;
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mtc0 \$4,\$16;
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.set mips0;"
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::
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:"\$4"
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);
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}
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#ifndef NOCACHE2
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void flush_cache2()
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{
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asm volatile("
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mfc0 \$3, \$15 # read processor ID register
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li \$2, 0x6303 #godson2f prid
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beq \$2, \$3, godson_2f
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nop
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li \$2, 0x6302 #godson2e prid
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bne \$2, \$3,11f
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nop
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# godson2e
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godson_2f:
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li \$2, 0x80000000
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addu \$3,\$2,512*1024
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10:
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cache 3, 0(\$2)
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cache 3, 1(\$2)
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cache 3, 2(\$2)
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cache 3, 3(\$2)
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addu \$2, 32
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bne \$2,\$3, 10b
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nop
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11:
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"
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::
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:"\$2","\$3"
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);
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}
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#else
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void flush_cache()
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{
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asm volatile("
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.set mips3;
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li \$5,0x80000000
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addu \$6,\$5,16384
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1:
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cache 1,0(\$5)
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cache 1,1(\$5)
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cache 1,2(\$5)
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cache 1,3(\$5)
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cache 0,(\$5)
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cache 0,1(\$5)
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cache 0,2(\$5)
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cache 0,3(\$5)
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add \$5,\$5,32
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bne \$5,\$6,1b
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nop
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.set mips0;
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"
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::
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: "\$5","\$6");
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}
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#endif
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void initmips(unsigned int msize,int dmsize,int dctrl)
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{
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long *edata=(void *)$myedata;
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long *end=(void *)$myend;
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long *p;
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int debug=(msize==0);
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CPU_TLBClear();
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stringserial("Uncompressing Bios");
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if(!debug||dctrl&1)enable_cache();
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while(1)
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{
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if(run_unzip(biosdata,$mystart)>=0)break;
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}
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stringserial("OK,Booting Bios\\r\\n");
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for(p=edata;p<=end;p++)
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{
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*p=0;
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}
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memset($mystart-0x1000,0,0x1000);//$mystart-0x1000 for frame(registers),memset for pretty
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#ifdef NOCACHE2
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flush_cache();
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#else
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flush_cache2();
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#endif
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realinitmips(debug?dmsize:msize);
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}
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void realinitmips(unsigned int msize)
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{
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asm ("li \$29,$mystart-0x4000;
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li \$2,$myinitmips;
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move \$4,\%0;
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jalr \$2;
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nop;
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1: b 1b;nop;"
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:
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: "r" (msize)
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: "\$29", "\$2","\$4");
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}
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END
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);
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