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adiv5: Derived the proper designer code for Xilinx ARM cores 

This was manually extracted from https://www.xilinx.com/content/dam/xilinx/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
feature/scanchain-xilinx
dragonmux 3 years ago
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1 changed files with 1 additions and 1 deletions
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      src/target/adiv5.h

2
src/target/adiv5.h
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@ -106,8 +106,8 @@
#define AP_DESIGNER_STM32WX 0x420 #define AP_DESIGNER_STM32WX 0x420
#define AP_DESIGNER_CYPRESS 0x034 #define AP_DESIGNER_CYPRESS 0x034
#define AP_DESIGNER_INFINEON 0x041 #define AP_DESIGNER_INFINEON 0x041
#define AP_DESIGNER_XILINX 0x049
#define AP_DESIGNER_NORDIC 0x244 #define AP_DESIGNER_NORDIC 0x244
#define AP_DESIGNER_XILINX 0x309
#define AP_DESIGNER_ARM 0x43b #define AP_DESIGNER_ARM 0x43b
/*LPC845 with designer 501. Strange!? */ /*LPC845 with designer 501. Strange!? */
#define AP_DESIGNER_SPECULAR 0x501 #define AP_DESIGNER_SPECULAR 0x501

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