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@ -34,18 +34,36 @@ |
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#include "general.h" |
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#include "cdcacm.h" |
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#include "traceswo.h" |
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#include "platform.h" |
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#include "fifo.h" |
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#include <stdatomic.h> |
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#include <libopencm3/cm3/nvic.h> |
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#include <libopencm3/stm32/timer.h> |
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#include <libopencm3/stm32/rcc.h> |
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#define FULL_SWO_PACKET (CDCACM_PACKET_SIZE) //maximum is 255! Best is same as usb ep buffer size
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#ifndef NUM_TRACE_PACKETS |
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#define NUM_TRACE_PACKETS (128) |
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#endif |
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#define FIFO_SIZE (NUM_TRACE_PACKETS * FULL_SWO_PACKET) |
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/* SWO decoding */ |
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static bool decoding = false; |
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void traceswo_init(uint32_t swo_chan_bitmask) |
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FIFO_STATIC(trace_fifo, FIFO_SIZE); |
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static bool active_transfer = false; |
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void traceswo_init(const uint32_t swo_chan_bitmask) |
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{ |
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TRACE_TIM_CLK_EN(); |
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/* Refer to ST doc RM0008 - STM32F10xx Reference Manual.
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* Section 14.3.4 - 14.3.6 (General Purpose Timer - Input Capture) |
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* |
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* CCR1 captures cycle time, CCR2 captures high time |
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*/ |
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/* Refer to ST doc RM0008 - STM32F10xx Reference Manual.
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* Section 14.3.4 - 14.3.6 (General Purpose Timer - Input Capture) |
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* |
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@ -81,44 +99,38 @@ void traceswo_init(uint32_t swo_chan_bitmask) |
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decoding = (swo_chan_bitmask != 0); |
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} |
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static uint8_t trace_usb_buf[64]; |
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static uint8_t trace_usb_buf_size; |
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void trace_buf_push(uint8_t *buf, int len) |
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void trace_buf_drain(usbd_device *const dev, const uint8_t ep) |
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{ |
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if (decoding) |
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traceswo_decode(usbdev, CDCACM_UART_ENDPOINT, buf, len); |
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else if (usbd_ep_write_packet(usbdev, 0x85, buf, len) != len) { |
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if (trace_usb_buf_size + len > 64) { |
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/* Stall if upstream to too slow. */ |
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usbd_ep_stall_set(usbdev, 0x85, 1); |
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trace_usb_buf_size = 0; |
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static atomic_flag draining = ATOMIC_FLAG_INIT; |
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/* If we are already in this routine then we don't need to come in again */ |
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if (atomic_flag_test_and_set(&draining)) |
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return; |
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} |
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memcpy(trace_usb_buf + trace_usb_buf_size, buf, len); |
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trace_usb_buf_size += len; |
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} |
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} |
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void trace_buf_drain(usbd_device *dev, uint8_t ep) |
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{ |
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if (!trace_usb_buf_size) |
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return; |
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/* Attempt to write to ep */ |
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size_t available = FULL_SWO_PACKET; |
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if (fifo_get_used(&trace_fifo) < FULL_SWO_PACKET) |
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available = fifo_get_used(&trace_fifo); |
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if (available) { |
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uint8_t *buffer = fifo_get_pointer(&trace_fifo, available); |
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uint16_t consumed = 0; |
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if (decoding) |
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traceswo_decode(dev, CDCACM_UART_ENDPOINT, trace_usb_buf, trace_usb_buf_size); |
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consumed = traceswo_decode(dev, CDCACM_UART_ENDPOINT, buffer, available); |
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else |
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usbd_ep_write_packet(dev, ep, trace_usb_buf, trace_usb_buf_size); |
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trace_usb_buf_size = 0; |
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} |
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consumed = usbd_ep_write_packet(dev, ep, buffer, available); |
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fifo_discard(&trace_fifo, consumed); |
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} else { |
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active_transfer = false; |
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} |
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#define ALLOWED_DUTY_ERROR 5 |
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atomic_flag_clear(&draining); |
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} |
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void TRACE_ISR(void) |
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{ |
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uint16_t sr = TIM_SR(TRACE_TIM); |
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uint16_t duty, cycle; |
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static uint16_t bt; |
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static uint16_t half_period; |
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static uint8_t lastbit; |
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static uint8_t decbuf[17]; |
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static uint8_t decbuf_pos; |
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@ -135,23 +147,24 @@ void TRACE_ISR(void) |
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cycle = TIM_CCR1(TRACE_TIM); |
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duty = TIM_CCR2(TRACE_TIM); |
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/* Reset decoder state if crazy shit happened */ |
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if ((bt && (((duty / bt) > 2) || ((duty / bt) == 0))) || (duty == 0)) |
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/* Reset decoder state if anything too crazy happened */ |
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if (duty == 0 || (half_period && (((duty + half_period / 2) / half_period) > 2 || |
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((duty + half_period / 2) / half_period) == 0))) |
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goto flush_and_reset; |
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/* No rising edge caught, cycle not finished yet! */ |
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if (!(sr & TIM_SR_CC1IF)) |
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notstart = 1; |
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if (!bt) { |
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if (!half_period) { |
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if (notstart) { |
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notstart = 0; |
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return; |
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} |
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/* First bit, sync decoder */ |
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duty -= ALLOWED_DUTY_ERROR; |
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if (((cycle / duty) != 2) && ((cycle / duty) != 3)) |
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if (((cycle + duty / 2) / duty) != 2 && ((cycle + duty / 2) / duty) != 3) |
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return; |
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bt = duty; |
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half_period = duty; |
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lastbit = 1; |
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halfbit = 0; |
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timer_set_period(TRACE_TIM, duty * 6); |
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@ -159,20 +172,22 @@ void TRACE_ISR(void) |
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timer_enable_irq(TRACE_TIM, TIM_DIER_UIE); |
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} else { |
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/* If high time is extended we need to flip the bit */ |
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if ((duty / bt) > 1) { |
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if (((duty + half_period / 2) / half_period) > 1) { |
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if (!halfbit) /* lost sync somehow */ |
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goto flush_and_reset; |
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halfbit = 0; |
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lastbit ^= 1; |
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} |
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half_period = half_period / 2 + duty / 4; //update with EMA IIR filter alpha 0.5 (duty is 2 halfperiods)
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} else |
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half_period = half_period / 2 + duty / 2; //update with EMA IIR filter alpha 0.5
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decbuf[decbuf_pos >> 3] |= lastbit << (decbuf_pos & 7); |
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decbuf_pos++; |
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} |
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if (!(sr & TIM_SR_CC1IF) || (((cycle - duty) / bt) > 2)) |
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if (!(sr & TIM_SR_CC1IF) || ((cycle - duty + half_period / 2) / half_period) > 2) |
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goto flush_and_reset; |
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if (((cycle - duty) / bt) > 1) { |
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if (((cycle - duty + half_period / 2) / half_period) > 1) { |
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/* If low time extended we need to pack another bit. */ |
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if (halfbit) /* this is a valid stop-bit or we lost sync */ |
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goto flush_and_reset; |
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@ -188,8 +203,14 @@ void TRACE_ISR(void) |
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flush_and_reset: |
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timer_set_period(TRACE_TIM, -1); |
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timer_disable_irq(TRACE_TIM, TIM_DIER_UIE); |
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trace_buf_push(decbuf, decbuf_pos >> 3); |
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bt = 0; |
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fifo_write(&trace_fifo, decbuf, decbuf_pos >> 3); |
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if (!active_transfer) { |
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active_transfer = true; |
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trace_buf_drain(usbdev, 0x85); |
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} |
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half_period = 0; |
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decbuf_pos = 0; |
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memset(decbuf, 0, sizeof(decbuf)); |
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} |
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