adiv5: Derived the proper designer code for Xilinx ARM cores

This was manually extracted from https://www.xilinx.com/content/dam/xilinx/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

src/target/adiv5.h

@@ -107,6 +107,7 @@
 #define AP_DESIGNER_CYPRESS      0x034
 #define AP_DESIGNER_INFINEON     0x041
 #define AP_DESIGNER_NORDIC       0x244
+#define AP_DESIGNER_XILINX       0x309
 #define AP_DESIGNER_ARM          0x43b
 /*LPC845 with designer 501. Strange!? */
 #define AP_DESIGNER_SPECULAR     0x501

src/target/jtag_scan.c

@@ -214,6 +214,9 @@ int jtag_scan(const uint8_t *irlens)
 				jtag_devs[i].current_ir = -1;
 				/* Save description in table */
 				jtag_devs[i].jd_descr = dev_descr[j].descr;
+				/* Special handling for Xilinx devices to make sure irlen is right */
+				if (dev_descr[j].idcode == 0x00000093)
+					jtag_devs[i].ir_len = 6;
 				/* Call handler to initialise/probe device further */
 				if(dev_descr[j].handler)
 					dev_descr[j].handler(i);