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[STM32F0:EXTI] Add prelimnary support of exti, common file now in common directory

pull/177/merge
BuFran 11 years ago
committed by Piotr Esden-Tempski
parent
cd9ba87073
commit
1345a3403c
11 changed files with 107 additions and 127 deletions
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  1. 17
      include/libopencm3/stm32/common/syscfg_common_l1f234.h
  2. 4
      include/libopencm3/stm32/exti.h
  3. 26
      include/libopencm3/stm32/f0/exti.h
  4. 17
      include/libopencm3/stm32/f1/gpio.h
  5. 148
      lib/stm32/common/exti_common_all.c
  6. 2
      lib/stm32/f0/Makefile
  7. 5
      lib/stm32/f1/Makefile
  8. 4
      lib/stm32/f2/Makefile
  9. 4
      lib/stm32/f3/Makefile
  10. 4
      lib/stm32/f4/Makefile
  11. 3
      lib/stm32/l1/Makefile

17
include/libopencm3/stm32/common/syscfg_common_l1f234.h
View File

@ -37,17 +37,12 @@ specific memorymap.h header before including this header file.*/
#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04)
/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */
#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08)
/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */
#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c)
/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */
#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10)
/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */
#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14)
/* External interrupt configuration registers [0..3] (SYSCFG_EXTICR[1..4]) */
#define SYSCFG_EXTICR(i) MMIO32(SYSCFG_BASE + 0x08 + (i)*4)
#define SYSCFG_EXTICR1 SYSCFG_EXTICR(0)
#define SYSCFG_EXTICR2 SYSCFG_EXTICR(1)
#define SYSCFG_EXTICR3 SYSCFG_EXTICR(2)
#define SYSCFG_EXTICR4 SYSCFG_EXTICR(3)
#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20)

4
include/libopencm3/stm32/exti.h
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@ -19,7 +19,9 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#if defined(STM32F1)
#if defined(STM32F0)
# include <libopencm3/stm32/f0/exti.h>
#elif defined(STM32F1)
# include <libopencm3/stm32/f1/exti.h>
#elif defined(STM32F2)
# include <libopencm3/stm32/f2/exti.h>

26
include/libopencm3/stm32/f0/exti.h
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@ -0,0 +1,26 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_EXTI_H
#define LIBOPENCM3_EXTI_H
#include <libopencm3/stm32/memorymap.h>
#include <libopencm3/stm32/common/exti_common_all.h>
#endif

17
include/libopencm3/stm32/f1/gpio.h
View File

@ -665,17 +665,12 @@ If mode specifies output, configuration can be
/* AF remap and debug I/O configuration register (AFIO_MAPR) */
#define AFIO_MAPR MMIO32(AFIO_BASE + 0x04)
/* External interrupt configuration register 1 (AFIO_EXTICR1) */
#define AFIO_EXTICR1 MMIO32(AFIO_BASE + 0x08)
/* External interrupt configuration register 2 (AFIO_EXTICR2) */
#define AFIO_EXTICR2 MMIO32(AFIO_BASE + 0x0c)
/* External interrupt configuration register 3 (AFIO_EXTICR3) */
#define AFIO_EXTICR3 MMIO32(AFIO_BASE + 0x10)
/* External interrupt configuration register 4 (AFIO_EXTICR4) */
#define AFIO_EXTICR4 MMIO32(AFIO_BASE + 0x14)
/* External interrupt configuration register [0..3] (AFIO_EXTICR[1..4])*/
#define AFIO_EXTICR(i) MMIO32(AFIO_BASE + 0x08 + (i)*4)
#define AFIO_EXTICR1 AFIO_EXTICR(0)
#define AFIO_EXTICR2 AFIO_EXTICR(1)
#define AFIO_EXTICR3 AFIO_EXTICR(2)
#define AFIO_EXTICR4 AFIO_EXTICR(3)
/* AF remap and debug I/O configuration register (AFIO_MAPR) */
#define AFIO_MAPR2 MMIO32(AFIO_BASE + 0x1C)

148
lib/stm32/exti.c → lib/stm32/common/exti_common_all.c
View File

@ -21,11 +21,12 @@
* devices. (differences only in the source selection)
*/
#include <libopencm3/stm32/memorymap.h>
#include <libopencm3/stm32/exti.h>
#if defined(STM32L1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4)
#include <libopencm3/stm32/syscfg.h>
#endif
#include <libopencm3/stm32/gpio.h>
#if !defined(AFIO_BASE)
# include <libopencm3/stm32/syscfg.h>
#endif
void exti_set_trigger(uint32_t extis, enum exti_trigger_type trig)
{
@ -88,104 +89,63 @@ uint32_t exti_get_flag_status(uint32_t exti)
*/
void exti_select_source(uint32_t exti, uint32_t gpioport)
{
uint8_t shift, bits;
uint32_t line;
for (line=0; line<16; line++)
{
if (!(exti & (1 << line)))
continue;
shift = bits = 0;
uint32_t bits = 0, mask=0x0F;
switch (exti) {
case EXTI0:
case EXTI4:
case EXTI8:
case EXTI12:
shift = 0;
break;
case EXTI1:
case EXTI5:
case EXTI9:
case EXTI13:
shift = 4;
break;
case EXTI2:
case EXTI6:
case EXTI10:
case EXTI14:
shift = 8;
break;
case EXTI3:
case EXTI7:
case EXTI11:
case EXTI15:
shift = 12;
break;
}
switch (gpioport) {
case GPIOA:
bits = 0xf;
break;
case GPIOB:
bits = 0xe;
break;
case GPIOC:
bits = 0xd;
break;
case GPIOD:
bits = 0xc;
break;
case GPIOE:
bits = 0xb;
break;
#if defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4)
case GPIOF:
bits = 0xa;
break;
switch (gpioport) {
case GPIOA:
bits = 0;
break;
case GPIOB:
bits = 1;
break;
case GPIOC:
bits = 2;
break;
case GPIOD:
bits = 3;
break;
#if defined(GPIOE) && defined(GPIO_PORT_E_BASE)
case GPIOE:
bits = 4;
break;
#endif
#if defined(STM32F1) || defined(STM32F2) || defined(STM32F4)
case GPIOG:
bits = 0x9;
break;
#if defined(GPIOF) && defined(GPIO_PORT_F_BASE)
case GPIOF:
bits = 5;
break;
#endif
#if defined(STM32L1) || defined(STM32F2) || defined(STM32F4)
case GPIOH:
bits = 0x8;
break;
#if defined(GPIOG) && defined(GPIO_PORT_G_BASE)
case GPIOG:
bits = 6;
break;
#endif
#if defined(STM32F2) || defined(STM32F4)
case GPIOI:
bits = 0x7;
break;
#if defined(GPIOH) && defined(GPIO_PORT_H_BASE)
case GPIOH:
bits = 7;
break;
#endif
}
#if defined(GPIOI) && defined(GPIO_PORT_I_BASE)
case GPIOI:
bits = 8;
break;
#endif
}
#if defined(STM32F1)
/* Ensure that only valid EXTI lines are used. */
if (exti < EXTI4) {
AFIO_EXTICR1 &= ~(0x000F << shift);
AFIO_EXTICR1 |= (~bits << shift);
} else if (exti < EXTI8) {
AFIO_EXTICR2 &= ~(0x000F << shift);
AFIO_EXTICR2 |= (~bits << shift);
} else if (exti < EXTI12) {
AFIO_EXTICR3 &= ~(0x000F << shift);
AFIO_EXTICR3 |= (~bits << shift);
} else if (exti < EXTI16) {
AFIO_EXTICR4 &= ~(0x000F << shift);
AFIO_EXTICR4 |= (~bits << shift);
}
uint8_t shift = (uint8_t)(4 * (line % 4));
uint32_t reg = line / 4;
bits <<= shift;
mask <<= shift;
#if defined(AFIO_BASE)
AFIO_EXTICR(reg) = (AFIO_EXTICR(reg) & ~mask) | bits;
#else
/* Ensure that only valid EXTI lines are used. */
if (exti < EXTI4) {
SYSCFG_EXTICR1 &= ~(0x000F << shift);
SYSCFG_EXTICR1 |= (~bits << shift);
} else if (exti < EXTI8) {
SYSCFG_EXTICR2 &= ~(0x000F << shift);
SYSCFG_EXTICR2 |= (~bits << shift);
} else if (exti < EXTI12) {
SYSCFG_EXTICR3 &= ~(0x000F << shift);
SYSCFG_EXTICR3 |= (~bits << shift);
} else if (exti < EXTI16) {
SYSCFG_EXTICR4 &= ~(0x000F << shift);
SYSCFG_EXTICR4 |= (~bits << shift);
}
SYSCFG_EXTICR(reg) = (SYSCFG_EXTICR(reg) & ~mask) | bits;
#endif
};
}

2
lib/stm32/f0/Makefile
View File

@ -37,7 +37,7 @@ OBJS = flash.o rcc.o usart.o dma.o rtc.o comparator.o
OBJS += gpio_common_all.o gpio_common_f0234.o crc_common_all.o \
pwr_common_all.o iwdg_common_all.o rtc_common_l1f024.o \
dma_common_l1f013.o
dma_common_l1f013.o exti_common_all.o
VPATH += ../../usb:../:../../cm3:../common

5
lib/stm32/f1/Makefile
View File

@ -33,13 +33,14 @@ CFLAGS = -Os -g \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = adc.o can.o desig.o exti.o ethernet.o flash.o gpio.o \
OBJS = adc.o can.o desig.o ethernet.o flash.o gpio.o \
rcc.o rtc.o timer.o
OBJS += crc_common_all.o dac_common_all.o dma_common_l1f013.o \
gpio_common_all.o i2c_common_all.o iwdg_common_all.o \
pwr_common_all.o spi_common_all.o spi_common_f124.o \
timer_common_all.o usart_common_all.o usart_common_f124.o
timer_common_all.o usart_common_all.o usart_common_f124.o \
exti_common_all.o
OBJS += usb.o usb_control.o usb_standard.o usb_f103.o usb_f107.o \
usb_fx07_common.o

4
lib/stm32/f2/Makefile
View File

@ -33,7 +33,7 @@ CFLAGS = -Os -g \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = gpio.o exti.o rcc.o
OBJS = gpio.o rcc.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f0234.o i2c_common_all.o \
@ -41,7 +41,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
spi_common_f124.o timer_common_all.o timer_common_f234.o \
timer_common_f24.o usart_common_all.o usart_common_f124.o \
flash_common_f234.o flash_common_f24.o hash_common_f24.o \
crypto_common_f24.o
crypto_common_f24.o exti_common_all.o
VPATH += ../../usb:../:../../cm3:../common

4
lib/stm32/f3/Makefile
View File

@ -34,13 +34,13 @@ CFLAGS = -Os -g \
ARFLAGS = rcs
OBJS = rcc.o gpio.o adc.o exti.o i2c.o spi.o usart.o dma.o
OBJS = rcc.o gpio.o adc.o i2c.o spi.o usart.o dma.o
OBJS += gpio_common_all.o gpio_common_f0234.o \
dac_common_all.o usart_common_all.o crc_common_all.o\
iwdg_common_all.o spi_common_all.o dma_common_l1f013.o\
timer_common_all.o timer_common_f234.o flash_common_f234.o \
flash.o
flash.o exti_common_all.o
OBJS += usb.o usb_control.o usb_standard.o usb_f103.o

4
lib/stm32/f4/Makefile
View File

@ -36,7 +36,7 @@ CFLAGS = -Os -g \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = adc.o can.o gpio.o exti.o pwr.o rcc.o rtc.o crypto.o
OBJS = adc.o can.o gpio.o pwr.o rcc.o rtc.o crypto.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f0234.o i2c_common_all.o \
@ -44,7 +44,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
spi_common_all.o spi_common_f124.o timer_common_all.o \
timer_common_f234.o timer_common_f24.o usart_common_all.o \
usart_common_f124.o flash_common_f234.o flash_common_f24.o \
hash_common_f24.o crypto_common_f24.o
hash_common_f24.o crypto_common_f24.o exti_common_all.o
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \
usb_f107.o usb_f207.o

3
lib/stm32/l1/Makefile
View File

@ -32,7 +32,7 @@ CFLAGS = -Os -g \
-ffunction-sections -fdata-sections -MD -DSTM32L1
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = crc.o desig.o exti.o flash.o rcc.o usart.o dma.o
OBJS = crc.o desig.o flash.o rcc.o usart.o dma.o
OBJS += crc_common_all.o dac_common_all.o
OBJS += dma_common_l1f013.o
OBJS += gpio_common_all.o gpio_common_f0234.o
@ -40,6 +40,7 @@ OBJS += i2c_common_all.o iwdg_common_all.o
OBJS += pwr_common_all.o pwr.o rtc_common_l1f024.o
OBJS += spi_common_all.o timer_common_all.o
OBJS += usart_common_all.o usart_common_f124.o
OBJS += exti_common_all.o
VPATH += ../../usb:../:../../cm3:../common

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