diff --git a/include/libopencm3/stm32/h7/rcc.h b/include/libopencm3/stm32/h7/rcc.h
index 0612b3f5..8593d076 100644
--- a/include/libopencm3/stm32/h7/rcc.h
+++ b/include/libopencm3/stm32/h7/rcc.h
@@ -394,6 +394,7 @@ LGPL License Terms @ref lgpl_license
 #define RCC_D2CCIP2R_CECSEL_SHIFT           22
 #define RCC_D2CCIP2R_USBSEL_SHIFT           20
 #define RCC_D2CCIP2R_I2C123SEL_SHIFT        12
+#define RCC_D2CCIP2R_RNGSEL_MASK            0x3
 #define RCC_D2CCIP2R_RNGSEL_SHIFT           8
 #define RCC_D2CCIP2R_USART16SEL_SHIFT       3
 #define RCC_D2CCIP2R_USART234578SEL_SHIFT   0
@@ -402,6 +403,10 @@ LGPL License Terms @ref lgpl_license
 /** @defgroup rcc_d2ccip2r_values RCC_D2CCIP2R Values
  * @ingroup rcc_registers
  * @{*/
+#define RCC_D2CCIP2R_RNGSEL_HSI48           0
+#define RCC_D2CCIP2R_RNGSEL_PLL1Q           1
+#define RCC_D2CCIP2R_RNGSEL_LSE             2
+#define RCC_D2CCIP2R_RNGSEL_LSI             3
 #define RCC_D2CCIP2R_USART16SEL_PCLK2       0
 #define RCC_D2CCIP2R_USART234578SEL_PCLK1   0
 #define RCC_D2CCIP2R_USARTSEL_PLL2Q         1
@@ -774,6 +779,12 @@ void rcc_set_spi123_clksel(uint8_t clksel);
  */
 void rcc_set_spi45_clksel(uint8_t clksel);
 
+/**
+ * Set the clock select for the RNG device.
+ * @param[in] clksel  Clock source to configure for. @ref rcc_d2ccip2r_values
+ * @sa rcc_set_peripheral_clk_sel for equivalent generic functionality
+ */
+void rcc_set_rng_clksel(uint8_t clksel);
 
 END_DECLS
 /**@}*/
diff --git a/include/libopencm3/stm32/h7/rng.h b/include/libopencm3/stm32/h7/rng.h
new file mode 100644
index 00000000..09d014d1
--- /dev/null
+++ b/include/libopencm3/stm32/h7/rng.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_RNG_H
+#define LIBOPENCM3_RNG_H
+
+#include <libopencm3/stm32/common/rng_common_v1.h>
+
+#endif
diff --git a/include/libopencm3/stm32/rng.h b/include/libopencm3/stm32/rng.h
index 58878c71..01f1b104 100644
--- a/include/libopencm3/stm32/rng.h
+++ b/include/libopencm3/stm32/rng.h
@@ -26,6 +26,8 @@
 #       include <libopencm3/stm32/f4/rng.h>
 #elif defined(STM32F7)
 #       include <libopencm3/stm32/f7/rng.h>
+#elif defined(STM32H7)
+#       include <libopencm3/stm32/h7/rng.h>
 #elif defined(STM32L0)
 #       include <libopencm3/stm32/l0/rng.h>
 #elif defined(STM32L4)
diff --git a/lib/stm32/h7/Makefile b/lib/stm32/h7/Makefile
index 181ec524..737c2fc7 100644
--- a/lib/stm32/h7/Makefile
+++ b/lib/stm32/h7/Makefile
@@ -44,6 +44,7 @@ OBJS += fmc_common_f47.o
 OBJS += gpio_common_all.o gpio_common_f0234.o
 OBJS += pwr.o rcc.o
 OBJS += rcc_common_all.o
+OBJS += rng_common_v1.o
 OBJS += spi_common_all.o spi_common_v2.o
 OBJS += timer_common_all.o
 OBJS += usart_common_v2.o usart_common_fifos.o
diff --git a/lib/stm32/h7/rcc.c b/lib/stm32/h7/rcc.c
index 4a24f7ec..0977ebdf 100644
--- a/lib/stm32/h7/rcc.c
+++ b/lib/stm32/h7/rcc.c
@@ -361,6 +361,11 @@ void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel) {
 			mask = RCC_D2CCIP1R_FDCANSEL_MASK << RCC_D2CCIP1R_FDCANSEL_SHIFT;
 			val = sel << RCC_D2CCIP1R_FDCANSEL_SHIFT;
 			break;
+		case RNG_BASE:
+		  reg = &RCC_D2CCIP2R;
+		  mask = RCC_D2CCIP2R_RNGSEL_MASK << RCC_D2CCIP2R_RNGSEL_SHIFT;
+		  val = sel << RCC_D2CCIP2R_RNGSEL_SHIFT;
+		  break;
 		case SPI1_BASE:
 		case SPI2_BASE:
 		case SPI3_BASE:
@@ -406,6 +411,11 @@ void rcc_set_fdcan_clksel(uint8_t clksel) {
 	RCC_D2CCIP1R |= clksel << RCC_D2CCIP1R_FDCANSEL_SHIFT;
 }
 
+void rcc_set_rng_clksel(uint8_t clksel) {
+	RCC_D2CCIP2R &= ~(RCC_D2CCIP2R_RNGSEL_MASK << RCC_D2CCIP2R_RNGSEL_SHIFT);
+	RCC_D2CCIP2R |= clksel << RCC_D2CCIP2R_RNGSEL_SHIFT;
+}
+
 void rcc_set_spi123_clksel(uint8_t clksel) {
 	RCC_D2CCIP1R &= ~(RCC_D2CCIP1R_SPI123SEL_MASK << RCC_D2CCIP1R_SPI123SEL_SHIFT);
 	RCC_D2CCIP1R |= clksel << RCC_D2CCIP1R_SPI123SEL_SHIFT;