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@ -62,6 +62,84 @@ |
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/* STIR: Software Trigger Interrupt Register */ |
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#define NVIC_STIR MMIO32(STIR_BASE) |
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/* --- IRQ channel numbers-------------------------------------------------- */ |
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/* Cortex M3 System Interrupts */ |
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#define NVIC_NMI_IRQ -14 |
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#define NVIC_HARD_FAULT_IRQ -13 |
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#define NVIC_MEM_MANAGE_IRQ -12 |
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#define NVIC_BUS_FAULT_IRQ -11 |
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#define NVIC_USAGE_FAULT_IRQ -10 |
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/* irq numbers -6 to -9 are reserved */ |
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#define NVIC_SV_CALL_IRQ -5 |
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#define DEBUG_MONITOR_IRQ -4 |
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/* irq number -3 reserved */ |
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#define NVIC_PENDSV_IRQ -2 |
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#define NVIC_SYSTICK_IRQ -1 |
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/* User Interrupts */ |
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#define NVIC_WWDG_IRQ 0 |
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#define NVIC_PVD_IRQ 1 |
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#define NVIC_TAMPER_IRQ 2 |
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#define NVIC_RTC_IRQ 3 |
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#define NVIC_FLASH_IRQ 4 |
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#define NVIC_RCC_IRQ 5 |
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#define NVIC_EXTI0_IRQ 6 |
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#define NVIC_EXTI1_IRQ 7 |
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#define NVIC_EXTI2_IRQ 8 |
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#define NVIC_EXTI3_IRQ 9 |
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#define NVIC_EXTI4_IRQ 10 |
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#define NVIC_DMA1_CHANNEL1_IRQ 11 |
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#define NVIC_DMA1_CHANNEL2_IRQ 12 |
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#define NVIC_DMA1_CHANNEL3_IRQ 13 |
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#define NVIC_DMA1_CHANNEL4_IRQ 14 |
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#define NVIC_DMA1_CHANNEL5_IRQ 15 |
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#define NVIC_DMA1_CHANNEL6_IRQ 16 |
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#define NVIC_DMA1_CHANNEL7_IRQ 17 |
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#define NVIC_ADC1_2_IRQ 18 |
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#define NVIC_USB_HP_CAN_TX_IRQ 19 |
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#define NVIC_USB_LP_CAN_RX0_IRQ 20 |
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#define NVIC_CAN_RX1_IRQ 21 |
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#define NVIC_CAN_SCE_IRQ 22 |
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#define NVIC_EXTI9_5_IRQ 23 |
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#define NVIC_TIM1_BRK_IRQ 24 |
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#define NVIC_TIM1_UP_IRQ 25 |
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#define NVIC_TIM1_TRG_COM_IRQ 26 |
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#define NVIC_TIM1_CC_IRQ 27 |
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#define NVIC_TIM2_IRQ 28 |
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#define NVIC_TIM3_IRQ 29 |
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#define NVIC_TIM4_IRQ 30 |
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#define NVIC_I2C1_EV_IRQ 31 |
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#define NVIC_I2C1_ER_IRQ 32 |
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#define NVIC_I2C2_EV_IRQ 33 |
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#define NVIC_I2C2_ER_IRQ 34 |
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#define NVIC_SPI1_IRQ 35 |
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#define NVIC_SPI2_IRQ 36 |
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#define NVIC_USART1_IRQ 37 |
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#define NVIC_USART2_IRQ 38 |
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#define NVIC_USART3_IRQ 39 |
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#define NVIC_EXTI15_10_IRQ 40 |
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#define NVIC_RTC_ALARM_IRQ 41 |
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#define NVIC_USB_WAKEUP_IRQ 42 |
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#define NVIC_TIM8_BRK_IRQ 43 |
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#define NVIC_TIM8_UP_IRQ 44 |
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#define NVIC_TIM8_TRG_COM_IRQ 45 |
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#define NVIC_TIM8_CC_IRQ 46 |
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#define NVIC_ADC3_IRQ 47 |
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#define NVIC_FSMC_IRQ 48 |
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#define NVIC_SDIO_IRQ 49 |
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#define NVIC_TIM5_IRQ 50 |
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#define NVIC_SPI3_IRQ 51 |
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#define NVIC_USART4_IRQ 52 |
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#define NVIC_USART5_IRQ 53 |
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#define NVIC_TIM6_IRQ 54 |
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#define NVIC_TIM7_IRQ 55 |
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#define NVIC_DMA2_CHANNEL1_IRQ 56 |
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#define NVIC_DMA2_CHANNEL2_IRQ 57 |
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#define NVIC_DMA2_CHANNEL3_IRQ 58 |
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#define NVIC_DMA2_CHANNEL4_5_IRQ 59 |
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/* --- NVIC functions ------------------------------------------------------ */ |
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void nvic_enable_irq(u8 irqn); |
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