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@ -382,7 +382,7 @@ void rcc_enable_pllr(bool enable) |
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/**
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* @brief Configure APB peripheral clock prescaler |
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* @param[in] APB clock prescaler value @ref rcc_cfgr_ppre |
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* @param[in] ppre APB clock prescaler value @ref rcc_cfgr_ppre |
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*/ |
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void rcc_set_ppre(uint32_t ppre) |
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{ |
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@ -395,7 +395,7 @@ void rcc_set_ppre(uint32_t ppre) |
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/**
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* @brief Configure AHB peripheral clock prescaler |
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* @param[in] AHB clock prescaler value @ref rcc_cfgr_hpre |
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* @param[in] hpre AHB clock prescaler value @ref rcc_cfgr_hpre |
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*/ |
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void rcc_set_hpre(uint32_t hpre) |
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{ |
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@ -408,7 +408,7 @@ void rcc_set_hpre(uint32_t hpre) |
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/**
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* @brief Configure HSI16 clock division factor to feed SYSCLK |
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* @param[in] HSYSSIS clock division factor @ref rcc_cr_hsidiv |
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* @param[in] hsidiv HSYSSIS clock division factor @ref rcc_cr_hsidiv |
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*/ |
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void rcc_set_hsisys_div(uint32_t hsidiv) |
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{ |
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@ -421,7 +421,7 @@ void rcc_set_hsisys_div(uint32_t hsidiv) |
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/**
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* @brief Configure mco prescaler. |
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* @param[in] mcore prescaler value @ref rcc_cfgr_mcopre |
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* @param[in] mcopre prescaler value @ref rcc_cfgr_mcopre |
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*/ |
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void rcc_set_mcopre(uint32_t mcopre) |
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{ |
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@ -434,7 +434,7 @@ void rcc_set_mcopre(uint32_t mcopre) |
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/**
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* @brief Setup sysclock with desired source (HSE/HSI/PLL/LSE/LSI). taking care of flash/pwr and src configuration |
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* @param rcc_clock_scale with desired parameters |
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* @param clock rcc_clock_scale with desired parameters |
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*/ |
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void rcc_clock_setup(const struct rcc_clock_scale *clock) |
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{ |
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@ -497,6 +497,7 @@ void rcc_set_rng_clk_div(uint32_t rng_div) |
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/**
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* @brief Set the peripheral clock source |
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* @param periph peripheral of choice, eg XXX_BASE |
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* @param sel periphral clock source |
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*/ |
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void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel) |
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