Frantisek Burian
11 years ago
committed by
Karl Palsson
4 changed files with 290 additions and 61 deletions
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/** @defgroup ethernet_phy_ksz8051mll_defines PHY KSZ8051mll Defines
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* |
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* @brief <b>Defined Constants and Types for the Ethernet PHY KSZ8051mll |
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* chips</b> |
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* |
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* @ingroup ETH |
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* |
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* @version 1.0.0 |
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* |
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* @author @htmlonly © @endhtmlonly 2013 Frantisek Burian <BuFran@seznam.cz> |
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* |
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* @date 1 September 2013 |
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* |
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* LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#ifndef LIBOPENCM3_PHY_KSZ8051MLL_H |
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#define LIBOPENCM3_PHY_KSZ8051MLL_H |
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#include <libopencm3/ethernet/phy.h> |
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/**@{*/ |
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/* Registers */ |
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#define PHY_REG_AFECTRL 0x11 |
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#define PHY_REG_RXERCTR 0x15 |
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#define PHY_REG_STRAPOVRD 0x16 |
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#define PHY_REG_STRAPSTAT 0x17 |
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#define PHY_REG_ECR 0x18 |
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#define PHY_REG_ICSR 0x1B |
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#define PHY_REG_LINKMD 0x1D |
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#define PHY_REG_CR1 0x1E |
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#define PHY_REG_CR2 0x1E |
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/**@}*/ |
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#endif /* LIBOPENCM3_PHY_KSZ8051MLL_H__ */ |
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/** @defgroup ethernet_phy_ksz80x1_defines PHY KSZ80X1 Defines
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* |
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* @brief <b>Defined Constants and Types for the Ethernet PHY KSZ80X1 chips |
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* chips</b> |
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* |
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* @ingroup ETH |
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* |
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* @version 1.0.0 |
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* |
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* @author @htmlonly © @endhtmlonly 2013 Frantisek Burian <BuFran@seznam.cz> |
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* |
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* @date 1 September 2013 |
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* |
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* LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#ifndef LIBOPENCM3_PHY_KSZ80X1_H |
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#define LIBOPENCM3_PHY_KSZ80X1_H |
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#include <libopencm3/ethernet/phy.h> |
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/**@{*/ |
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/*
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* Architecture availability: |
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* |
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* A stands for KSZ8001 / KSZ8001L |
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* B stands for KSZ8021RNL / KSZ8031RNL |
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* C stands for KSZ8041NL / KSZ8041NLJ |
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* D stands for KSZ8041RNL |
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* E stands for KSZ8041TL / KSZ8041FTL / KSZ8041MLL |
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* F stands for KSZ8051MLL |
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* G stands for KSZ8051MNL / KSZ8051RNL |
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* H stands for KSZ8051MNLU / KSZ8051RNLU |
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* I stands for KSZ8081MLX /KSZ8081MNX / KSZ8081RNB |
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* J stands for KSZ8081RNA / KSZ8081RND |
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* K stands for KSZ8091MLX / KSZ8091MNX / KSZ8091RNB |
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* L stands for KSZ8091RNA / KSZ8091RND |
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* |
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* No sign marks available for all |
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*/ |
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/*****************************************************************************/ |
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/* Register definitions */ |
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/*****************************************************************************/ |
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#define KSZ80X1_BCR 0x00 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_BSR 0x01 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ID1 0x02 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ID2 0x03 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ANTX 0x04 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ANRX 0x05 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ANEXP 0x06 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ANNPTX 0x07 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ANNPRX 0x08 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_MMDCR 0x0D /* ----------KL */ |
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#define KSZ80X1_MMDAR 0x0E /* ----------KL */ |
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#define KSZ80X1_DRCTRL 0x10 /* -B-----HIJKL */ |
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#define KSZ80X1_AFECTRL 0x11 /* -B---FGHIJKL */ |
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#define KSZ80X1_AFECTRL4 0x13 /* ----------KL */ |
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#define KSZ80X1_MIICTRL 0x14 /* ---DE------- */ |
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#define KSZ80X1_RXERCTR 0x15 /* ABCDEFGHIJKL */ |
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#define KSZ80X1_STRAPOVRD 0x16 /* -B---FGHIJKL */ |
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#define KSZ80X1_STRAPSTAT 0x17 /* -B---FGHIJKL */ |
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#define KSZ80X1_ECR 0x18 /* -B---FGHIJKL */ |
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#define KSZ80X1_ICSR 0x1B /* ABCDEFGHIJKL */ |
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#define KSZ80X1_LINKMD 0x1D /* AB--EFGHIJKL */ |
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#define KSZ80X1_CR1 0x1E /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2 0x1F /* ABCDEFGHIJKL */ |
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/*****************************************************************************/ |
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/* Register values */ |
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/*****************************************************************************/ |
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/* KSZ80X1_BCR --------------------------------------------------------------*/ |
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/* KSZ80X1_BSR --------------------------------------------------------------*/ |
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/* KSZ80X1_ID1 --------------------------------------------------------------*/ |
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/* KSZ80X1_ID2 --------------------------------------------------------------*/ |
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/* KSZ80X1_ANTX -------------------------------------------------------------*/ |
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/* KSZ80X1_ANRX -------------------------------------------------------------*/ |
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/* KSZ80X1_ANEXP ------------------------------------------------------------*/ |
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/* KSZ80X1_ANNPTX -----------------------------------------------------------*/ |
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/* KSZ80X1_ANNPRX -----------------------------------------------------------*/ |
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/* KSZ80X1_MMDCR ------------------------------------------------------------*/ |
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#define KSZ80X1_MMDCR_OPMODE (3 << 14) /* ----------KL */ |
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#define KSZ80X1_MMDCR_OPMODE_REGISTER (0 << 14) /* ----------KL */ |
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#define KSZ80X1_MMDCR_OPMODE_DATA (1 << 14) /* ----------KL */ |
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#define KSZ80X1_MMDCR_OPMODE_DATA_POSTINC (2 << 14) /* ----------KL */ |
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#define KSZ80X1_MMDCR_OPMODE_DATA_WPOSTINC (3 << 14) /* ----------KL */ |
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#define KSZ80X1_MMDCR_DEVADDR (31 << 14) /* ----------KL */ |
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/* KSZ80X1_MMDAR ------------------------------------------------------------*/ |
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/* KSZ80X1_DRCTRL -----------------------------------------------------------*/ |
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#define KSZ80X1_DRCTRL_PLLOFF (1 << 4) /* -B-----HIJKL */ |
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/* KSZ80X1_AFECTRL ----------------------------------------------------------*/ |
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#define KSZ80X1_AFECTRL_SLOWOSC (1 << 5) /* -B---FGHIJKL */ |
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/* KSZ80X1_AFECTRL4 ---------------------------------------------------------*/ |
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#define KSZ80X1_AFECTRL4_10TE (1 << 4) /* ----------KL */ |
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/* KSZ80X1_MIICTRL ----------------------------------------------------------*/ |
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#define KSZ8051_MIICTRL_100MRESTORE (1 << 7) /* ---DE------ */ |
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#define KSZ8051_MIICTRL_100MRESTORE (1 << 6) /* ---DE------ */ |
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/* KSZ80X1_RXERCTR ----------------------------------------------------------*/ |
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/* KSZ8051_STRAPOVRD --------------------------------------------------------*/ |
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/* strapping options availability depends on MII/RMII availability on chip */ |
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#define KSZ80X1_STRAPOVRD_FACTORY (1 << 15) /* --------IJ-- */ |
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#define KSZ80X1_STRAPOVRD_PMEWOL (1 << 15) /* ----------KL */ |
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#define KSZ80X1_STRAPOVRD_BCASTOFF (1 << 9) /* -----FGHIJKL */ |
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#define KSZ80X1_STRAPOVRD_MIIBTOB (1 << 7) /* -----FGHI-K- */ |
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#define KSZ80X1_STRAPOVRD_RMIIBTOB (1 << 6) /* -B----GHIJKL */ |
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#define KSZ80X1_STRAPOVRD_NANDTREE (1 << 5) /* -B---FGHIJK- */ |
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#define KSZ80X1_STRAPOVRD_RMIIOVRD (1 << 1) /* -B----GHIJKL */ |
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#define KSZ80X1_STRAPOVRD_MIIOVRD (1 << 0) /* -----FGHI-K- */ |
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/* KSZ80X1_STRAPSTAT --------------------------------------------------------*/ |
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/* strapping options availability depends on MII/RMII availability on chip */ |
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/* KSZ8021/KSZ8031/KSZ8091RNA/KSZ8091RND supports phy address 0 and 3 only! */ |
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#define KSZ80X1_STRAPSTAT_PHYAD_SHIFT 13 /* -B---FGHIJKL */ |
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#define KSZ80X1_STRAPSTAT_PHYAD (7 << KSZ8051_STRAPSTAT_PHYAD_SHIFT) |
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#define KSZ80X1_STRAPSTAT_BCASTOFF (1 << 9) /* -----FGHI-K- */ |
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#define KSZ80X1_STRAPSTAT_MIIBTOB (1 << 7) /* -----FGHI-K- */ |
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#define KSZ80X1_STRAPSTAT_RMIIBTOB (1 << 6) /* ------GHI-K- */ |
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#define KSZ80X1_STRAPSTAT_NANDTREE (1 << 5) /* -----FGHI-K- */ |
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#define KSZ80X1_STRAPSTAT_RMII (1 << 1) /* -B----GHIJKL */ |
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#define KSZ80X1_STRAPSTAT_MII (1 << 0) /* -----FGHI-K- */ |
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/* KSZ80X1_ECR --------------------------------------------------------------*/ |
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#define KSZ8051_ECR_EDPDDIS (1 << 11) /* -B---FGHIJKL */ |
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#define KSZ8051_ECR_100TXPREAMBLE (1 << 10) /* -----FGHI-K- */ |
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#define KSZ8051_ECR_10TXPREAMBLE (1 << 6) /* -----FGHI-K- */ |
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/* KSZ80X1_ICSR -------------------------------------------------------------*/ |
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#define KSZ80X1_ICSR_JABIE (1 << 15) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_RERRIE (1 << 14) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_PRIE (1 << 13) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_PDFLTIE (1 << 12) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LPACKIE (1 << 11) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LDIE (1 << 10) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_RFAULTIE (1 << 9) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LINKUPIE (1 << 8) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_JABIF (1 << 7) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_RERRIF (1 << 6) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_PRIF (1 << 5) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_PDFLTIF (1 << 4) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LPACKIF (1 << 3) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LDIF (1 << 2) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_RFAULTIF (1 << 1) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_ICSR_LINKUPIF (1 << 0) /* ABCDEFGHIJKL */ |
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/* KSZ80X1_LINKMD -----------------------------------------------------------*/ |
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#define KSZ80X1_LINKMD_TESTEN (1 << 15) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_TESTRES (3 << 13) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_TESTRES_NORMAL (0 << 13) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_TESTRES_OPEN (1 << 13) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_TESTRES_SHORT (2 << 13) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_TESTRES_FAILED (3 << 13) /* AB--EFGHIJKL */ |
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#define KSZ80X1_LINKMD_SHORTCABLE (1 << 12) /* -----FGHIJKL */ |
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#define KSZ80X1_LINKMD_DISTANCE (0x1FF << 0) /* AB--EFGHIJKL */ |
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/* KSZ80X1_CR1 --------------------------------------------------------------*/ |
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/* family set 1 */ |
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#define KSZ80X1_CR1_LEDMODE (3 << 14) /* A-CDE------- */ |
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#define KSZ80X1_CR1_LEDMODE_COL_FD_SPD_LNK (0 << 14) /* A---------- */ |
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#define KSZ80X1_CR1_LEDMODE_ACT_FD_SPD_LNK (1 << 14) /* A---------- */ |
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#define KSZ80X1_CR1_LEDMODE_ACT_FD_100_10 (2 << 14) /* A---------- */ |
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#define KSZ80X1_CR1_LEDMODE_SPD_LNK (0 << 14) /* --CDE------ */ |
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#define KSZ80X1_CR1_LEDMODE_ACT_LNK (1 << 14) /* --CDE------ */ |
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#define KSZ80X1_CR1_POLARITY (1 << 13) /* A-CDE------ */ |
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#define KSZ80X1_CR1_FEFAULT (1 << 12) /* A---E------ */ |
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#define KSZ80X1_CR1_MDIX (1 << 11) /* A-CDE------ */ |
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#define KSZ80X1_CR1_LOOPBACK (1 << 7) /* A-CDE------ */ |
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/* family set 2 */ |
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#define KSZ80X1_CR1_FLOWCTRL (1 << 9) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_LINK (1 << 8) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_POLARITY (1 << 7) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MDIX (1 << 5) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_ENERGY (1 << 4) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_ISOLATE (1 << 3) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE (7 << 0) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE_AUTONEG (0 << 0) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE_10HD (1 << 0) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE_100HD (2 << 0) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE_10FD (5 << 0) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR1_MODE_100FD (6 << 0) /* -B---FGHIJKL */ |
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/* KSZ80X1_CR2 --------------------------------------------------------------*/ |
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/* refclk options availability depends on RMII availability on chip */ |
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#define KSZ80X1_CR2_HPMDIX (1 << 15) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2_MDIXSEL (1 << 14) /* ABCDEFGHIJKL*/ |
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#define KSZ80X1_CR2_MDIXEN (1 << 13) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2_ENERGY (1 << 12) /* A-CDE------- */ |
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#define KSZ80X1_CR2_FORCE (1 << 11) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2_POWERSAVE (1 << 10) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2_IRQLVL (1 << 9) /* ABCDEFGHIJKL */ |
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#define KSZ80X1_CR2_JABEN (1 << 8) /* ABCDEFGHIJKL */ |
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/* family set 1 */ |
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#define KSZ80X1_CR2_ANDONE (1 << 7) /* A-CDE------- */ |
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#define KSZ80X1_CR2_PAUSEEN (1 << 6) /* A-CDE------- */ |
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#define KSZ80X1_CR2_ISOLATE (1 << 5) /* A-CDE------- */ |
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#define KSZ80X1_CR2_MODE (7 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_AN (0 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_10HD (1 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_100HD (2 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_DEFAULT (3 << 2) /* A--- */ |
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#define KSZ80X1_CR2_MODE_10FD (5 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_100FD (6 << 2) /* A-CDE */ |
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#define KSZ80X1_CR2_MODE_ISOLATE (7 << 2) /* A--- */ |
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/* family set 2 */ |
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#define KSZ80X1_CR2_REFCLK (1 << 7) /* -B----GHIJKL */ |
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#define KSZ80X1_CR2_REFCLK_25MHZ (0 << 7) /* -B----GHIJKL */ |
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#define KSZ80X1_CR2_REFCLK_50MHZ (1 << 7) /* -B----GHIJKL */ |
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#define KSZ80X1_CR2_LED (3 << 4) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR2_LED_SPD_LNKACT (0 << 4) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR2_LED_ACT_LNK (1 << 4) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR2_TXDIS (1 << 3) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR2_REMLPB (1 << 2) /* -B---FGHIJKL */ |
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#define KSZ80X1_CR2_SQEEN (1 << 1) /* ABCDEFGHI-KL */ |
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#define KSZ80X1_CR2_SCRAMBEN (1 << 0) /* ABCDEFGHIJKL */ |
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/*****************************************************************************/ |
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/* API definitions */ |
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/*****************************************************************************/ |
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/*****************************************************************************/ |
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/* API Functions */ |
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/*****************************************************************************/ |
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/**@}*/ |
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#endif /* LIBOPENCM3_PHY_KSZ8051_H__ */ |
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