Browse Source
* merged: nrf tree from unicore-mx * fixed: small changes to make merged code play with rest of locm3 again * added: linker script generator defines for nRF51/52 stubs * added: doxygen support This removes code and changes names and styles where relevant to be more inline with normal libopencm3. NRF52x library is built for hardfloat, M4F by default. The M4 no float variants are less common, and if needed, the library can be built manually for those variants. Unless some very common boards show up using those parts, we don't need an extra library build. Reviewed-by: Karl Palsson <karlp@tweak.net.au> Tested-by: Karl Palsson <karlp@tweak.net.au>pull/1371/head
Eduard Drusa
3 years ago
committed by
Karl Palsson
Karl Palsson
75 changed files with 4951 additions and 0 deletions
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PREDEFINED += __ARM_ARCH_7EM__ |
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PREDEFINED += __ARM_ARCH_7EM__ |
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/** @defgroup clock_defines CLOCK Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx Clock control</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <stdbool.h> |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/common/clock.h> |
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/* Clock registers */ |
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#define CLOCK_XTALFREQ MMIO32(CLOCK_BASE + 0x550) |
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#define CLOCK_PCLK 16000000 |
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enum clock_xtal_freq { |
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CLOCK_XTAL_FREQ_32MHZ, |
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CLOCK_XTAL_FREQ_16MHZ = 0xff, |
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}; |
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BEGIN_DECLS |
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void clock_set_xtal_freq(enum clock_xtal_freq freq); |
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END_DECLS |
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/** @page libopencm3 NRF51
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@version 1.0.0 |
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@date April 2020 |
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API documentation for Nordic Semiconductor NRF51 Cortex M0 series |
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LGPL License Terms @ref lgpl_license |
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*/ |
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/** @defgroup peripheral_apis Peripheral APIs
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* APIs for device peripherals |
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*/ |
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/** @defgroup NRF51xx NRF51xx
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Libraries for Nordic Semiconductor NRF51xx series. |
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@version 1.0.0 |
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|
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LGPL License Terms @ref lgpl_license |
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*/ |
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/** @defgroup NRF51xx_defines NRF51xx Defines
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@brief Defined Constants and Types for the NRF51xx series |
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@version 1.0.0 |
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|
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LGPL License Terms @ref lgpl_license |
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*/ |
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/** @defgroup ficr_defines FICR Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx Factory information |
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* configuration registers</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/common/ficr.h> |
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/* Deprecated by Nordic */ |
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#define FICR_CLENR0 MMIO32(FICR_BASE + 0x028) |
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/* Deprecated by Nordic */ |
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#define FICR_PPFC MMIO32(FICR_BASE + 0x02C) |
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#define FICR_NUMRAMBLOCK MMIO32(FICR_BASE + 0x034) |
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#define FICR_SIZERAMBLOCKS MMIO32(FICR_BASE + 0x038) |
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/* Deprecated by Nordic */ |
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#define FICR_SIZERAMBLOCK(n) MMIO32(FICR_BASE + 0x038 + 0x4 * (n)) |
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#define FICR_CONFIGID MMIO32(FICR_BASE + 0x05C) |
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#define FICR_OVERRIDEEN MMIO32(FICR_BASE + 0x0AC) |
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/* Override values for Nordic Semi proprietary NRF 1Mbit mode */ |
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#define FICR_NRF_1MBIT(n) MMIO32(FICR_BASE + 0x0B0 + 0x4 * (n)) |
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#define FICR_NRF_1MBIT0 FICR_NRF_1MBIT(0) |
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#define FICR_NRF_1MBIT1 FICR_NRF_1MBIT(1) |
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#define FICR_NRF_1MBIT2 FICR_NRF_1MBIT(2) |
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#define FICR_NRF_1MBIT3 FICR_NRF_1MBIT(3) |
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#define FICR_NRF_1MBIT4 FICR_NRF_1MBIT(4) |
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/* Override values for BLE 1Mbit mode */ |
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#define FICR_BLE_1MBIT(n) MMIO32(FICR_BASE + 0x0EC + 0x4 * (n)) |
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#define FICR_BLE_1MBIT0 FICR_BLE_1MBIT(0) |
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#define FICR_BLE_1MBIT1 FICR_BLE_1MBIT(1) |
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#define FICR_BLE_1MBIT2 FICR_BLE_1MBIT(2) |
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#define FICR_BLE_1MBIT3 FICR_BLE_1MBIT(3) |
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#define FICR_BLE_1MBIT4 FICR_BLE_1MBIT(4) |
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#define FICR_OVERRIDEEN_NRF_1MBIT (1 << 0) |
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#define FICR_OVERRIDEEN_BLE_1MBIT (1 << 3) |
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/** @defgroup gpio_defines GPIO Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx General Purpose I/O</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/nrf/common/gpio.h> |
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/** @defgroup i2c_defines I2C Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx I2C</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/periph.h> |
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#include <libopencm3/nrf/common/i2c.h> |
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{ |
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"irqs": [ |
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"power_clock", |
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"radio", |
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"uart0", |
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"spi0_twi0", |
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"spi1_twi1", |
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"reserved0", |
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"gpiote", |
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"adc", |
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"timer0", |
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"timer1", |
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"timer2", |
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"rtc0", |
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"temp", |
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"rng", |
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"ecb", |
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"ccm_aar", |
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"wdt", |
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"rtc1", |
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"qdec", |
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"lpcomp", |
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"swi0", |
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"swi1", |
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"swi2", |
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"swi3", |
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"swi4", |
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"swi5" |
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], |
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"partname_humanreadable": "Nordic Semi NRF51 series", |
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"partname_doxygen": "NRF51", |
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"includeguard": "LIBOPENCM3_NRF51_NVIC_H" |
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} |
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@ -0,0 +1,26 @@ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/common/memorymap.h> |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/cm3/nvic.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/common/periph.h> |
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/** @defgroup power_defines POWER Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx Power control</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
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* it under the terms of the GNU Lesser General Public License as published by |
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* the Free Software Foundation, either version 3 of the License, or |
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* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#pragma once |
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/periph.h> |
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#include <libopencm3/nrf/common/periph.h> |
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@ -0,0 +1,39 @@ |
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/** @defgroup ppi_defines PPI Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx Programmable peripheral |
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* interconnect</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
|
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
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* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
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* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
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*/ |
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|
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#pragma once |
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|
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/common/ppi.h> |
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@ -0,0 +1,52 @@ |
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/** @defgroup radio_defines RADIO Defines
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx 2.4GHz radio</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
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*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
|
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
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* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
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* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
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* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
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*/ |
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|
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#pragma once |
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|
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#include <libopencm3/cm3/common.h> |
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#include <libopencm3/nrf/memorymap.h> |
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#include <libopencm3/nrf/periph.h> |
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#include <libopencm3/nrf/common/radio.h> |
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enum radio_mode { |
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RADIO_MODE_NRF_1MBIT, |
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RADIO_MODE_NRF_2MBIT, |
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RADIO_MODE_NRF_250KBIT, |
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RADIO_MODE_BLE_1MBIT, |
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}; |
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BEGIN_DECLS |
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void radio_set_mode(enum radio_mode mode); |
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END_DECLS |
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@ -0,0 +1,40 @@ |
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/** @defgroup rtc_defines RTC Defines
|
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* |
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* @brief <b>Defined Constants and Types for the NRF51xx Realtime clock</b> |
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* |
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* @ingroup NRF51xx_defines |
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* |
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* @version 1.0.0 |
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* |
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* @date Nov 2021 |
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* |
|||
*LGPL License Terms @ref lgpl_license |
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*/ |
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/*
|
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* This file is part of the libopencm3 project. |
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* |
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* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
|
|||
#include <libopencm3/nrf/common/rtc.h> |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup timer_defines TIMER Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF51xx Timer</b> |
|||
* |
|||
* @ingroup NRF51xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/timer.h> |
|||
|
|||
|
|||
@ -0,0 +1,39 @@ |
|||
/** @defgroup uart_defines UART Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF51xx UART</b> |
|||
* |
|||
* @ingroup NRF51xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/uart.h> |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup uicr_defines UICR Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF51xx User information configuraton |
|||
* registers</b> |
|||
* |
|||
* @ingroup NRF51xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/common/uicr.h> |
|||
|
|||
|
|||
@ -0,0 +1,45 @@ |
|||
/** @defgroup clock_defines CLOCK Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Clock control</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <stdbool.h> |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/common/clock.h> |
|||
|
|||
/* Clock registers */ |
|||
#define CLOCK_TRACECONFIG MMIO32(CLOCK_BASE + 0x55C) |
|||
|
|||
#define CLOCK_PCLK 32000000 |
|||
|
|||
@ -0,0 +1,32 @@ |
|||
/** @page libopencm3 NRF52
|
|||
|
|||
@version 1.0.0 |
|||
|
|||
@date November 2021 |
|||
|
|||
API documentation for Nordic Semiconductor nRF52 Cortex M4 series |
|||
|
|||
LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
|
|||
/** @defgroup peripheral_apis Peripheral APIs
|
|||
* APIs for device peripherals |
|||
*/ |
|||
|
|||
/** @defgroup NRF52xx NRF52xx
|
|||
Libraries for Nordic Semiconductor NRF52xx series. |
|||
|
|||
@version 1.0.0 |
|||
|
|||
LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
|
|||
/** @defgroup NRF52xx_defines NRF52xx Defines
|
|||
|
|||
@brief Defined Constants and Types for the NRF52xx series |
|||
|
|||
@version 1.0.0 |
|||
|
|||
LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
|
|||
@ -0,0 +1,39 @@ |
|||
/** @defgroup ficr_defines FICR Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Factory information |
|||
* configuration registers</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/common/ficr.h> |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @defgroup gpio_defines GPIO Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx General Purpose I/O</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/nrf/common/gpio.h> |
|||
|
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup i2c_defines I2C Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx I2C</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/i2c.h> |
|||
|
|||
|
|||
@ -0,0 +1,35 @@ |
|||
{ |
|||
"irqs": [ |
|||
"power_clock", |
|||
"radio", |
|||
"uart0", |
|||
"spi0_twi0", |
|||
"spi1_twi1", |
|||
"reserved0", |
|||
"gpiote", |
|||
"adc", |
|||
"timer0", |
|||
"timer1", |
|||
"timer2", |
|||
"timer3", |
|||
"timer4", |
|||
"rtc0", |
|||
"temp", |
|||
"rng", |
|||
"ecb", |
|||
"ccm_aar", |
|||
"wdt", |
|||
"rtc1", |
|||
"qdec", |
|||
"lpcomp", |
|||
"swi0", |
|||
"swi1", |
|||
"swi2", |
|||
"swi3", |
|||
"swi4", |
|||
"swi5" |
|||
], |
|||
"partname_humanreadable": "Nordic Semi NRF52 series", |
|||
"partname_doxygen": "NRF52", |
|||
"includeguard": "LIBOPENCM3_NRF52_NVIC_H" |
|||
} |
|||
@ -0,0 +1,28 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/common/memorymap.h> |
|||
|
|||
#define TIMER3_BASE (APB_BASE + 0x1A000) |
|||
#define TIMER4_BASE (APB_BASE + 0x1B000) |
|||
|
|||
@ -0,0 +1,28 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/cm3/nvic.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
|
|||
#include <libopencm3/nrf/common/periph.h> |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup power_defines POWER Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Power control</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/periph.h> |
|||
|
|||
|
|||
@ -0,0 +1,39 @@ |
|||
/** @defgroup ppi_defines PPI Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Programmable peripheral |
|||
* interconnect</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/common/ppi.h> |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup radio_defines RADIO Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx 2.4GHz radio</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/radio.h> |
|||
|
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup rtc_defines RTC Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Realtime clock</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
|
|||
#include <libopencm3/nrf/common/rtc.h> |
|||
|
|||
@ -0,0 +1,51 @@ |
|||
/** @defgroup timer_defines TIMER Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx Timer</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/timer.h> |
|||
|
|||
/**@{*/ |
|||
/* Timer/Counter */ |
|||
/** @addtogroup timer_block TIMER instances
|
|||
* @{ |
|||
*/ |
|||
#define TIMER4 TIMER4_BASE |
|||
#define TIMER3 TIMER3_BASE |
|||
|
|||
/**@}*/ |
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,39 @@ |
|||
/** @defgroup uart_defines UART Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx UART</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
#include <libopencm3/nrf/common/uart.h> |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @defgroup uicr_defines UICR Defines
|
|||
* |
|||
* @brief <b>Defined Constants and Types for the NRF52xx User information configuraton |
|||
* registers</b> |
|||
* |
|||
* @ingroup NRF52xx_defines |
|||
* |
|||
* @version 1.0.0 |
|||
* |
|||
* @date Nov 2021 |
|||
* |
|||
*LGPL License Terms @ref lgpl_license |
|||
*/ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/common/uicr.h> |
|||
|
|||
|
|||
@ -0,0 +1,30 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/clock.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/clock.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,98 @@ |
|||
/** @addtogroup clock_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <stdbool.h> |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
/**@{*/ |
|||
|
|||
/* Clock tasks */ |
|||
#define CLOCK_TASK_HFCLKSTART MMIO32(CLOCK_BASE + 0x000) |
|||
#define CLOCK_TASK_HFCLKSTOP MMIO32(CLOCK_BASE + 0x004) |
|||
#define CLOCK_TASK_LFCLKSTART MMIO32(CLOCK_BASE + 0x008) |
|||
#define CLOCK_TASK_LFCLKSTOP MMIO32(CLOCK_BASE + 0x00C) |
|||
#define CLOCK_TASK_CAL MMIO32(CLOCK_BASE + 0x010) |
|||
#define CLOCK_TASK_CTSTART MMIO32(CLOCK_BASE + 0x014) |
|||
#define CLOCK_TASK_CTSTOP MMIO32(CLOCK_BASE + 0x018) |
|||
|
|||
/* Clock events */ |
|||
#define CLOCK_EVENT_HFCLKSTARTED MMIO32(CLOCK_BASE + 0x100) |
|||
#define CLOCK_EVENT_LFCLKSTARTED MMIO32(CLOCK_BASE + 0x104) |
|||
#define CLOCK_EVENT_DONE MMIO32(CLOCK_BASE + 0x10C) |
|||
#define CLOCK_EVENT_CTTO MMIO32(CLOCK_BASE + 0x110) |
|||
|
|||
/* Clock registers */ |
|||
#define CLOCK_INTENSET MMIO32(CLOCK_BASE + 0x304) |
|||
#define CLOCK_INTENCLR MMIO32(CLOCK_BASE + 0x308) |
|||
#define CLOCK_HFCLKRUN MMIO32(CLOCK_BASE + 0x408) |
|||
#define CLOCK_HFCLKSTAT MMIO32(CLOCK_BASE + 0x40C) |
|||
#define CLOCK_LFCLKRUN MMIO32(CLOCK_BASE + 0x414) |
|||
#define CLOCK_LFCLKSTAT MMIO32(CLOCK_BASE + 0x418) |
|||
#define CLOCK_LFCLKSRCCOPY MMIO32(CLOCK_BASE + 0x41C) |
|||
#define CLOCK_LFCLKSRC MMIO32(CLOCK_BASE + 0x518) |
|||
#define CLOCK_CTIV MMIO32(CLOCK_BASE + 0x538) |
|||
|
|||
/* Register contents */ |
|||
#define CLOCK_INTEN_HFCLKSTARTED (1 << 0) |
|||
#define CLOCK_INTEN_LFCLKSTARTED (1 << 1) |
|||
#define CLOCK_INTEN_DONE (1 << 3) |
|||
#define CLOCK_INTEN_CTTO (1 << 4) |
|||
|
|||
#define CLOCK_HFCLKRUN_STATUS (1 << 0) |
|||
|
|||
#define CLOCK_HFCLKSTAT_SRC (1 << 0) |
|||
#define CLOCK_HFCLKSTAT_STATE (1 << 16) |
|||
|
|||
#define CLOCK_LFCLKRUN_STATUS (1 << 0) |
|||
|
|||
#define CLOCK_LFCLK_SRC_SHIFT (0) |
|||
#define CLOCK_LFCLK_SRC_MASK (3 << CLOCK_LFCLKSTAT_SRC_SHIFT) |
|||
#define CLOCK_LFCLK_SRC_MASKED(V) (((V) << CLOCK_LFCLKSTAT_SRC_SHIFT) & CLOCK_LFCLKSTAT_SRC_MASK) |
|||
|
|||
#define CLOCK_LFCLKSTAT_STATE (1 << 16) |
|||
|
|||
enum clock_lfclk_src { |
|||
CLOCK_LFCLK_SRC_RC, |
|||
CLOCK_LFCLK_SRC_XTAL, |
|||
CLOCK_LFCLK_SRC_SYNTH, |
|||
}; |
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void clock_start_lfclk(bool wait); |
|||
void clock_stop_lfclk(void); |
|||
void clock_start_hfclk(bool wait); |
|||
void clock_stop_hfclk(void); |
|||
void clock_set_lfclk_src(enum clock_lfclk_src lfclk_src); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,52 @@ |
|||
/** @addtogroup ficr_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
/**@{*/ |
|||
|
|||
/* Factory Information Configuration Register */ |
|||
|
|||
#define FICR_CODEPAGESIZE MMIO32(FICR_BASE + 0x010) |
|||
#define FICR_CODESIZE MMIO32(FICR_BASE + 0x014) |
|||
|
|||
#define FICR_DEVICEID0 MMIO32(FICR_BASE + 0x060) |
|||
#define FICR_DEVICEID1 MMIO32(FICR_BASE + 0x064) |
|||
|
|||
/* Encryption Root */ |
|||
#define FICR_ER(n) MMIO32(FICR_BASE + 0x080 + 0x4 * (n)) |
|||
/* Identity Root */ |
|||
#define FICR_IR(n) MMIO32(FICR_BASE + 0x090 + 0x4 * (n)) |
|||
#define FICR_DEVICEADDRTYPE MMIO32(FICR_BASE + 0x0A0) |
|||
#define FICR_DEVICEADDR0 MMIO32(FICR_BASE + 0x0A4) |
|||
#define FICR_DEVICEADDR1 MMIO32(FICR_BASE + 0x0A8) |
|||
|
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,236 @@ |
|||
/** @addtogroup gpio_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
/**@{*/ |
|||
|
|||
/** @addtogroup gpio_port_id GPIO ports
|
|||
* @{ |
|||
*/ |
|||
/** GPIO port */ |
|||
#define GPIO (GPIO_BASE) |
|||
|
|||
/**@}*/ |
|||
|
|||
#define GPIO_OUT MMIO32(GPIO_BASE + 0x504) |
|||
#define GPIO_OUTSET MMIO32(GPIO_BASE + 0x508) |
|||
#define GPIO_OUTCLR MMIO32(GPIO_BASE + 0x50C) |
|||
|
|||
#define GPIO_IN MMIO32(GPIO_BASE + 0x510) |
|||
|
|||
#define GPIO_DIR MMIO32(GPIO_BASE + 0x514) |
|||
#define GPIO_DIRSET MMIO32(GPIO_BASE + 0x518) |
|||
#define GPIO_DIRCLR MMIO32(GPIO_BASE + 0x51C) |
|||
|
|||
#define GPIO_PIN_CNF(N) MMIO32(GPIO_BASE + 0x700 + 0x4 * (N)) |
|||
|
|||
|
|||
/* Pin mode (CPIO_CNF[1:0] - combines direction and analog/digital */ |
|||
|
|||
#define GPIO_CNF_MODE_MASK 2 |
|||
#define GPIO_CNF_MODE_SHIFT 0 |
|||
|
|||
/* Pin mode (MODE[1:0]) values */ |
|||
/** @defgroup gpio_mode GPIO Pin Mode
|
|||
@ingroup gpio_defines |
|||
@{*/ |
|||
#define GPIO_MODE_INPUT 0 |
|||
#define GPIO_MODE_OUTPUT 1 |
|||
#define GPIO_MODE_ANALOG 2 |
|||
/**@}*/ |
|||
|
|||
#define GPIO_CNF_PUPD_MASK 2 |
|||
#define GPIO_CNF_PUPD_SHIFT 2 |
|||
|
|||
/** @defgroup gpio_pupd GPIO Output Pin Pullup
|
|||
@ingroup gpio_defines |
|||
@{*/ |
|||
#define GPIO_PUPD_NONE 0x0 |
|||
#define GPIO_PUPD_PULLDOWN 0x1 |
|||
#define GPIO_PUPD_PULLUP 0x2 |
|||
/**@}*/ |
|||
|
|||
#define GPIO_CNF_DRIVE_SHIFT 8 |
|||
#define GPIO_CNF_DRIVE_MASK 7 |
|||
|
|||
/** @addtogroup gpio_drive GPIO drive configuration
|
|||
* @{ */ |
|||
|
|||
/** Standard 0, standard 1 */ |
|||
#define GPIO_CNF_DRIVE_S0S1 0 |
|||
|
|||
/** High drive 0, standard 1 */ |
|||
#define GPIO_CNF_DRIVE_H0S1 1 |
|||
|
|||
/** Standard 0, high drive 1 */ |
|||
#define GPIO_CNF_DRIVE_S0H1 2 |
|||
|
|||
/** High drive 0, high drive 1 */ |
|||
#define GPIO_CNF_DRIVE_H0H1 3 |
|||
|
|||
/** Disconnect 0, standard 1 (wired-or connections) */ |
|||
#define GPIO_CNF_DRIVE_D0S1 4 |
|||
|
|||
/** Disconnect 0, high drive 1 (wired-or connections) */ |
|||
#define GPIO_CNF_DRIVE_D0H1 5 |
|||
|
|||
/** Standard 0, disconnect 1 (wired-and connections) */ |
|||
#define GPIO_CNF_DRIVE_S0D1 6 |
|||
|
|||
/** High drive 0, disconnect 1 (wired-and connections) */ |
|||
#define GPIO_CNF_DRIVE_H0D1 7 |
|||
|
|||
/**@}*/ |
|||
|
|||
#define GPIO_CNF_SENSE_SHIFT 16 |
|||
#define GPIO_CNF_SENSE_MASK 3 |
|||
|
|||
/** @addtogroup gpio_sense GPIO sensing mechanism
|
|||
* @{ */ |
|||
|
|||
/** Pin sensing is disabled */ |
|||
#define GPIO_CNF_SENSE_DISABLE 0 |
|||
|
|||
/** Pin sensing is active for high level */ |
|||
#define GPIO_CNF_SENSE_HIGH 2 |
|||
|
|||
/** Pin sensing is active for low level */ |
|||
#define GPIO_CNF_SENSE_LOW 3 |
|||
|
|||
/**@}*/ |
|||
|
|||
/* GPIO Tasks and Events (GPIOTE) */ |
|||
#define GPIO_TASK_OUT(n) MMIO32(GPIOTE_BASE + 0x4 * (n)) |
|||
#define GPIO_EVENT_IN(n) MMIO32(GPIOTE_BASE + 0x100 + 0x4 * (n)) |
|||
|
|||
#define GPIO_EVENT_PORT MMIO32(GPIOTE_BASE + 0x17C) |
|||
|
|||
#define GPIO_INTEN MMIO32(GPIOTE_BASE + 0x300) |
|||
#define GPIO_INTENSET MMIO32(GPIOTE_BASE + 0x304) |
|||
#define GPIO_INTENCLR MMIO32(GPIOTE_BASE + 0x308) |
|||
|
|||
#define GPIO_TE_CONFIG(n) MMIO32(GPIOTE_BASE + 0x510 + 0x4 * (n)) |
|||
|
|||
/* Register Details */ |
|||
#define GPIO_INTEN_IN(n) (1 << (n)) |
|||
|
|||
#define GPIO_INTEN_PORT (1 << 31) |
|||
|
|||
/* TODO: clean this up */ |
|||
|
|||
#define GPIO_TE_CONFIG_MODE_SHIFT 0 |
|||
#define GPIO_TE_CONFIG_MODE_MASK 3 |
|||
|
|||
#define GPIO_TE_CONFIG_PSEL_SHIFT 8 |
|||
#define GPIO_TE_CONFIG_PSEL_MASK 0x1f |
|||
|
|||
#define GPIO_TE_CONFIG_POLARITY_SHIFT 16 |
|||
#define GPIO_TE_CONFIG_POLARITY_MASK 3 |
|||
|
|||
#define GPIO_TE_CONFIG_OUTINIT (1 << 20) |
|||
|
|||
#define GPIO_TE_MODE_DISABLED 0 |
|||
#define GPIO_TE_MODE_EVENT 1 |
|||
#define GPIO_TE_MODE_TASK 3 |
|||
|
|||
#define GPIO_TE_POLARITY_NONE 0 |
|||
#define GPIO_TE_POLARITY_LO_TO_HI 1 |
|||
#define GPIO_TE_POLARITY_HI_TO_LO 2 |
|||
#define GPIO_TE_POLARITY_TOGGLE 3 |
|||
|
|||
#define GPIO_TE_OUTINIT_LOW 0 |
|||
#define GPIO_TE_OUTINIT_HIGH 1 |
|||
|
|||
/* GPIO number definitions (for convenience) */ |
|||
/** @defgroup gpio_pin_id GPIO Pin Identifiers
|
|||
@ingroup gpio_defines |
|||
|
|||
@{*/ |
|||
#define GPIO0 (1 << 0) |
|||
#define GPIO1 (1 << 1) |
|||
#define GPIO2 (1 << 2) |
|||
#define GPIO3 (1 << 3) |
|||
#define GPIO4 (1 << 4) |
|||
#define GPIO5 (1 << 5) |
|||
#define GPIO6 (1 << 6) |
|||
#define GPIO7 (1 << 7) |
|||
#define GPIO8 (1 << 8) |
|||
#define GPIO9 (1 << 9) |
|||
#define GPIO10 (1 << 10) |
|||
#define GPIO11 (1 << 11) |
|||
#define GPIO12 (1 << 12) |
|||
#define GPIO13 (1 << 13) |
|||
#define GPIO14 (1 << 14) |
|||
#define GPIO15 (1 << 15) |
|||
#define GPIO16 (1 << 16) |
|||
#define GPIO17 (1 << 17) |
|||
#define GPIO18 (1 << 18) |
|||
#define GPIO19 (1 << 19) |
|||
#define GPIO20 (1 << 20) |
|||
#define GPIO21 (1 << 21) |
|||
#define GPIO22 (1 << 22) |
|||
#define GPIO23 (1 << 23) |
|||
#define GPIO24 (1 << 24) |
|||
#define GPIO25 (1 << 25) |
|||
#define GPIO26 (1 << 26) |
|||
#define GPIO27 (1 << 27) |
|||
#define GPIO28 (1 << 28) |
|||
#define GPIO29 (1 << 29) |
|||
#define GPIO30 (1 << 30) |
|||
#define GPIO31 (1 << 31) |
|||
#define GPIO_ALL 0xffffffff |
|||
/**@}*/ |
|||
|
|||
/**@}*/ |
|||
BEGIN_DECLS |
|||
|
|||
void gpio_set(uint32_t gpioport, uint32_t gpios); |
|||
void gpio_clear(uint32_t gpioport, uint32_t gpios); |
|||
uint32_t gpio_get(uint32_t gpioport, uint32_t gpios); |
|||
void gpio_toggle(uint32_t gpioport, uint32_t gpios); |
|||
|
|||
void gpio_mode_setup(uint32_t gpioport, uint32_t mode, uint32_t pull_up_down, |
|||
uint32_t gpios); |
|||
|
|||
void gpio_set_options(uint32_t gpioport, uint32_t drive, uint32_t sense, |
|||
uint32_t gpios); |
|||
|
|||
void gpio_configure_task(uint8_t task_num, |
|||
uint8_t pin_num, uint8_t polarity, uint32_t init); |
|||
|
|||
void gpio_configure_event(uint8_t event_num, uint8_t pin_num, uint8_t polarity); |
|||
|
|||
void gpio_enable_interrupts(uint32_t mask); |
|||
void gpio_disable_interrupts(uint32_t mask); |
|||
void gpio_clear_interrupts(void); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,128 @@ |
|||
/** @addtogroup i2c_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/* I2C bus */ |
|||
/** @addtogroup i2c_block I2C instances
|
|||
* @{ |
|||
*/ |
|||
|
|||
#define I2C0 I2C0_BASE |
|||
#define I2C1 I2C1_BASE |
|||
|
|||
/**@}*/ |
|||
|
|||
/* Tasks */ |
|||
|
|||
#define I2C_TASK_STARTRX(i2c) MMIO32((i2c) + 0x000) |
|||
#define I2C_TASK_STARTTX(i2c) MMIO32((i2c) + 0x008) |
|||
#define I2C_TASK_STOP(i2c) MMIO32((i2c) + 0x014) |
|||
#define I2C_TASK_SUSPEND(i2c) MMIO32((i2c) + 0x01c) |
|||
#define I2C_TASK_RESUME(i2c) MMIO32((i2c) + 0x020) |
|||
/* Events */ |
|||
|
|||
#define I2C_EVENT_STOPPED(i2c) MMIO32((i2c) + 0x104) |
|||
#define I2C_EVENT_RXDREADY(i2c) MMIO32((i2c) + 0x108) |
|||
#define I2C_EVENT_TXDSENT(i2c) MMIO32((i2c) + 0x11c) |
|||
#define I2C_EVENT_ERROR(i2c) MMIO32((i2c) + 0x124) |
|||
#define I2C_EVENT_BB(i2c) MMIO32((i2c) + 0x138) |
|||
#define I2C_EVENT_SUSPENDED(i2c) MMIO32((i2c) + 0x148) |
|||
/* Registers */ |
|||
|
|||
#define I2C_SHORTS(i2c) MMIO32((i2c) + 0x200) |
|||
#define I2C_INTEN(i2c) MMIO32((i2c) + 0x300) |
|||
#define I2C_INTENSET(i2c) MMIO32((i2c) + 0x304) |
|||
#define I2C_INTENCLR(i2c) MMIO32((i2c) + 0x308) |
|||
#define I2C_ERRORSRC(i2c) MMIO32((i2c) + 0x4c4) |
|||
#define I2C_ENABLE(i2c) MMIO32((i2c) + 0x500) |
|||
#define I2C_PSELSCL(i2c) MMIO32((i2c) + 0x508) |
|||
#define I2C_PSELSDA(i2c) MMIO32((i2c) + 0x50c) |
|||
#define I2C_RXD(i2c) MMIO32((i2c) + 0x518) |
|||
#define I2C_TXD(i2c) MMIO32((i2c) + 0x51c) |
|||
#define I2C_FREQUENCY(i2c) MMIO32((i2c) + 0x524) |
|||
#define I2C_ADDRESS(i2c) MMIO32((i2c) + 0x588) |
|||
|
|||
/* Register Contents */ |
|||
|
|||
/** @addtogroup i2c_shorts I2C event -> task shortcuts
|
|||
* @{ |
|||
*/ |
|||
#define I2C_SHORTS_BB_SUSPEND (1 << 0) |
|||
#define I2C_SHORTS_BB_STOP (1 << 1) |
|||
|
|||
/**@}*/ |
|||
|
|||
/** @addtogroup i2c_interrupts I2C interrupts
|
|||
* @{ |
|||
*/ |
|||
#define I2C_INTEN_STOPPED (1 << 1) |
|||
#define I2C_INTEN_RXDREADY (1 << 2) |
|||
#define I2C_INTEN_TXDSENT (1 << 7) |
|||
#define I2C_INTEN_ERROR (1 << 9) |
|||
#define I2C_INTEN_BB (1 << 14) |
|||
|
|||
/**@}*/ |
|||
|
|||
#define I2C_ERRORSRC_OVERRUN (1 << 0) |
|||
#define I2C_ERRORSRC_ANACK (1 << 1) |
|||
#define I2C_ERRORSRC_DNACK (1 << 2) |
|||
|
|||
#define I2C_ENABLE_VALUE (5) |
|||
|
|||
#define I2C_FREQUENCY_100K (0x01980000) |
|||
#define I2C_FREQUENCY_250K (0x04000000) |
|||
#define I2C_FREQUENCY_400K (0x06680000) |
|||
|
|||
#define I2C_PSEL_OFF (0xffffffff) |
|||
|
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void i2c_enable(uint32_t i2c); |
|||
void i2c_disable(uint32_t i2c); |
|||
void i2c_start_tx(uint32_t i2c, uint8_t data); |
|||
void i2c_start_rx(uint32_t i2c); |
|||
void i2c_send_stop(uint32_t i2c); |
|||
void i2c_set_fast_mode(uint32_t i2c); |
|||
void i2c_set_standard_mode(uint32_t i2c); |
|||
void i2c_set_frequency(uint32_t i2c, uint32_t freq); |
|||
void i2c_send_data(uint32_t i2c, uint8_t data); |
|||
uint8_t i2c_get_data(uint32_t i2c); |
|||
void i2c_select_pins(uint32_t i2c, uint32_t scl_pin, uint32_t sda_pin); |
|||
void i2c_set_address(uint32_t i2c, uint8_t addr); |
|||
void i2c_resume(uint32_t i2c); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,97 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
|
|||
/* Factory Information Configuration Registers */ |
|||
#define FICR_BASE (0x10000000U) |
|||
|
|||
/* User Information Configuration Registers */ |
|||
#define UICR_BASE (0x10001000U) |
|||
|
|||
#define APB_BASE (0x40000000U) |
|||
#define AHB_BASE (0x50000000U) |
|||
#define PPB_BASE (0xE0000000U) |
|||
|
|||
|
|||
#define CLOCK_BASE (APB_BASE) |
|||
|
|||
/* Power Control */ |
|||
#define POWER_BASE (APB_BASE) |
|||
|
|||
/* 2.4 GHz Radio */ |
|||
#define RADIO_BASE (APB_BASE + 0x1000) |
|||
|
|||
#define UART0_BASE (APB_BASE + 0x2000) |
|||
|
|||
#define SPI0_BASE (APB_BASE + 0x3000) |
|||
#define TWI0_BASE (APB_BASE + 0x3000) |
|||
#define I2C0_BASE (APB_BASE + 0x3000) |
|||
|
|||
#define SPI1_BASE (APB_BASE + 0x4000) |
|||
#define SPIS1_BASE (APB_BASE + 0x4000) |
|||
#define TWI1_BASE (APB_BASE + 0x4000) |
|||
#define I2C1_BASE (APB_BASE + 0x4000) |
|||
|
|||
#define GPIOTE_BASE (APB_BASE + 0x6000) |
|||
|
|||
#define ADC_BASE (APB_BASE + 0x7000) |
|||
|
|||
#define TIMER0_BASE (APB_BASE + 0x8000) |
|||
#define TIMER1_BASE (APB_BASE + 0x9000) |
|||
#define TIMER2_BASE (APB_BASE + 0xA000) |
|||
|
|||
#define RTC0_BASE (APB_BASE + 0xB000) |
|||
|
|||
#define TEMP_BASE (APB_BASE + 0xC000) |
|||
|
|||
#define RNG_BASE (APB_BASE + 0xD000) |
|||
|
|||
/* AES ECB Mode Encryption */ |
|||
#define ECB_BASE (APB_BASE + 0xE000) |
|||
|
|||
/* Accelerated Address Resolver */ |
|||
#define AAR_BASE (APB_BASE + 0xF000) |
|||
|
|||
/* AES CCM Mode Encryption */ |
|||
#define CCM_BASE (APB_BASE + 0xF000) |
|||
|
|||
#define WDT_BASE (APB_BASE + 0x10000) |
|||
#define RTC1_BASE (APB_BASE + 0x11000) |
|||
#define QDEC_BASE (APB_BASE + 0x12000) |
|||
#define LPCOMP_BASE (APB_BASE + 0x13000) |
|||
#define SWI0_BASE (APB_BASE + 0x14000) |
|||
#define SWI1_BASE (APB_BASE + 0x15000) |
|||
#define SWI2_BASE (APB_BASE + 0x16000) |
|||
#define SWI3_BASE (APB_BASE + 0x17000) |
|||
#define SWI4_BASE (APB_BASE + 0x18000) |
|||
#define SWI5_BASE (APB_BASE + 0x19000) |
|||
|
|||
/* Non-Volatile Memory Controller */ |
|||
#define NVMC_BASE (APB_BASE + 0x1E000) |
|||
#define PPI_BASE (APB_BASE + 0x1F000) |
|||
#define RTC2_BASE (APB_BASE + 0x24000) |
|||
|
|||
#define GPIO_BASE (AHB_BASE) |
|||
|
|||
#define NVMC_BASE (APB_BASE + 0x1E000) |
|||
|
|||
@ -0,0 +1,148 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/cm3/nvic.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
|
|||
/* Common Peripheral Interface.
|
|||
* The implementation only applies to peripherals on APB |
|||
* bus, which for this part excludes only GPIO. |
|||
*/ |
|||
|
|||
/* Peripheral IDs
|
|||
* |
|||
* For peripherals on the APB bus there is a direct relationship between its ID |
|||
* and its base address. A peripheral with base address 0x40000000 is therefore |
|||
* assigned ID=0, and a peripheral with base address 0x40001000 is assigned |
|||
* ID=1. The peripheral with base address 0x4001F000 is assigned ID=31 |
|||
*/ |
|||
|
|||
#define PERIPH_CLOCK_ID (0x00) |
|||
#define PERIPH_POWER_ID (0x00) |
|||
#define PERIPH_MPU_ID (0x00) |
|||
#define PERIPH_RADIO_ID (0x01) |
|||
#define PERIPH_UART_ID (0x02) |
|||
#define PERIPH_SPI0_ID (0x03) |
|||
#define PERIPH_TWI0_ID (0x03) |
|||
#define PERIPH_I2C0_ID (0x03) |
|||
#define PERIPH_SPI1_ID (0x04) |
|||
#define PERIPH_SPIS1_ID (0x04) |
|||
#define PERIPH_TWI1_ID (0x04) |
|||
#define PERIPH_I2C1_ID (0x04) |
|||
#define PERIPH_GPIOTE_ID (0x06) |
|||
#define PERIPH_ADC_ID (0x07) |
|||
#define PERIPH_TIMER0_ID (0x08) |
|||
#define PERIPH_TIMER1_ID (0x09) |
|||
#define PERIPH_TIMER2_ID (0x0a) |
|||
#define PERIPH_RTC0_ID (0x0b) |
|||
#define PERIPH_TEMP_ID (0x0c) |
|||
#define PERIPH_RNG_ID (0x0d) |
|||
#define PERIPH_ECB_ID (0x0e) |
|||
#define PERIPH_AAR_ID (0x0f) |
|||
#define PERIPH_CCM_ID (0x0f) |
|||
#define PERIPH_WDT_ID (0x10) |
|||
#define PERIPH_RTC1_ID (0x11) |
|||
#define PERIPH_QDEC_ID (0x12) |
|||
#define PERIPH_LPCOMP_ID (0x13) |
|||
#define PERIPH_SWI0_ID (0x14) |
|||
#define PERIPH_SWI1_ID (0x15) |
|||
#define PERIPH_SWI2_ID (0x16) |
|||
#define PERIPH_SWI3_ID (0x17) |
|||
#define PERIPH_SWI4_ID (0x18) |
|||
#define PERIPH_SWI5_ID (0x19) |
|||
#define PERIPH_NVMC_ID (0x1e) |
|||
#define PERIPH_PPI_ID (0x1f) |
|||
|
|||
#define PERIPH_BASE_FROM_ID(periph_id) (ABP_BASE + 0x1000 * (periph_id)) |
|||
#define PERIPH_ID_FROM_BASE(base) (((base) - APB_BASE) >> 12) |
|||
#define PERIPH_BASE_FROM_REG(reg) (((uint32_t) &(reg)) & 0xfffff000) |
|||
|
|||
/*
|
|||
* Tasks are used to trigger actions in a peripheral, for example, to start a |
|||
* particular behavior. A peripheral can implement multiple tasks with each |
|||
* task having a separate register in that peripheral's task register group. |
|||
* |
|||
* A task is triggered when firmware writes a '1' to the task register or when |
|||
* the peripheral itself, or another peripheral, toggles the corresponding task |
|||
* signal. |
|||
*/ |
|||
|
|||
/** Starting address of all the tasks in the peripheral. */ |
|||
#define PERIPH_TASK_OFFSET (0x000) |
|||
|
|||
/*
|
|||
* Events are used to notify peripherals and the CPU about events that have |
|||
* happened, for example, a state change in a peripheral. A peripheral may |
|||
* generate multiple events with each event having a separate register in that |
|||
* peripheral’s event register group. An event is generated when the |
|||
* peripheral itself toggles the corresponding event signal, whereupon the |
|||
* event register is updated to reflect that the event has been generated. |
|||
*/ |
|||
|
|||
/** Starting address of all the events in the peripheral. */ |
|||
#define PERIPH_EVENT_OFFSET (0x100) |
|||
|
|||
#define PERIPH_TRIGGER_TASK(task) (task) = (1) |
|||
|
|||
/* All peripherals on the APB bus support interrupts. A peripheral only
|
|||
* occupies one interrupt, and the interrupt number follows the peripheral ID, |
|||
* for example, the peripheral with ID=4 is connected to interrupt number 4 in |
|||
* the Nested Vector Interrupt Controller (NVIC). |
|||
*/ |
|||
|
|||
#define PERIPH_ENABLE_IRQ(base) nvic_enable_irq(periph_id_from_base(base)) |
|||
#define PERIPH_DISABLE_IRQ(base) nvic_disable_irq(periph_id_from_base(base)) |
|||
|
|||
/* Common regisgers. Not all peripherals have these registers, but when they
|
|||
* are present, they are at this offset. |
|||
*/ |
|||
#define PERIPH_SHORTS_OFFSET (0x200) |
|||
#define PERIPH_INTEN_OFFSET (0x300) |
|||
#define PERIPH_INTENSET_OFFSET (0x304) |
|||
#define PERIPH_INTENCLR_OFFSET (0x308) |
|||
|
|||
#define _PERIPH_SHORTS(base) MMIO32((base) + PERIPH_SHORTS_OFFSET) |
|||
#define _PERIPH_INTEN(base) MMIO32((base) + PERIPH_INTEN_OFFSET) |
|||
#define _PERIPH_INTENSET(base) MMIO32((base) + PERIPH_INTENSET_OFFSET) |
|||
#define _PERIPH_INTENCLR(base) MMIO32((base) + PERIPH_INTENCLR_OFFSET) |
|||
|
|||
/* TODO: convert these to functions */ |
|||
#define periph_enable_shorts(base, shorts) periph_shorts(base) |= (shorts) |
|||
#define periph_disable_shorts(base, shorts) periph_shorts(base) &= (~(shorts)) |
|||
#define periph_clear_shorts(base) periph_shorts(base) = (0) |
|||
|
|||
#define periph_enable_interrupts(base, mask) periph_intenset(base) |= (mask) |
|||
#define periph_disable_interrupts(base, mask) periph_intenclr(base) = (mask) |
|||
#define periph_clear_interrupts(base) periph_intenclr(base) = (0xffffffff) |
|||
|
|||
/** Mark the signal as not connected to any pin. */ |
|||
#define GPIO_UNCONNECTED 0xFFFFFFFFU |
|||
|
|||
/** This is an approximation of log2. As used here, works correctly
|
|||
* only for single bit set, which should be the case when used to. |
|||
* convert above GPIOxy macros to pin numbers as needed for PSEL |
|||
* registers of peripherals. |
|||
*/ |
|||
#define __GPIO2PIN(x) (31 - __builtin_clz((uint32_t) (x))) |
|||
|
|||
|
|||
@ -0,0 +1,106 @@ |
|||
/** @addtogroup power_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/* Tasks */ |
|||
#define POWER_TASK_CONSTLAT MMIO32(POWER_BASE + 0x078) |
|||
#define POWER_TASK_LOWPWR MMIO32(POWER_BASE + 0x07C) |
|||
|
|||
/* Events */ |
|||
#define POWER_EVENT_POFWARN MMIO32(POWER_BASE + 0x108) |
|||
|
|||
/* Registers */ |
|||
#define POWER_INTENSET _PERIPH_INTENSET(POWER_BASE) |
|||
#define POWER_INTENCLR _PERIPH_INTENCLR(POWER_BASE) |
|||
#define POWER_RESETREAS MMIO32(POWER_BASE + 0x400) |
|||
#define POWER_RAMSTATUS MMIO32(POWER_BASE + 0x428) |
|||
#define POWER_SYSTEMOFF MMIO32(POWER_BASE + 0x500) |
|||
#define POWER_POFCON MMIO32(POWER_BASE + 0x510) |
|||
#define POWER_GPREGRET MMIO32(POWER_BASE + 0x51C) |
|||
#define POWER_RAMON MMIO32(POWER_BASE + 0x524) |
|||
#define POWER_RESET MMIO32(POWER_BASE + 0x544) |
|||
#define POWER_RAMONB MMIO32(POWER_BASE + 0x554) |
|||
#define POWER_DCDCEN MMIO32(POWER_BASE + 0x578) |
|||
|
|||
/* Register Contents */ |
|||
#define POWER_INTEN_POFWARN (1 << 2) |
|||
|
|||
#define POWER_RESETREAS_RESETPIN (1 << 0) |
|||
#define POWER_RESETREAS_DOG (1 << 1) |
|||
#define POWER_RESETREAS_SREQ (1 << 2) |
|||
#define POWER_RESETREAS_LOCKUP (1 << 3) |
|||
|
|||
#define POWER_RESETREAS_OFF (1 << 16) |
|||
#define POWER_RESETREAS_LPCOMP (1 << 17) |
|||
#define POWER_RESETREAS_DIF (1 << 18) |
|||
|
|||
#define POWER_RAMSTATUS_RAMBLOCK(n) (1 << (n)) |
|||
#define POWER_RAMSTATUS_RAMBLOCK0 POWER_RAMSTATUS_RAMBLOCK(0) |
|||
#define POWER_RAMSTATUS_RAMBLOCK1 POWER_RAMSTATUS_RAMBLOCK(1) |
|||
#define POWER_RAMSTATUS_RAMBLOCK2 POWER_RAMSTATUS_RAMBLOCK(2) |
|||
#define POWER_RAMSTATUS_RAMBLOCK3 POWER_RAMSTATUS_RAMBLOCK(3) |
|||
|
|||
#define POWER_SYSTEMOFF_SYSTEMOFF (1 << 0) |
|||
|
|||
#define POWER_POFCON_POF (1 << 0) |
|||
#define POWER_POFCON_THRESHOLD_SHIFT (1) |
|||
#define POWER_POFCON_THRESHOLD_MASK (3 << POWER_POFCON_THRESHOLD_SHIFT) |
|||
#define POWER_POFCON_THRESHOLD_MASKED(V) (((V) << POWER_POFCON_THRESHOLD_SHIFT) \ |
|||
& POWER_POFCON_THRESHOLD_MASK) |
|||
|
|||
#define POWER_RAMON_ONRAM0 (1 << 0) |
|||
#define POWER_RAMON_ONRAM1 (1 << 1) |
|||
|
|||
#define POWER_RAMON_OFFRAM0 (1 << 16) |
|||
#define POWER_RAMON_OFFRAM1 (1 << 17) |
|||
|
|||
#define POWER_RAMONB_ONRAM2 (1 << 2) |
|||
#define POWER_RAMONB_ONRAM3 (3 << 3) |
|||
|
|||
#define POWER_RAMONB_OFFRAM2 (1 << 16) |
|||
#define POWER_RAMONB_OFFRAM3 (3 << 37) |
|||
|
|||
#define POWER_RESET_RESET (1 << 0) |
|||
|
|||
#define POWER_DCDCEN_DCDCEN (1 << 0) |
|||
|
|||
|
|||
enum power_pofcon_threshold { |
|||
POWER_POFCON_THRESHOLD_V21, |
|||
POWER_POFCON_THRESHOLD_V23, |
|||
POWER_POFCON_THRESHOLD_V25, |
|||
POWER_POFCON_THRESHOLD_V27, |
|||
}; |
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,147 @@ |
|||
/** @addtogroup ppi_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
/**@{*/ |
|||
|
|||
/* Programmable Peripheral Interconnect */ |
|||
|
|||
/* Tasks */ |
|||
|
|||
#define PPI_TASK_CHG_EN(n) MMIO32(PPI_BASE + 0x8 * (n)) |
|||
#define PPI_TASK_CHG_DIS(n) MMIO32(PPI_BASE + 0x8 * (n) + 0x4) |
|||
|
|||
/* Registers */ |
|||
|
|||
#define PPI_CHEN MMIO32(PPI_BASE + 0x500) |
|||
#define PPI_CHENSET MMIO32(PPI_BASE + 0x504) |
|||
#define PPI_CHENCLR MMIO32(PPI_BASE + 0x508) |
|||
|
|||
/* Event End Point n = 0 .. 15 */ |
|||
#define PPI_CH_EEP(n) MMIO32(PPI_BASE + 0x510 + 0x8 * (n)) |
|||
/* Task End Point n = 0 .. 15 */ |
|||
#define PPI_CH_TEP(n) MMIO32(PPI_BASE + 0x514 + 0x8 * (n)) |
|||
|
|||
/* Channel Groups */ |
|||
#define PPI_CHG(n) MMIO32(PPI_BASE + 0x800 + 0x4 * (n)) |
|||
|
|||
#define PPI_CH(n) (1 << (n)) |
|||
/** @addtogroup PPI Channel identifiers
|
|||
* @{ |
|||
*/ |
|||
#define PPI_CH0 (1 << 0) |
|||
#define PPI_CH1 (1 << 1) |
|||
#define PPI_CH2 (1 << 2) |
|||
#define PPI_CH3 (1 << 3) |
|||
#define PPI_CH4 (1 << 4) |
|||
#define PPI_CH5 (1 << 5) |
|||
#define PPI_CH6 (1 << 6) |
|||
#define PPI_CH7 (1 << 7) |
|||
#define PPI_CH8 (1 << 8) |
|||
#define PPI_CH9 (1 << 9) |
|||
#define PPI_CH10 (1 << 10) |
|||
#define PPI_CH11 (1 << 11) |
|||
#define PPI_CH12 (1 << 12) |
|||
#define PPI_CH13 (1 << 13) |
|||
#define PPI_CH14 (1 << 14) |
|||
#define PPI_CH15 (1 << 15) |
|||
/* Channels 16-19 are reserved */ |
|||
#define PPI_CH20 (1 << 20) |
|||
#define PPI_CH21 (1 << 21) |
|||
#define PPI_CH22 (1 << 22) |
|||
#define PPI_CH23 (1 << 23) |
|||
#define PPI_CH24 (1 << 24) |
|||
#define PPI_CH25 (1 << 25) |
|||
#define PPI_CH26 (1 << 26) |
|||
#define PPI_CH27 (1 << 27) |
|||
#define PPI_CH28 (1 << 28) |
|||
#define PPI_CH29 (1 << 29) |
|||
#define PPI_CH30 (1 << 30) |
|||
#define PPI_CH31 (1 << 31) |
|||
|
|||
/**@}*/ |
|||
|
|||
#define PPI_MAX_PROG_CHANNEL (15) |
|||
|
|||
/* Preprogrammed channels */ |
|||
/* TIMER0->EVENTS_COMPARE0 -- RADIO->TASKS_TXEN */ |
|||
#define PPI_CH_TMR0CC0_RADIOTXEN PPI_CH20 |
|||
|
|||
/* TIMER0->EVENTS_COMPARE0 -- RADIO->TASKS_RXEN */ |
|||
#define PPI_CH_TMR0CC0_RADIORXEN PPI_CH21 |
|||
|
|||
/* TIMER0->EVENTS_COMPARE1 -- RADIO->TASKS_DISABLE */ |
|||
#define PPI_CH_TMR0CC1_RADIODIS PPI_CH22 |
|||
|
|||
/* RADIO->EVENTS_BCMATCH -- AAR->TASKS_START */ |
|||
#define PPI_CH_RADIOBCMATCH_AARSTART PPI_CH23 |
|||
|
|||
/* RADIO->EVENTS_READY -- CCM->TASKS_KSGEN */ |
|||
#define PPI_CH_RADIOREADY_CCMKSGEN PPI_CH24 |
|||
|
|||
/* RADIO->EVENTS_ADDRESS -- CCM->TASKS_CRYPT */ |
|||
#define PPI_CH_RADIOADDR_CCMCRYPT PPI_CH25 |
|||
|
|||
/* RADIO->EVENTS_ADDRESS -- TIMER0->TASKS_CAPTURE1 */ |
|||
#define PPI_CH_RADIOADDR_TMR0CAPT1 PPI_CH26 |
|||
|
|||
/* RADIO->EVENTS_END -- TIMER0->TASKS_CAPTURE2 */ |
|||
#define PPI_CH_RADIOEND_TMR0CAPT2 PPI_CH27 |
|||
|
|||
/* RTC0->EVENTS_COMPARE[0] -- RADIO->TASKS_TXEN */ |
|||
#define PPI_CH_RTC0CC0_RADIOTXEN PPI_CH28 |
|||
|
|||
/* RTC0->EVENTS_COMPARE[0] -- RADIO->TASKS_RXEN */ |
|||
#define PPI_CH_RTC0CC0_RADIORXEN PPI_CH29 |
|||
|
|||
/* RTC0->EVENTS_COMPARE[0] -- TIMER0->TASKS_CLEAR */ |
|||
#define PPI_CH_RTC0CC0_TMR0CLEAR PPI_CH30 |
|||
|
|||
/* RTC0->EVENTS_COMPARE[0] -- TIMER0->TASKS_START */ |
|||
#define PPI_CH_RTC0CC0_TMR0START PPI_CH31 |
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void ppi_configure_channel(uint8_t chan_num, uint32_t eep, uint32_t tep); |
|||
void ppi_enable_channels(uint32_t channels); |
|||
void ppi_disable_channels(uint32_t channels); |
|||
|
|||
void ppi_set_group(uint8_t group, uint32_t channels); |
|||
void ppi_enable_group(uint8_t group); |
|||
void ppi_disable_group(uint8_t group); |
|||
|
|||
/* Simpler API, that requires the client to store channel map. */ |
|||
uint8_t ppi_add_channel(uint32_t *chan_map, uint32_t eep, uint32_t tep, bool enable); |
|||
void ppi_remove_channel(uint32_t *chan_map, uint8_t chan_num); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,325 @@ |
|||
/** @addtogroup radio_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/* 2.4 GHz Radio */ |
|||
|
|||
/* Tasks */ |
|||
|
|||
#define RADIO_TASK_TXEN MMIO32(RADIO_BASE + 0x000) |
|||
#define RADIO_TASK_RXEN MMIO32(RADIO_BASE + 0x004) |
|||
#define RADIO_TASK_START MMIO32(RADIO_BASE + 0x008) |
|||
#define RADIO_TASK_STOP MMIO32(RADIO_BASE + 0x00C) |
|||
#define RADIO_TASK_DISABLE MMIO32(RADIO_BASE + 0x010) |
|||
#define RADIO_TASK_RSSISTART MMIO32(RADIO_BASE + 0x014) |
|||
#define RADIO_TASK_RSSISTOP MMIO32(RADIO_BASE + 0x018) |
|||
#define RADIO_TASK_BCSTART MMIO32(RADIO_BASE + 0x01C) |
|||
#define RADIO_TASK_BCSTOP MMIO32(RADIO_BASE + 0x020) |
|||
|
|||
/* Events */ |
|||
|
|||
#define RADIO_EVENT_READY MMIO32(RADIO_BASE + 0x100) |
|||
#define RADIO_EVENT_ADDRESS MMIO32(RADIO_BASE + 0x104) |
|||
#define RADIO_EVENT_PAYLOAD MMIO32(RADIO_BASE + 0x108) |
|||
#define RADIO_EVENT_END MMIO32(RADIO_BASE + 0x10C) |
|||
#define RADIO_EVENT_DISABLED MMIO32(RADIO_BASE + 0x110) |
|||
#define RADIO_EVENT_DEVMATCH MMIO32(RADIO_BASE + 0x114) |
|||
#define RADIO_EVENT_DEVMISS MMIO32(RADIO_BASE + 0x118) |
|||
#define RADIO_EVENT_RSSIEND MMIO32(RADIO_BASE + 0x11C) |
|||
|
|||
/* Registers */ |
|||
|
|||
#define RADIO_SHORTS _PERIPH_SHORTS(RADIO_BASE) |
|||
#define RADIO_INTENSET _PERIPH_INTENSET(RADIO_BASE) |
|||
#define RADIO_INTENCLR _PERIPH_INTENCLR(RADIO_BASE) |
|||
#define RADIO_CRCSTATUS MMIO32(RADIO_BASE + 0x400) |
|||
#define RADIO_RXMATCH MMIO32(RADIO_BASE + 0x408) |
|||
#define RADIO_RXCRC MMIO32(RADIO_BASE + 0x40C) |
|||
#define RADIO_DAI MMIO32(RADIO_BASE + 0x410) |
|||
#define RADIO_PACKETPTR MMIO32(RADIO_BASE + 0x504) |
|||
#define RADIO_FREQUENCY MMIO32(RADIO_BASE + 0x508) |
|||
#define RADIO_TXPOWER MMIO32(RADIO_BASE + 0x50C) |
|||
#define RADIO_MODE MMIO32(RADIO_BASE + 0x510) |
|||
#define RADIO_PCNF0 MMIO32(RADIO_BASE + 0x514) |
|||
#define RADIO_PCNF1 MMIO32(RADIO_BASE + 0x518) |
|||
#define RADIO_BASE0 MMIO32(RADIO_BASE + 0x51C) |
|||
#define RADIO_BASE1 MMIO32(RADIO_BASE + 0x520) |
|||
#define RADIO_PREFIX0 MMIO32(RADIO_BASE + 0x524) |
|||
#define RADIO_PREFIX1 MMIO32(RADIO_BASE + 0x528) |
|||
#define RADIO_TXADDRESS MMIO32(RADIO_BASE + 0x52C) |
|||
#define RADIO_RXADDRESSES MMIO32(RADIO_BASE + 0x530) |
|||
#define RADIO_CRCCNF MMIO32(RADIO_BASE + 0x534) |
|||
#define RADIO_CRCPOLY MMIO32(RADIO_BASE + 0x538) |
|||
#define RADIO_CRCINIT MMIO32(RADIO_BASE + 0x53C) |
|||
#define RADIO_TEST MMIO32(RADIO_BASE + 0x540) |
|||
#define RADIO_TIFS MMIO32(RADIO_BASE + 0x544) |
|||
#define RADIO_RSSISAMPLE MMIO32(RADIO_BASE + 0x548) |
|||
#define RADIO_STATE MMIO32(RADIO_BASE + 0x550) |
|||
#define RADIO_DATAWHITEIV MMIO32(RADIO_BASE + 0x554) |
|||
#define RADIO_BCC MMIO32(RADIO_BASE + 0x560) |
|||
|
|||
/* Device Address Base segment */ |
|||
#define RADIO_DAB(n) MMIO32(RADIO_BASE + 0x600 + 0x4 * (n)) |
|||
/* Device Address Prefix segment */ |
|||
#define RADIO_DAP(n) MMIO32(RADIO_BASE + 0x620 + 0x4 * (n)) |
|||
#define RADIO_DACNF MMIO32(RADIO_BASE + 0x640) |
|||
|
|||
/* Override Registers */ |
|||
#define RADIO_OVERRIDE(n) MMIO32(RADIO_BASE + 0x724 + 0x4 * (n)) |
|||
#define RADIO_POWER MMIO32(RADIO_BASE + 0xFFC) |
|||
|
|||
/* Register Details */ |
|||
|
|||
/** @addtogroup radio_shorts Radio event -> task shortcuts
|
|||
* @{ |
|||
*/ |
|||
#define RADIO_SHORTS_READY_START (1 << 0) |
|||
#define RADIO_SHORTS_END_DISABLE (1 << 1) |
|||
#define RADIO_SHORTS_DISABLED_TXEN (1 << 2) |
|||
#define RADIO_SHORTS_DISABLED_RXEN (1 << 3) |
|||
#define RADIO_SHORTS_ADDRESS_RSSISTART (1 << 4) |
|||
#define RADIO_SHORTS_END_START (1 << 5) |
|||
#define RADIO_SHORTS_ADDRESS_BCSTART (1 << 6) |
|||
#define RADIO_SHORTS_DISABLED_RSSISTOP (1 << 8) |
|||
|
|||
/**@}*/ |
|||
|
|||
/** @addtogroup radio_inten Radio interrupts
|
|||
* @{ |
|||
*/ |
|||
#define RADIO_INTEN_READY (1 << 0) |
|||
#define RADIO_INTEN_ADDRESS (1 << 1) |
|||
#define RADIO_INTEN_PAYLOAD (1 << 2) |
|||
#define RADIO_INTEN_END (1 << 3) |
|||
#define RADIO_INTEN_DISABLED (1 << 4) |
|||
#define RADIO_INTEN_DEVMATCH (1 << 5) |
|||
#define RADIO_INTEN_DEVMISS (1 << 6) |
|||
#define RADIO_INTEN_RSSIEND (1 << 7) |
|||
#define RADIO_INTEN_BCMATCH (1 << 10) |
|||
|
|||
/**@}*/ |
|||
|
|||
#define RADIO_PCNF0_LFLEN_SHIFT (0) |
|||
#define RADIO_PCNF0_LFLEN_MASK (0xf << RADIO_PCNF0_LFLEN_SHIFT) |
|||
#define RADIO_PCNF0_LFLEN_MASKED(V) (((V) << RADIO_PCNF0_LFLEN_SHIFT) \ |
|||
& RADIO_PCNF0_LFLEN_MASK) |
|||
|
|||
#define RADIO_PCNF0_S0LEN_SHIFT (8) |
|||
#define RADIO_PCNF0_S0LEN_MASK (1 << RADIO_PCNF0_S0LEN_SHIFT) |
|||
#define RADIO_PCNF0_S0LEN_MASKED(V) (((V) << RADIO_PCNF0_S0LEN_SHIFT) \ |
|||
& RADIO_PCNF0_S0LEN_MASK) |
|||
|
|||
#define RADIO_PCNF0_S1LEN_SHIFT (16) |
|||
#define RADIO_PCNF0_S1LEN_MASK (0xf << RADIO_PCNF0_S1LEN_SHIFT) |
|||
#define RADIO_PCNF0_S1LEN_MASKED(V) (((V) << RADIO_PCNF0_S1LEN_SHIFT) & \ |
|||
RADIO_PCNF0_S1LEN_MASK) |
|||
|
|||
#define RADIO_PCNF1_MAXLEN_SHIFT (0) |
|||
#define RADIO_PCNF1_MAXLEN_MASK (0xff << RADIO_PCNF1_MAXLEN_SHIFT) |
|||
#define RADIO_PCNF1_MAXLEN_MASKED(V) (((V) << RADIO_PCNF1_MAXLEN_SHIFT) & \ |
|||
RADIO_PCNF1_MAXLEN_MASK) |
|||
|
|||
#define RADIO_PCNF1_STATLEN_SHIFT (8) |
|||
#define RADIO_PCNF1_STATLEN_MASK (0xff << RADIO_PCNF1_STATLEN_SHIFT) |
|||
#define RADIO_PCNF1_STATLEN_MASKED(V) (((V) << RADIO_PCNF1_STATLEN_SHIFT) & \ |
|||
RADIO_PCNF1_STATLEN_MASK) |
|||
|
|||
#define RADIO_PCNF1_BALEN_SHIFT (16) |
|||
#define RADIO_PCNF1_BALEN_MASK (7 << RADIO_PCNF1_BALEN_SHIFT) |
|||
#define RADIO_PCNF1_BALEN_MASKED(V) (((V) << RADIO_PCNF1_BALEN_SHIFT) & \ |
|||
RADIO_PCNF1_BALEN_MASK) |
|||
|
|||
#define RADIO_PCNF1_ENDIAN_BIG (1 << 24) |
|||
#define RADIO_PCNF1_WHITEEN (1 << 25) |
|||
|
|||
#define RADIO_PREFIX0_AP0_SHIFT (0) |
|||
#define RADIO_PREFIX0_AP0_MASK (0xff << RADIO_PREFIX0_AP0_SHIFT) |
|||
#define RADIO_PREFIX0_AP0_MASKED(V) (((V) << RADIO_PREFIX0_AP0_SHIFT) & \ |
|||
RADIO_PREFIX0_AP0_MASK) |
|||
|
|||
#define RADIO_PREFIX0_AP1_SHIFT (8) |
|||
#define RADIO_PREFIX0_AP1_MASK (0xff << RADIO_PREFIX0_AP1_SHIFT) |
|||
#define RADIO_PREFIX0_AP1_MASKED(V) (((V) << RADIO_PREFIX0_AP1_SHIFT) & \ |
|||
RADIO_PREFIX0_AP1_MASK) |
|||
|
|||
#define RADIO_PREFIX0_AP2_SHIFT (16) |
|||
#define RADIO_PREFIX0_AP2_MASK (0xff << RADIO_PREFIX0_AP2_SHIFT) |
|||
#define RADIO_PREFIX0_AP2_MASKED(V) (((V) << RADIO_PREFIX0_AP2_SHIFT) & \ |
|||
RADIO_PREFIX0_AP2_MASK) |
|||
|
|||
#define RADIO_PREFIX0_AP3_SHIFT (24) |
|||
#define RADIO_PREFIX0_AP3_MASK (0xff << RADIO_PREFIX0_AP3_SHIFT) |
|||
#define RADIO_PREFIX0_AP3_MASKED(V) (((V) << RADIO_PREFIX0_AP3_SHIFT) & \ |
|||
RADIO_PREFIX0_AP3_MASK) |
|||
|
|||
#define RADIO_PREFIX1_AP4_SHIFT (0) |
|||
#define RADIO_PREFIX1_AP4_MASK (0xff << RADIO_PREFIX1_AP4_SHIFT) |
|||
#define RADIO_PREFIX1_AP4_MASKED(V) (((V) << RADIO_PREFIX1_AP4_SHIFT) & \ |
|||
RADIO_PREFIX1_AP4_MASK) |
|||
|
|||
#define RADIO_PREFIX1_AP5_SHIFT (8) |
|||
#define RADIO_PREFIX1_AP5_MASK (0xff << RADIO_PREFIX1_AP5_SHIFT) |
|||
#define RADIO_PREFIX1_AP5_MASKED(V) (((V) << RADIO_PREFIX1_AP5_SHIFT) & \ |
|||
RADIO_PREFIX1_AP5_MASK) |
|||
|
|||
#define RADIO_PREFIX1_AP6_SHIFT (16) |
|||
#define RADIO_PREFIX1_AP6_MASK (0xff << RADIO_PREFIX1_AP6_SHIFT) |
|||
#define RADIO_PREFIX1_AP6_MASKED(V) (((V) << RADIO_PREFIX1_AP6_SHIFT) & \ |
|||
RADIO_PREFIX1_AP6_MASK) |
|||
|
|||
#define RADIO_PREFIX1_AP7_SHIFT (24) |
|||
#define RADIO_PREFIX1_AP7_MASK (0xff << RADIO_PREFIX1_AP7_SHIFT) |
|||
#define RADIO_PREFIX1_AP7_MASKED(V) (((V) << RADIO_PREFIX1_AP7_SHIFT) & \ |
|||
RADIO_PREFIX1_AP7_MASK) |
|||
|
|||
#define RADIO_PREFIX_AP(n) ((n) < 4 ? RADIO_PREFIX0 : RADIO_PREFIX1) |
|||
#define RADIO_PREFIX_AP_SHIFT(n) (8 * (n & 3)) |
|||
#define RADIO_PREFIX_AP_MASK(n) (0xff << RADIO_PREFIX_AP_SHIFT(n)) |
|||
#define RADIO_PREFIX_AP_MASKED(n, V) (((V) << RADIO_PREFIX_AP_SHIFT(n)) & \ |
|||
RADIO_PREFIX_AP_MASK(n)) |
|||
|
|||
/* TODO: Get rid of this */ |
|||
#define RADIO_PREFIX_AP_SET(n, V) if ((n) < 4) {\ |
|||
RADIO_PREFIX0 = (V); } \ |
|||
else {\ |
|||
RADIO_PREFIX1 = (V); } |
|||
|
|||
#define RADIO_TXADDRESSES_ADDR0 (1 << 0) |
|||
#define RADIO_TXADDRESSES_ADDR1 (1 << 1) |
|||
#define RADIO_TXADDRESSES_ADDR2 (1 << 2) |
|||
#define RADIO_TXADDRESSES_ADDR3 (1 << 3) |
|||
#define RADIO_TXADDRESSES_ADDR4 (1 << 4) |
|||
#define RADIO_TXADDRESSES_ADDR5 (1 << 5) |
|||
#define RADIO_TXADDRESSES_ADDR6 (1 << 6) |
|||
#define RADIO_TXADDRESSES_ADDR7 (1 << 7) |
|||
#define RADIO_TXADDRESSES_ADDR(n) (1 << (n)) |
|||
|
|||
#define RADIO_CRCCNF_LEN_SHIFT (0) |
|||
#define RADIO_CRCCNF_LEN_MASK (3 << RADIO_CRCCNF_LEN_SHIFT) |
|||
#define RADIO_CRCCNF_LEN_MASKED(V) (((V) << RADIO_CRCCNF_LEN_SHIFT) & \ |
|||
RADIO_CRCCNF_LEN_MASK) |
|||
|
|||
#define RADIO_CRCCNF_SKIPADDR (1 << 8) |
|||
|
|||
#define RADIO_TEST_CONSTCARRIER (1 << 0) |
|||
#define RADIO_TEST_PLLLOCK (1 << 1) |
|||
|
|||
#define RADIO_DACNF_ENA(n) (1 << (n)) |
|||
#define RADIO_DACNF_ENA0 RADIO_DACNF_ENA(0) |
|||
#define RADIO_DACNF_ENA1 RADIO_DACNF_ENA(1) |
|||
#define RADIO_DACNF_ENA2 RADIO_DACNF_ENA(2) |
|||
#define RADIO_DACNF_ENA3 RADIO_DACNF_ENA(3) |
|||
#define RADIO_DACNF_ENA4 RADIO_DACNF_ENA(4) |
|||
#define RADIO_DACNF_ENA5 RADIO_DACNF_ENA(5) |
|||
#define RADIO_DACNF_ENA6 RADIO_DACNF_ENA(6) |
|||
#define RADIO_DACNF_ENA7 RADIO_DACNF_ENA(7) |
|||
|
|||
#define RADIO_DACNF_TXADD(n) (1 << ((n) + 8)) |
|||
#define RADIO_DACNF_TXADD0 RADIO_DACNF_TXADD(0) |
|||
#define RADIO_DACNF_TXADD1 RADIO_DACNF_TXADD(1) |
|||
#define RADIO_DACNF_TXADD2 RADIO_DACNF_TXADD(2) |
|||
#define RADIO_DACNF_TXADD3 RADIO_DACNF_TXADD(3) |
|||
#define RADIO_DACNF_TXADD4 RADIO_DACNF_TXADD(4) |
|||
#define RADIO_DACNF_TXADD5 RADIO_DACNF_TXADD(5) |
|||
#define RADIO_DACNF_TXADD6 RADIO_DACNF_TXADD(6) |
|||
#define RADIO_DACNF_TXADD7 RADIO_DACNF_TXADD(7) |
|||
|
|||
/* Override 4 register has special bit and the override value is masked. */ |
|||
#define RADIO_OVERRIDE4_ENABLE (1 << 31) |
|||
#define RADIO_OVERRIDE4_OVERRIDE_MASK (0x0fffffff) |
|||
|
|||
#define RADIO_POWER_ENABLED (1) |
|||
#define RADIO_POWER_DISABLED (0) |
|||
|
|||
/* Bluetooth Low Energy parameters */ |
|||
#define RADIO_BLE_TIFS (150) |
|||
#define RADIO_BLE_CRCLEN (3) |
|||
#define RADIO_BLE_CRCPOLY (0x65B) |
|||
#define RADIO_BLE_CRCINIT (0x555555) |
|||
|
|||
enum radio_txpower { |
|||
RADIO_TXPOWER_POS_4DBM = 0x4, |
|||
RADIO_TXPOWER_0DBM = 0, |
|||
RADIO_TXPOWER_NEG_4DBM = 0xFC, |
|||
RADIO_TXPOWER_NEG_8DBM = 0xF8, |
|||
RADIO_TXPOWER_NEG_12DBM = 0xF4, |
|||
RADIO_TXPOWER_NEG_16DBM = 0xF0, |
|||
RADIO_TXPOWER_NEG_20DBM = 0xEC, |
|||
RADIO_TXPOWER_NEG_30DBM = 0xD8, |
|||
}; |
|||
|
|||
enum radio_state { |
|||
RADIO_STATE_DISABLED, |
|||
RADIO_STATE_RXRU, |
|||
RADIO_STATE_RXIDLE, |
|||
RADIO_STATE_RX, |
|||
RADIO_STATE_RXDISABLE, |
|||
RADIO_STATE_TXRU = 9, |
|||
RADIO_STATE_TXIDLE, |
|||
RADIO_STATE_TX, |
|||
RADIO_STATE_TXDISABLE, |
|||
}; |
|||
|
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void radio_configure_ble(void); |
|||
void radio_disable_crc(void); |
|||
void radio_disable(void); |
|||
void radio_enable(void); |
|||
void radio_set_crclen(uint8_t crc_len); |
|||
void radio_set_lsbfirst(void); |
|||
void radio_set_msbfirst(void); |
|||
void radio_set_txpower(enum radio_txpower txpower); |
|||
void radio_disable_whitening(void); |
|||
void radio_enable_whitening(void); |
|||
void radio_configure_packet(uint8_t lf_len_bits, uint8_t s0_len_bytes, uint8_t s1_len_bits); |
|||
void radio_set_balen(uint8_t ba_len); |
|||
void radio_set_frequency(uint8_t freq); |
|||
void radio_set_datawhiteiv(uint8_t iv); |
|||
void radio_set_addr(uint8_t addr_index, uint32_t base, uint8_t prefix); |
|||
void radio_set_tx_address(uint8_t addr_index); |
|||
void radio_set_packet_ptr(uint8_t *packet_ptr); |
|||
void radio_enable_shorts(uint16_t shorts); |
|||
void radio_disable_shorts(uint16_t shorts); |
|||
void radio_clear_shorts(void); |
|||
void radio_enable_tx(void); |
|||
void radio_enable_rx(void); |
|||
void radio_set_maxlen(uint8_t maxlen); |
|||
void radio_set_crc_skipaddr(bool is_skip_addr); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
|
|||
@ -0,0 +1,85 @@ |
|||
/** @addtogroup rtc_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/* Only two RTCs on this device. */ |
|||
/** @addtogroup rtc_block RTC instances
|
|||
* @{ |
|||
*/ |
|||
#define RTC0 RTC0_BASE |
|||
#define RTC1 RTC1_BASE |
|||
|
|||
/**@}*/ |
|||
|
|||
/* Tasks */ |
|||
#define RTC_TASK_START(rtc) MMIO32((rtc) + 0x000) |
|||
#define RTC_TASK_STOP(rtc) MMIO32((rtc) + 0x004) |
|||
#define RTC_TASK_CLEAR(rtc) MMIO32((rtc) + 0x008) |
|||
#define RTC_TASK_TRIGOVRFLW(rtc) MMIO32((rtc) + 0x00C) |
|||
|
|||
/* Events */ |
|||
#define RTC_EVENT_TICK(rtc) MMIO32((rtc) + 0x100) |
|||
#define RTC_EVENT_OVRFLW(rtc) MMIO32((rtc) + 0x104) |
|||
#define RTC_EVENT_COMPARE(rtc, i) MMIO32((rtc) + 0x140 + 0x4 * (i)) |
|||
|
|||
/* Registers */ |
|||
#define RTC_INTEN(rtc) _PERIPH_INTEN(rtc) |
|||
#define RTC_INTENSET(rtc) _PERIPH_INTENSET(rtc) |
|||
#define RTC_INTENCLR(rtc) _PERIPH_INTENCLR(rtc) |
|||
#define RTC_EVTEN(rtc) MMIO32((rtc) + 0x340) |
|||
#define RTC_EVTENSET(rtc) MMIO32((rtc) + 0x344) |
|||
#define RTC_EVTENCLR(rtc) MMIO32((rtc) + 0x348) |
|||
#define RTC_COUNTER(rtc) MMIO32((rtc) + 0x504) |
|||
#define RTC_PRESCALER(rtc) MMIO32((rtc) + 0x508) |
|||
#define RTC_CC(rtc, i) MMIO32((rtc) + 0x540 + 0x4 * (i)) |
|||
|
|||
/* Register Contents */ |
|||
#define RTC_INTEN_TICK (1 << 0) |
|||
#define RTC_INTEN_OVRFLW (1 << 1) |
|||
#define RTC_INTEN_COMPARE(n) (1 << (16 + (n))) |
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void rtc_set_prescaler(uint32_t rtc, uint16_t presc); |
|||
uint32_t rtc_get_counter(uint32_t rtc); |
|||
void rtc_enable_events(uint32_t rtc, uint32_t mask); |
|||
void rtc_disable_events(uint32_t rtc, uint32_t mask); |
|||
void rtc_start(uint32_t rtc); |
|||
void rtc_stop(uint32_t rtc); |
|||
void rtc_clear(uint32_t rtc); |
|||
void rtc_set_compare(uint32_t rtc, uint8_t cmp, uint32_t value); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,120 @@ |
|||
/** @addtogroup timer_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
|
|||
/**@{*/ |
|||
/* Timer/Counter */ |
|||
/** @addtogroup timer_block
|
|||
* @{ |
|||
*/ |
|||
|
|||
#define TIMER0 TIMER0_BASE |
|||
#define TIMER1 TIMER1_BASE |
|||
#define TIMER2 TIMER2_BASE |
|||
|
|||
/**@}*/ |
|||
|
|||
/* Tasks */ |
|||
|
|||
#define TIMER_TASK_START(T) MMIO32((T) + 0x000) |
|||
#define TIMER_TASK_STOP(T) MMIO32((T) + 0x004) |
|||
#define TIMER_TASK_COUNT(T) MMIO32((T) + 0x008) |
|||
#define TIMER_TASK_CLEAR(T) MMIO32((T) + 0x00C) |
|||
#define TIMER_TASK_SHUTDOWN(T) MMIO32((T) + 0x010) |
|||
#define TIMER_TASK_CAPTURE(T, C) MMIO32((T) + 0x040 + (uint32_t)(0x4 * (C))) |
|||
|
|||
|
|||
|
|||
|
|||
/* Events */ |
|||
|
|||
#define TIMER_EVENT_COMPARE(T, C) MMIO32((T) + 0x140 + (uint32_t)(0x4 * (C))) |
|||
|
|||
/* Registers */ |
|||
|
|||
#define TIMER_SHORTS(T) _PERIPH_SHORTS(T) |
|||
#define TIMER_INTENSET(T) _PERIPH_INTENSET(T) |
|||
#define TIMER_INTENCLR(T) _PERIPH_INTENCLR(T) |
|||
#define TIMER_MODE(T) MMIO32((T) + 0x504) |
|||
#define TIMER_BITMODE(T) MMIO32((T) + 0x508) |
|||
#define TIMER_PRESCALER(T) MMIO32((T) + 0x510) |
|||
#define TIMER_PRESCALER_MASK (0xf) |
|||
|
|||
#define TIMER_CC(T, C) MMIO32((T) + 0x540 + 0x4 * (C)) |
|||
|
|||
|
|||
|
|||
|
|||
/* Register Contents */ |
|||
|
|||
/** @addtogroup timer_shorts Timer event -> task shortcuts
|
|||
* @{ |
|||
*/ |
|||
|
|||
#define TIMER_SHORTS_COMPARE_CLEAR(C) (1 << (C)) |
|||
#define TIMER_SHORTS_COMPARE_STOP(C) (1 << (8 + (C))) |
|||
/**@}*/ |
|||
|
|||
#define TIMER_INTEN_COMPARE(C) (1 << (16 + (C))) |
|||
|
|||
#define TIMER_MODE_SELECT (1 << 0) |
|||
|
|||
enum timer_mode { |
|||
TIMER_MODE_TIMER, |
|||
TIMER_MODE_COUNTER, |
|||
}; |
|||
|
|||
enum timer_bitmode { |
|||
TIMER_BITMODE_16BIT, |
|||
TIMER_BITMODE_08BIT, |
|||
TIMER_BITMODE_24BIT, |
|||
TIMER_BITMODE_32BIT, |
|||
}; |
|||
|
|||
/**@}*/ |
|||
|
|||
BEGIN_DECLS |
|||
|
|||
uint32_t timer_get_ticks(uint32_t timer); |
|||
void timer_set_mode(uint32_t timer, enum timer_mode mode); |
|||
void timer_set_bitmode(uint32_t timer, enum timer_bitmode bitmode); |
|||
void timer_start(uint32_t timer); |
|||
void timer_stop(uint32_t timer); |
|||
void timer_clear(uint32_t timer); |
|||
void timer_set_prescaler(uint32_t timer, uint8_t presc); |
|||
void timer_set_compare(uint32_t timer, uint8_t compare_num, uint32_t compare_val); |
|||
uint32_t timer_get_cc(uint32_t timer, uint8_t compare_num); |
|||
uint32_t timer_get_freq(uint32_t timer); |
|||
|
|||
END_DECLS |
|||
|
|||
|
|||
@ -0,0 +1,150 @@ |
|||
/** @addtogroup uart_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
|
|||
/**@{*/ |
|||
|
|||
/* Universal Asynchronous Receiver/Transmitter */ |
|||
|
|||
/** @addtogroup uart_block UART instance
|
|||
* @{ |
|||
*/ |
|||
#define UART0 UART0_BASE |
|||
|
|||
/**@}*/ |
|||
|
|||
/* Tasks */ |
|||
|
|||
#define UART_TASK_STARTRX(uart) MMIO32((uart) + 0x000) |
|||
#define UART_TASK_STOPRX(uart) MMIO32((uart) + 0x004) |
|||
#define UART_TASK_STARTTX(uart) MMIO32((uart) + 0x008) |
|||
#define UART_TASK_STOPTX(uart) MMIO32((uart) + 0x00C) |
|||
#define UART_TASK_SUSPEND(uart) MMIO32((uart) + 0x01C) |
|||
|
|||
/* Events */ |
|||
|
|||
#define UART_EVENT_CTS(uart) MMIO32((uart) + 0x100) |
|||
#define UART_EVENT_NCTS(uart) MMIO32((uart) + 0x104) |
|||
#define UART_EVENT_RXDRDY(uart) MMIO32((uart) + 0x108) |
|||
#define UART_EVENT_TXDRDY(uart) MMIO32((uart) + 0x11C) |
|||
#define UART_EVENT_ERROR(uart) MMIO32((uart) + 0x124) |
|||
#define UART_EVENT_RXTO(uart) MMIO32((uart) + 0x144) |
|||
|
|||
/* Registers */ |
|||
|
|||
#define UART_INTEN(uart) _PERIPH_INTEN(uart) |
|||
#define UART_INTENSET(uart) _PERIPH_INTENSET(uart) |
|||
#define UART_INTENCLR(uart) _PERIPH_INTENCLR(uart) |
|||
#define UART_ERRORSRC(uart) MMIO32((uart) + 0x480) |
|||
#define UART_ENABLE(uart) MMIO32((uart) + 0x500) |
|||
#define UART_PSELRTS(uart) MMIO32((uart) + 0x508) |
|||
#define UART_PSELTXD(uart) MMIO32((uart) + 0x50C) |
|||
#define UART_PSELCTS(uart) MMIO32((uart) + 0x510) |
|||
#define UART_PSELRXD(uart) MMIO32((uart) + 0x514) |
|||
#define UART_RXD(uart) MMIO32((uart) + 0x518) |
|||
#define UART_TXD(uart) MMIO32((uart) + 0x51C) |
|||
#define UART_BAUDRATE(uart) MMIO32((uart) + 0x524) |
|||
#define UART_CONFIG(uart) MMIO32((uart) + 0x56C) |
|||
|
|||
/* Register Contents */ |
|||
|
|||
/** @addtogroup uart_inten UART interrupt sources
|
|||
* @{ |
|||
*/ |
|||
#define UART_INTEN_CTS (1 << 0) |
|||
#define UART_INTEN_NCTS (1 << 1) |
|||
#define UART_INTEN_RXDRDY (1 << 2) |
|||
#define UART_INTEN_TXDRDY (1 << 7) |
|||
#define UART_INTEN_ERROR (1 << 9) |
|||
#define UART_INTEN_RXTO (1 << 17) |
|||
|
|||
/**@}*/ |
|||
|
|||
#define UART_ERRORSRC_OVERRUN (1 << 0) |
|||
#define UART_ERRORSRC_PARITY (1 << 1) |
|||
#define UART_ERRORSRC_FRAMING (1 << 2) |
|||
#define UART_ERRORSRC_BREAK (1 << 3) |
|||
|
|||
#define UART_ENABLE_ENABLED (4) |
|||
#define UART_ENABLE_DISABLED (0) |
|||
#define UART_CONFIG_HWFC (1) |
|||
#define UART_CONFIG_PARITY (7 << 1) |
|||
|
|||
#define UART_PSEL_OFF (0xff) |
|||
#define UART_MAX_PIN (31) |
|||
#define UART_PSEL_VAL(p) (p <= UART_MAX_PIN ? (uint32_t) p : 0xffffffff) |
|||
|
|||
|
|||
enum uart_baud { |
|||
UART_BAUD_1200 = 0x0004F000, |
|||
UART_BAUD_2400 = 0x0009D000, |
|||
UART_BAUD_4800 = 0x0013B000, |
|||
UART_BAUD_9600 = 0x00275000, |
|||
UART_BAUD_14400 = 0x003B0000, |
|||
UART_BAUD_19200 = 0x004EA000, |
|||
UART_BAUD_28800 = 0x0075F000, |
|||
UART_BAUD_38400 = 0x009D5000, |
|||
UART_BAUD_57600 = 0x00EBF000, |
|||
UART_BAUD_76800 = 0x013A9000, |
|||
UART_BAUD_115200 = 0x01D7E000, |
|||
UART_BAUD_230400 = 0x03AFB000, |
|||
UART_BAUD_250000 = 0x04000000, |
|||
UART_BAUD_460800 = 0x075F7000, |
|||
UART_BAUD_921600 = 0x0EBEDFA4, |
|||
UART_BAUD_1M = 0x10000000, |
|||
}; |
|||
|
|||
|
|||
BEGIN_DECLS |
|||
|
|||
void uart_enable(uint32_t uart); |
|||
void uart_disable(uint32_t uart); |
|||
void uart_configure(uint32_t uart, |
|||
uint32_t txd, uint32_t rxd, uint32_t rts, uint32_t cts, |
|||
enum uart_baud br, bool enable_parity); |
|||
void uart_set_baudrate(uint32_t uart, enum uart_baud br); |
|||
void uart_set_parity(uint32_t uart, int parity); |
|||
void uart_set_flow_control(uint32_t uart, int flow); |
|||
void uart_send_stop(uint32_t uart); |
|||
|
|||
void uart_start_tx(uint32_t uart); |
|||
void uart_stop_tx(uint32_t uart); |
|||
void uart_send(uint32_t uart, uint16_t byte); |
|||
void uart_start_rx(uint32_t uart); |
|||
void uart_stop_rx(uint32_t uart); |
|||
uint16_t uart_recv(uint32_t uart); |
|||
void uart_set_pins(uint32_t uart, uint32_t rx, uint32_t tx, uint32_t cts, uint32_t rts); |
|||
|
|||
END_DECLS |
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,53 @@ |
|||
/** @addtogroup uicr_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
|
|||
/**@{*/ |
|||
/* User Information Configuration Register */ |
|||
|
|||
#define UICR_CLENR0 MMIO32(UICR_BASE + 0x000) |
|||
#define UICR_RBPCONF MMIO32(UICR_BASE + 0x004) |
|||
#define UICR_XTALFREQ MMIO32(UICR_BASE + 0x008) |
|||
#define UICR_FWID MMIO32(UICR_BASE + 0x010) |
|||
#define UICR_BOOTLOADERADDR MMIO32(UICR_BASE + 0x014) |
|||
|
|||
/* Reserved for Nordic firmware design, n = 1..14 */ |
|||
#define UICR_NRFFW(n) MMIO32(UICR_BASE + 0x014 + 0x4 * (n)) |
|||
|
|||
/* Reserved for Nordic hardware design, n = 0..11 */ |
|||
#define UICR_NRFHW(n) MMIO32(UICR_BASE + 0x050 + 0x4 * (n)) |
|||
|
|||
/* Reserved for customer n = 0..31 */ |
|||
#define UICR_CUSTOMER(n) MMIO32(UICR_BASE + 0x080 + 0x4 * (n)) |
|||
|
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,38 @@ |
|||
/** @addtogroup ficr_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/ficr.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/ficr.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,40 @@ |
|||
/** @addtogroup gpio_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#include <libopencm3/cm3/common.h> |
|||
#include <libopencm3/nrf/memorymap.h> |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/gpio.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/gpio.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup i2c_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/i2c.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/i2c.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,30 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/memorymap.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/memorymap.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,30 @@ |
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/periph.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/periph.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup power_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/power.h> |
|||
#elif defined(NRF51) |
|||
# include <libopencm3/nrf/52/power.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup ppi_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/ppi.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/ppi.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup radio_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/radio.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/radio.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup rtc_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/rtc.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/rtc.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup timer_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/timer.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/timer.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup uart_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/uart.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/uart.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
/** @addtogroup uicr_defines
|
|||
* |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
**/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#pragma once |
|||
|
|||
#if defined(NRF51) |
|||
# include <libopencm3/nrf/51/uicr.h> |
|||
#elif defined(NRF52) |
|||
# include <libopencm3/nrf/52/uicr.h> |
|||
#else |
|||
# error "Processor family not defined." |
|||
#endif |
|||
|
|||
@ -0,0 +1,50 @@ |
|||
##
|
|||
## This file is part of the libopencm3 project.
|
|||
## Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org>
|
|||
## Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk>
|
|||
##
|
|||
## This library is free software: you can redistribute it and/or modify
|
|||
## it under the terms of the GNU Lesser General Public License as published by
|
|||
## the Free Software Foundation, either version 3 of the License, or
|
|||
## (at your option) any later version.
|
|||
##
|
|||
## This library is distributed in the hope that it will be useful,
|
|||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|||
## GNU Lesser General Public License for more details.
|
|||
##
|
|||
## You should have received a copy of the GNU Lesser General Public License
|
|||
## along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
##
|
|||
|
|||
LIBNAME = libopencm3_nrf51 |
|||
SRCLIBDIR ?= ../.. |
|||
|
|||
CC = $(PREFIX)gcc |
|||
AR = $(PREFIX)ar |
|||
|
|||
FP_FLAGS ?= -msoft-float |
|||
|
|||
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
|
|||
-mcpu=cortex-m0 -mthumb $(FP_FLAGS) \
|
|||
-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
|
|||
-ffunction-sections -fdata-sections -MD -DNRF51 |
|||
|
|||
TGT_CFLAGS += $(DEBUG_FLAGS) |
|||
TGT_CFLAGS += $(STANDARD_FLAGS) |
|||
# ARFLAGS = rcsv
|
|||
ARFLAGS = rcs |
|||
|
|||
OBJS += clock_common.o clock.o |
|||
OBJS += gpio.o |
|||
OBJS += i2c.o |
|||
OBJS += ppi.o |
|||
OBJS += rtc.o |
|||
OBJS += radio_common.o ./radio.o |
|||
OBJS += timer.o |
|||
OBJS += uart.o |
|||
|
|||
VPATH += ../../cm3:../common |
|||
|
|||
include ../../Makefile.include |
|||
|
|||
@ -0,0 +1,45 @@ |
|||
/** @addtogroup clock_file CLOCK peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the NRF51 Clock Controller </b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Roel Postelmans |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the unicore-mx project. |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/clock.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief Select nominal frequency of external crystal for HFCLK.
|
|||
* |
|||
* @details This register has to match the actual crystal used in design to |
|||
* enable correct behaviour. |
|||
* |
|||
* @param[in] freq enum clock_xtal_freq |
|||
* */ |
|||
void clock_set_xtal_freq(enum clock_xtal_freq freq) |
|||
{ |
|||
CLOCK_XTALFREQ = freq; |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,66 @@ |
|||
/** @addtogroup radio_file RADIO peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the NRF51 2.4 GHz Radio </b> |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the unicore-mx project. |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/ficr.h> |
|||
#include <libopencm3/nrf/radio.h> |
|||
|
|||
/**@{*/ |
|||
|
|||
/** @brief Set radio mode.
|
|||
* |
|||
* @details The function also performs all required overrides for BLE and NRF mode. |
|||
* |
|||
* @param[in] mode the new mode. |
|||
* */ |
|||
void radio_set_mode(enum radio_mode mode) |
|||
{ |
|||
/* This is alias to memory register, thus volatile */ |
|||
volatile uint32_t *override_pos = 0; |
|||
if ((RADIO_MODE_BLE_1MBIT == mode) |
|||
&& (FICR_OVERRIDEEN & ~FICR_OVERRIDEEN_BLE_1MBIT)) { |
|||
/* Need to use Override */ |
|||
override_pos = &FICR_BLE_1MBIT0; |
|||
} else if ((RADIO_MODE_NRF_1MBIT == mode) |
|||
&& (FICR_OVERRIDEEN & ~FICR_OVERRIDEEN_NRF_1MBIT)) { |
|||
override_pos = &FICR_NRF_1MBIT0; |
|||
} |
|||
|
|||
if (override_pos) { |
|||
uint8_t i; |
|||
for (i = 0; i <= 4; ++i, ++override_pos) { |
|||
RADIO_OVERRIDE(i) = *override_pos; |
|||
} |
|||
|
|||
RADIO_OVERRIDE(4) |= RADIO_OVERRIDE4_ENABLE; |
|||
} else { |
|||
RADIO_OVERRIDE(4) &= ~RADIO_OVERRIDE4_ENABLE; |
|||
} |
|||
|
|||
RADIO_MODE = mode; |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,50 @@ |
|||
##
|
|||
## This file is part of the libopencm3 project.
|
|||
##
|
|||
## Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org>
|
|||
## Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk>
|
|||
##
|
|||
## This library is free software: you can redistribute it and/or modify
|
|||
## it under the terms of the GNU Lesser General Public License as published by
|
|||
## the Free Software Foundation, either version 3 of the License, or
|
|||
## (at your option) any later version.
|
|||
##
|
|||
## This library is distributed in the hope that it will be useful,
|
|||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|||
## GNU Lesser General Public License for more details.
|
|||
##
|
|||
## You should have received a copy of the GNU Lesser General Public License
|
|||
## along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
##
|
|||
|
|||
LIBNAME = libopencm3_nrf52 |
|||
SRCLIBDIR ?= ../.. |
|||
|
|||
CC = $(PREFIX)gcc |
|||
AR = $(PREFIX)ar |
|||
|
|||
FP_FLAGS ?= -mfloat-abi=hard -mfpu=fpv4-sp-d16 |
|||
|
|||
TGT_CFLAGS = -Os -Wall -Wextra -I../../../include -fno-common \
|
|||
-mcpu=cortex-m4 -mthumb $(FP_FLAGS) \
|
|||
-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
|
|||
-ffunction-sections -fdata-sections -MD -DNRF52 |
|||
TGT_CFLAGS += $(DEBUG_FLAGS) |
|||
TGT_CFLAGS += $(STANDARD_FLAGS) |
|||
# ARFLAGS = rcsv
|
|||
ARFLAGS = rcs |
|||
|
|||
OBJS += clock_common.o |
|||
OBJS += gpio.o |
|||
OBJS += i2c.o |
|||
OBJS += ppi.o |
|||
OBJS += radio_common.o |
|||
OBJS += rtc.o |
|||
OBJS += timer.o |
|||
OBJS += uart.o |
|||
|
|||
VPATH += ../../cm3:../common |
|||
|
|||
include ../../Makefile.include |
|||
|
|||
@ -0,0 +1,83 @@ |
|||
/** @addtogroup clock_file CLOCK peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the Clock Controller</b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 Maxim Sloyko <maxims@google.com> |
|||
* @author @htmlonly © @endhtmlonly 2021 Eduard Drusa <ventyl86 at netkosice dot sk> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/clock.h> |
|||
#include <libopencm3/nrf/periph.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief Start Low Frequency Clock
|
|||
* |
|||
* @param[in] wait bool: If true, will busy wait for the clock to start. |
|||
*/ |
|||
void clock_start_lfclk(bool wait) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(CLOCK_TASK_LFCLKSTART); |
|||
if (wait) { |
|||
while (!(CLOCK_LFCLKSTAT & CLOCK_LFCLKSTAT_STATE)); |
|||
} |
|||
} |
|||
|
|||
/** @brief Stop Low Frequency Clock */ |
|||
void clock_stop_lfclk() |
|||
{ |
|||
PERIPH_TRIGGER_TASK(CLOCK_TASK_LFCLKSTOP); |
|||
} |
|||
|
|||
/** @brief Start High Frequency Crystal Oscillator.
|
|||
* |
|||
* @details Oscillator needs to be running for the radio to work. |
|||
* |
|||
* @param[in] wait bool If true, will busy wait for the clock to start. |
|||
*/ |
|||
void clock_start_hfclk(bool wait) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(CLOCK_TASK_HFCLKSTART); |
|||
if (wait) { |
|||
while (!(CLOCK_HFCLKSTAT & CLOCK_HFCLKSTAT_STATE)); |
|||
} |
|||
} |
|||
|
|||
/** @brief Stop High Frequency Crystal Oscillator */ |
|||
void clock_stop_hfclk() |
|||
{ |
|||
PERIPH_TRIGGER_TASK(CLOCK_TASK_HFCLKSTOP); |
|||
} |
|||
|
|||
/** @brief Low Frequency Clock Source.
|
|||
* |
|||
* @param[in] lfclk_src enum clock_lfclk_src |
|||
*/ |
|||
void clock_set_lfclk_src(enum clock_lfclk_src lfclk_src) |
|||
{ |
|||
CLOCK_LFCLKSRC = lfclk_src; |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,208 @@ |
|||
/** @addtogroup gpio_file GPIO peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the I/O Controller</b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
/** @{ */ |
|||
|
|||
#include <libopencm3/nrf/gpio.h> |
|||
|
|||
/** @brief Atomic set output
|
|||
* |
|||
* @param[in] gpioport Port identifier @ref gpio_port_id |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
*/ |
|||
void gpio_set(uint32_t gpioport, uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
GPIO_OUTSET = gpios; |
|||
} |
|||
|
|||
/** @brief Atomic clear output
|
|||
* |
|||
* @param[in] gpioport Port identifier @ref gpio_port_id |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
*/ |
|||
void gpio_clear(uint32_t gpioport, uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
GPIO_OUTCLR = gpios; |
|||
} |
|||
|
|||
/** @brief Toggle output
|
|||
* |
|||
* @param[in] gpioport Port identifier @ref gpio_port_id |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
*/ |
|||
void gpio_toggle(uint32_t gpioport, uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
uint32_t reg_val = GPIO_OUT; |
|||
GPIO_OUTCLR = reg_val & gpios; |
|||
GPIO_OUTSET = (~reg_val) & gpios; |
|||
} |
|||
|
|||
/** @brief Read GPIO values
|
|||
* |
|||
* @param[in] gpioport Port identifier @ref gpio_port_id |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
*/ |
|||
uint32_t gpio_get(uint32_t gpioport, uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
return GPIO_IN & gpios; |
|||
} |
|||
|
|||
/** @brief Set GPIO Pin Mode
|
|||
* |
|||
* Sets the mode (input/output) and configuration (analog/digitial and |
|||
* open drain/push pull), for a set of GPIO pins on a given GPIO port. |
|||
* |
|||
* @param[in] gpioport Port identifier @ref gpio_port_id |
|||
* @param[in] mode Pin mode @ref gpio_mode |
|||
* @param[in] pull_up_down Pull up / pull down configuration @ref gpio_pupd |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
* If multiple pins are to be set, use bitwise OR '|' to separate |
|||
* them. |
|||
*/ |
|||
void gpio_mode_setup(uint32_t gpioport, uint32_t mode, uint32_t pull_up_down, |
|||
uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
|
|||
uint8_t i = 0; |
|||
while (gpios) { |
|||
if (gpios & 1) { |
|||
GPIO_PIN_CNF(i) = ( |
|||
GPIO_PIN_CNF(i) & |
|||
~((GPIO_CNF_MODE_MASK << GPIO_CNF_MODE_SHIFT) |
|||
| (GPIO_CNF_PUPD_MASK << GPIO_CNF_PUPD_SHIFT) |
|||
) |
|||
) | (mode << GPIO_CNF_MODE_SHIFT) |
|||
| (pull_up_down << GPIO_CNF_PUPD_SHIFT); |
|||
} |
|||
++i; |
|||
gpios >>= 1; |
|||
} |
|||
} |
|||
|
|||
/** Configure GPIO pin input and output specifics.
|
|||
* |
|||
* Configure drive strength and input sensing for given GPIO port. |
|||
* @param [in] gpioport GPIO port identifier, see @ref gpio_port_id |
|||
* @param [in] drive Drive schema used to drive pin, see @ref gpio_drive |
|||
* @param [in] sense Pin sensing mechanism, see @ref gpio_sense |
|||
* @param[in] gpios Pin identifiers @ref gpio_pin_id |
|||
* If multiple pins are to be set, use bitwise OR '|' to separate |
|||
* them. |
|||
*/ |
|||
void gpio_set_options(uint32_t gpioport, uint32_t drive, uint32_t sense, |
|||
uint32_t gpios) |
|||
{ |
|||
(void) gpioport; |
|||
|
|||
uint8_t i = 0; |
|||
while (gpios) { |
|||
if (gpios & 1) { |
|||
GPIO_PIN_CNF(i) = (GPIO_PIN_CNF(i) & |
|||
~((GPIO_CNF_DRIVE_MASK << GPIO_CNF_DRIVE_SHIFT) |
|||
| (GPIO_CNF_SENSE_MASK << GPIO_CNF_SENSE_SHIFT) |
|||
) |
|||
) | (drive << GPIO_CNF_DRIVE_SHIFT) |
|||
| (sense << GPIO_CNF_SENSE_SHIFT); |
|||
} |
|||
++i; |
|||
gpios >>= 1; |
|||
} |
|||
|
|||
} |
|||
|
|||
|
|||
/** @brief Configure Task in GPIO TE Module
|
|||
* |
|||
* @param[in] task_num uint8_t Task number (0-3) |
|||
* @param[in] pin_num uint8_t GPIO Pin number (0-31) |
|||
* @param[in] polarity uint8_t polarity Operation to perform when task is triggered. |
|||
* @param[in] init uint8_t Initial state of the pin, non-zero means initially active, |
|||
* zero means initially inactive |
|||
*/ |
|||
void gpio_configure_task(uint8_t task_num, |
|||
uint8_t pin_num, uint8_t polarity, uint32_t init) |
|||
{ |
|||
/* any non-zero value means, that pin is active */ |
|||
if (init) { |
|||
init = GPIO_TE_CONFIG_OUTINIT; |
|||
} |
|||
|
|||
GPIO_TE_CONFIG(task_num) = (GPIO_TE_MODE_TASK << GPIO_TE_CONFIG_MODE_SHIFT) |
|||
| (pin_num << GPIO_TE_CONFIG_PSEL_SHIFT) |
|||
| (polarity << GPIO_TE_CONFIG_POLARITY_SHIFT) |
|||
| init; |
|||
} |
|||
|
|||
/** @brief Configure Event in GPIO TE Module
|
|||
* |
|||
* @param[in] event_num Event number (0-3) |
|||
* @param[in] pin_num GPIO Pin number (0-31) |
|||
* @param[in] polarity Operation to perform when task is triggered. |
|||
*/ |
|||
void gpio_configure_event(uint8_t event_num, uint8_t pin_num, uint8_t polarity) |
|||
{ |
|||
GPIO_TE_CONFIG(event_num) = (GPIO_TE_MODE_EVENT << GPIO_TE_CONFIG_MODE_SHIFT) |
|||
| (pin_num << GPIO_TE_CONFIG_PSEL_SHIFT) |
|||
| (polarity << GPIO_TE_CONFIG_POLARITY_SHIFT); |
|||
} |
|||
|
|||
/** @brief Enable GPIO interrupts
|
|||
* |
|||
* @param[in] mask interrupts to enable. |
|||
*/ |
|||
void gpio_enable_interrupts(uint32_t mask) |
|||
{ |
|||
GPIO_INTENSET = mask; |
|||
} |
|||
|
|||
/** @brief Disable GPIO interrupts
|
|||
* |
|||
* @param[in] mask interrupts to disable. |
|||
*/ |
|||
void gpio_disable_interrupts(uint32_t mask) |
|||
{ |
|||
GPIO_INTENCLR = mask; |
|||
} |
|||
|
|||
/** @brief Disable all GPIO interrupts
|
|||
* |
|||
*/ |
|||
void gpio_clear_interrupts(void) |
|||
{ |
|||
GPIO_INTENCLR = 0xffffffff; |
|||
} |
|||
|
|||
/** @} */ |
|||
@ -0,0 +1,184 @@ |
|||
/** @addtogroup i2c_file I2C peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the I2C Controller</b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/i2c.h> |
|||
|
|||
/**@{*/ |
|||
|
|||
/** @brief Enable I2C peripheral
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base |
|||
*/ |
|||
void i2c_enable(uint32_t i2c) |
|||
{ |
|||
I2C_ENABLE(i2c) = I2C_ENABLE_VALUE; |
|||
} |
|||
|
|||
/** @brief Disable I2C peripheral
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base |
|||
*/ |
|||
void i2c_disable(uint32_t i2c) |
|||
{ |
|||
I2C_ENABLE(i2c) = 0; |
|||
} |
|||
|
|||
/** @brief Start I2C transmission.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
* @param[in] data uint8_t the first byte to send. |
|||
*/ |
|||
void i2c_start_tx(uint32_t i2c, uint8_t data) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(I2C_TASK_STARTTX(i2c)); |
|||
I2C_TXD(i2c) = data; |
|||
} |
|||
|
|||
/** @brief Start I2C reception.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
*/ |
|||
void i2c_start_rx(uint32_t i2c) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(I2C_TASK_STARTRX(i2c)); |
|||
} |
|||
|
|||
/** @brief Signal stop on I2C line.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
*/ |
|||
void i2c_send_stop(uint32_t i2c) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(I2C_TASK_STOP(i2c)); |
|||
} |
|||
|
|||
/** @brief Select Fast (400kHz) mode.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
*/ |
|||
void i2c_set_fast_mode(uint32_t i2c) |
|||
{ |
|||
I2C_FREQUENCY(i2c) = I2C_FREQUENCY_400K; |
|||
} |
|||
|
|||
/** @brief Select Standard (100kHz) mode.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
*/ |
|||
void i2c_set_standard_mode(uint32_t i2c) |
|||
{ |
|||
I2C_FREQUENCY(i2c) = I2C_FREQUENCY_100K; |
|||
} |
|||
|
|||
/** @brief Set I2C frequency.
|
|||
* |
|||
* In addition to Standard (100kHz) and Fast (400kHz) modes |
|||
* this peripheral also supports 250kHz mode. |
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
* @param[in] freq uint32_t frequency constant. See defines for details |
|||
* and note that this is not actually a frequency in Hz or kHz. |
|||
*/ |
|||
void i2c_set_frequency(uint32_t i2c, uint32_t freq) |
|||
{ |
|||
I2C_FREQUENCY(i2c) = freq; |
|||
} |
|||
|
|||
/** @brief Write Data to TXD register to be sent.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
* @param[in] data uint8_t byte to send next. |
|||
*/ |
|||
void i2c_send_data(uint32_t i2c, uint8_t data) |
|||
{ |
|||
I2C_TXD(i2c) = data; |
|||
} |
|||
|
|||
/** @brief Read Data from RXD register.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
* @returns uint8_t data from RXD register. |
|||
*/ |
|||
uint8_t i2c_get_data(uint32_t i2c) |
|||
{ |
|||
return (uint8_t)I2C_RXD(i2c); |
|||
} |
|||
|
|||
/** @brief Select GPIO pins to be used by this peripheral.
|
|||
* |
|||
* This needs to be configured when no transaction is in progress. |
|||
* |
|||
* @param[in] i2c i2c peripheral base. |
|||
* @param[in] scl_pin SCL pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
* @param[in] sda_pin SDA pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
|
|||
*/ |
|||
void i2c_select_pins(uint32_t i2c, uint32_t scl_pin, uint32_t sda_pin) |
|||
{ |
|||
if (scl_pin != GPIO_UNCONNECTED) { |
|||
I2C_PSELSCL(i2c) = __GPIO2PIN(scl_pin); |
|||
} else { |
|||
I2C_PSELSCL(i2c) = scl_pin; |
|||
} |
|||
|
|||
if (sda_pin != GPIO_UNCONNECTED) { |
|||
I2C_PSELSDA(i2c) = __GPIO2PIN(sda_pin); |
|||
} else { |
|||
I2C_PSELSDA(i2c) = sda_pin; |
|||
} |
|||
} |
|||
|
|||
/** @brief Set 7bit I2C address of the device you wish to communicate with.
|
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
* @param[in] addr uint8_t device address (7bit). |
|||
*/ |
|||
void i2c_set_address(uint32_t i2c, uint8_t addr) |
|||
{ |
|||
I2C_ADDRESS(i2c) = addr; |
|||
} |
|||
|
|||
/** @brief Resume I2C transaction.
|
|||
* |
|||
* This function is unusual, but required to implement |
|||
* i2c exchange with this peripheral. |
|||
* |
|||
* @param[in] i2c uint32_t i2c peripheral base. |
|||
*/ |
|||
void i2c_resume(uint32_t i2c) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(I2C_TASK_RESUME(i2c)); |
|||
} |
|||
|
|||
|
|||
/**@}*/ |
|||
@ -0,0 +1,145 @@ |
|||
/** @addtogroup ppi_file PPI peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the Programmable Peripheral Interconnect </b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <stdint.h> |
|||
|
|||
#include <libopencm3/nrf/ppi.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief Configure PPI Channel.
|
|||
* |
|||
* @param[in] chan_num uint8_t Channel number (0-15). |
|||
* @param[in] eep uint32_t Event endpoint. Memory address of the event endpoint. |
|||
* @param[in] tep uint32_t Task endpoint. Memory address of the task endpoint. |
|||
*/ |
|||
void ppi_configure_channel(uint8_t chan_num, uint32_t eep, uint32_t tep) |
|||
{ |
|||
PPI_CH_EEP(chan_num) = eep; |
|||
PPI_CH_TEP(chan_num) = tep; |
|||
} |
|||
|
|||
/** @brief Enable PPI channels, given the channels mask.
|
|||
* |
|||
* @param[in] channels uint32_t mask of the channels to enable. |
|||
*/ |
|||
void ppi_enable_channels(uint32_t channels) |
|||
{ |
|||
PPI_CHENSET = channels; |
|||
} |
|||
|
|||
/** @brief Disable PPI channels, given the channels mask.
|
|||
* |
|||
* @param[in] channels uint32_t mask of the channels to disable. |
|||
*/ |
|||
void ppi_disable_channels(uint32_t channels) |
|||
{ |
|||
PPI_CHENCLR = channels; |
|||
} |
|||
|
|||
/** @brief Set channels group, given channels mask.
|
|||
* |
|||
* @param[in] group uint8_t group number (0-3) |
|||
* @param[in] channels uint32_t mask of the channels to group together. |
|||
*/ |
|||
void ppi_set_group(uint8_t group, uint32_t channels) |
|||
{ |
|||
PPI_CHG(group) = channels; |
|||
} |
|||
|
|||
/** @brief Enable previously configured group of channels.
|
|||
* |
|||
* @param[in] group uint8_t group number (0-3) |
|||
*/ |
|||
void ppi_enable_group(uint8_t group) |
|||
{ |
|||
PPI_TASK_CHG_EN(group) = 1; |
|||
} |
|||
|
|||
/** @brief Disable previously configured group of channels.
|
|||
* |
|||
* @param[in] group uint8_t group number (0-3) |
|||
*/ |
|||
void ppi_disable_group(uint8_t group) |
|||
{ |
|||
PPI_TASK_CHG_DIS(group) = 1; |
|||
} |
|||
|
|||
/** @brief Configure new channel.
|
|||
* |
|||
* This is the alternative API, which requires the caller to store the mask of used channels. |
|||
* |
|||
* @param chan_map uint32_t* The mask of channels that are already in use. |
|||
* For the first call initialize with zero and pass in. |
|||
* @param[in] eep uint32_t Event endpoint. |
|||
* @param[in] tep uint32_t Task endpoint. |
|||
* @param enable bool If true, enable the channel immediately. |
|||
* @return The number of the new channel. If there are no channels available, returns 0xff. |
|||
*/ |
|||
uint8_t ppi_add_channel(uint32_t *chan_map, uint32_t eep, uint32_t tep, bool enable) |
|||
{ |
|||
/* Find a free channel */ |
|||
uint8_t i; |
|||
uint32_t chan_bit; |
|||
for (i = 0, chan_bit = 1; i <= PPI_MAX_PROG_CHANNEL; ++i, chan_bit <<= 1) { |
|||
if (!(chan_bit & *chan_map)) { |
|||
*chan_map |= chan_bit; |
|||
break; |
|||
} |
|||
} |
|||
|
|||
/* If all channels are taken, return error. */ |
|||
if (i > PPI_MAX_PROG_CHANNEL) { |
|||
return 0xff; |
|||
} |
|||
|
|||
ppi_configure_channel(i, eep, tep); |
|||
if (enable) { |
|||
ppi_enable_channels(chan_bit); |
|||
} |
|||
|
|||
return i; |
|||
} |
|||
|
|||
/** @brief Disable channel and remove it from the map of used channels.
|
|||
* |
|||
* This is the alternative API, which requires the caller to store the mask of used channels. |
|||
* |
|||
* @param chan_map uint32_t* The mask of channels that are already in use. |
|||
* For the first call initialize with zero and pass in. |
|||
* @param[in] chan_num uint8_t the number of the channel to remove from the map. |
|||
*/ |
|||
void ppi_remove_channel(uint32_t *chan_map, uint8_t chan_num) |
|||
{ |
|||
ppi_disable_channels(PPI_CH(chan_num)); |
|||
*chan_map &= ~(PPI_CH(chan_num)); |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,250 @@ |
|||
/** @addtogroup radio_file RADIO peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the 2.4 GHz Radio </b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/ficr.h> |
|||
#include <libopencm3/nrf/radio.h> |
|||
|
|||
/**@{*/ |
|||
|
|||
/** @brief Set radio transmission power.
|
|||
* |
|||
* @details Note, not all supported power levels are BLE compliant. |
|||
* |
|||
* @param[in] txpower enum radio_txpower |
|||
* */ |
|||
void radio_set_txpower(enum radio_txpower txpower) |
|||
{ |
|||
RADIO_TXPOWER = txpower; |
|||
} |
|||
|
|||
/** @brief Set bit transmission order to LSB first. */ |
|||
void radio_set_lsbfirst(void) |
|||
{ |
|||
RADIO_PCNF1 &= ~RADIO_PCNF1_ENDIAN_BIG; |
|||
} |
|||
|
|||
/** @brief Set bit transmission order to MSB first. */ |
|||
void radio_set_msbfirst(void) |
|||
{ |
|||
RADIO_PCNF1 |= RADIO_PCNF1_ENDIAN_BIG; |
|||
} |
|||
|
|||
/** @brief Enable on the air data whitening
|
|||
* |
|||
* @details the in-memory data will remain unwhitened. |
|||
* */ |
|||
void radio_enable_whitening(void) |
|||
{ |
|||
RADIO_PCNF1 |= RADIO_PCNF1_WHITEEN; |
|||
} |
|||
|
|||
/** @brief Disable on the air data whitening. */ |
|||
void radio_disable_whitening(void) |
|||
{ |
|||
RADIO_PCNF1 &= ~RADIO_PCNF1_WHITEEN; |
|||
} |
|||
|
|||
/** @brief Set CRC length in number of bytes.
|
|||
* |
|||
* @param[in] crc_len uint8_t CRC length in number of bytes (1-3), 0 = CRC disabled. |
|||
*/ |
|||
void radio_set_crclen(uint8_t crc_len) |
|||
{ |
|||
uint32_t reg_crc = RADIO_CRCCNF; |
|||
reg_crc &= ~RADIO_CRCCNF_LEN_MASK; |
|||
RADIO_CRCCNF = reg_crc | RADIO_CRCCNF_LEN_MASKED(crc_len); |
|||
} |
|||
|
|||
/** @brief Disable CRC calculation. */ |
|||
void radio_disable_crc(void) |
|||
{ |
|||
RADIO_CRCCNF &= ~RADIO_CRCCNF_LEN_MASK; |
|||
} |
|||
|
|||
/** @brief Enable the peripheral. */ |
|||
void radio_enable(void) |
|||
{ |
|||
RADIO_POWER = RADIO_POWER_ENABLED; |
|||
} |
|||
|
|||
/** @brief Disable the peripheral. */ |
|||
void radio_disable(void) |
|||
{ |
|||
RADIO_POWER = RADIO_POWER_DISABLED; |
|||
} |
|||
|
|||
|
|||
/** @brief Set Base Address length.
|
|||
* |
|||
* @param[in] ba_len uint8_t Base Address length in number of bytes (2-4). |
|||
*/ |
|||
void radio_set_balen(uint8_t ba_len) |
|||
{ |
|||
uint32_t reg_pcnf1 = RADIO_PCNF1; |
|||
reg_pcnf1 &= ~RADIO_PCNF1_BALEN_MASK; |
|||
RADIO_PCNF1 = reg_pcnf1 | RADIO_PCNF1_BALEN_MASKED(ba_len); |
|||
} |
|||
|
|||
/** @brief Set maximum transmission length in number of bytes.
|
|||
* |
|||
* @param[in] maxlen uint8_t maximum transmission length. |
|||
*/ |
|||
void radio_set_maxlen(uint8_t maxlen) |
|||
{ |
|||
uint32_t reg_pcnf1 = RADIO_PCNF1; |
|||
reg_pcnf1 &= ~RADIO_PCNF1_MAXLEN_MASK; |
|||
RADIO_PCNF1 = reg_pcnf1 | RADIO_PCNF1_MAXLEN_MASKED(maxlen); |
|||
} |
|||
|
|||
/** @brief Exclude access address from CRC calculation.
|
|||
* |
|||
* @param[in] is_skip_addr bool If true, CRC will be calculated over PDU only, |
|||
* if false, it will also include the Access Address. |
|||
*/ |
|||
void radio_set_crc_skipaddr(bool is_skip_addr) |
|||
{ |
|||
if (is_skip_addr) { |
|||
RADIO_CRCCNF |= RADIO_CRCCNF_SKIPADDR; |
|||
} else { |
|||
RADIO_CRCCNF &= ~RADIO_CRCCNF_SKIPADDR; |
|||
} |
|||
} |
|||
|
|||
/** @brief Configure the radio to be used in BLE mode.
|
|||
* |
|||
* @details This needs to be called before the radio can be used in BLE mode. |
|||
* It will set som BLE standard parameters, like Inter-Frame Spacing time, |
|||
* LSB first, enable whitening, properly configure CRC (for advertising) and address length. |
|||
*/ |
|||
void radio_configure_ble(void) |
|||
{ |
|||
#ifdef NRF51 |
|||
radio_set_mode(RADIO_MODE_BLE_1MBIT); |
|||
#endif |
|||
RADIO_TIFS = RADIO_BLE_TIFS; |
|||
radio_set_lsbfirst(); |
|||
radio_enable_whitening(); |
|||
|
|||
radio_set_crclen(RADIO_BLE_CRCLEN); |
|||
RADIO_CRCPOLY = RADIO_BLE_CRCPOLY; |
|||
RADIO_CRCINIT = RADIO_BLE_CRCINIT; |
|||
radio_set_crc_skipaddr(true); |
|||
radio_set_balen(3); |
|||
} |
|||
|
|||
/** @brief Configure the packet.
|
|||
* |
|||
* @details See the data sheet for details. |
|||
*/ |
|||
void radio_configure_packet(uint8_t lf_len_bits, uint8_t s0_len_bytes, uint8_t s1_len_bits) |
|||
{ |
|||
RADIO_PCNF0 = RADIO_PCNF0_LFLEN_MASKED(lf_len_bits) |
|||
| RADIO_PCNF0_S0LEN_MASKED(s0_len_bytes) |
|||
| RADIO_PCNF0_S1LEN_MASKED(s1_len_bits); |
|||
} |
|||
|
|||
/** @brief Set radio frequency.
|
|||
* |
|||
* @param[in] freq uint8_t Frequency offset from 2.4GHz in MHz, for example "29" will |
|||
* tune the radio to 2429MHz |
|||
*/ |
|||
void radio_set_frequency(uint8_t freq) |
|||
{ |
|||
RADIO_FREQUENCY = freq; |
|||
} |
|||
|
|||
/** @brief Set Data Whitening Initialization Vector.
|
|||
* |
|||
* @param[in] iv uint8_t Initialization Vector. For BLE, this is channel index. |
|||
*/ |
|||
void radio_set_datawhiteiv(uint8_t iv) |
|||
{ |
|||
RADIO_DATAWHITEIV = iv; |
|||
} |
|||
|
|||
/* @brief Set Address (base and prefix)
|
|||
* |
|||
* @details Note that bases are shared between addresses 1-7, |
|||
* so changing one of them will change others too. |
|||
* |
|||
* @param[in] addr_index uint8_t address index (0-7) |
|||
* @param[in] base uint32_t base part of the address. If balen < 4, appropriate number |
|||
* of LSBs will be thrown away. |
|||
* @param[in] prefix uint8_t Address prefix. |
|||
*/ |
|||
void radio_set_addr(uint8_t addr_index, uint32_t base, uint8_t prefix) |
|||
{ |
|||
if (addr_index == 0) { |
|||
RADIO_BASE0 = base; |
|||
} else { |
|||
RADIO_BASE1 = base; |
|||
} |
|||
|
|||
uint32_t reg_prefix = RADIO_PREFIX_AP(addr_index); |
|||
reg_prefix &= ~RADIO_PREFIX_AP_MASK(addr_index); |
|||
RADIO_PREFIX_AP_SET(addr_index, reg_prefix | RADIO_PREFIX_AP_MASKED(addr_index, prefix)); |
|||
} |
|||
|
|||
/* @brief Set TX address index
|
|||
* |
|||
* @details The address needs to be previously configured with radio_set_addr() |
|||
* |
|||
* @param[in] address_index uint8_t address index (0-7) |
|||
*/ |
|||
void radio_set_tx_address(uint8_t addr_index) |
|||
{ |
|||
RADIO_TXADDRESS = addr_index; |
|||
} |
|||
|
|||
/* @brief Set pointer for RX/TX data
|
|||
* |
|||
* @param[in] packet_ptr uint8_t* packet buffer address. |
|||
*/ |
|||
void radio_set_packet_ptr(uint8_t *packet_ptr) |
|||
{ |
|||
RADIO_PACKETPTR = (uint32_t)packet_ptr; |
|||
} |
|||
|
|||
/* @brief Enable radio Transmitter */ |
|||
void radio_enable_tx(void) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(RADIO_TASK_TXEN); |
|||
} |
|||
|
|||
/* @brief Enable radio Receiver */ |
|||
void radio_enable_rx(void) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(RADIO_TASK_RXEN); |
|||
} |
|||
|
|||
|
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,116 @@ |
|||
/** @addtogroup rtc_file RTC peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the Real Time Counter Controller </b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/rtc.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief RTC set Prescaler value.
|
|||
* |
|||
* @details The clock needs to be stopped for this to have any effect. |
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
* @param[in] presc uint16_t 12 bit prescaler value. |
|||
*/ |
|||
void rtc_set_prescaler(uint32_t rtc, uint16_t presc) |
|||
{ |
|||
RTC_PRESCALER(rtc) = presc & 0xfff; |
|||
} |
|||
|
|||
/** @brief RTC get Counter value.
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
*/ |
|||
uint32_t rtc_get_counter(uint32_t rtc) |
|||
{ |
|||
return RTC_COUNTER(rtc); |
|||
} |
|||
|
|||
/** @brief Enable events
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
* @param[in] mask uint32_t which events to enable |
|||
*/ |
|||
void rtc_enable_events(uint32_t rtc, uint32_t mask) |
|||
{ |
|||
RTC_EVTENSET(rtc) = mask; |
|||
} |
|||
|
|||
/** @brief Disable events
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
* @param[in] mask uint32_t which events to disable |
|||
*/ |
|||
void rtc_disable_events(uint32_t rtc, uint32_t mask) |
|||
{ |
|||
RTC_EVTENCLR(rtc) = mask; |
|||
} |
|||
|
|||
/** @brief Start the RTC
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
*/ |
|||
void rtc_start(uint32_t rtc) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(RTC_TASK_START(rtc)); |
|||
} |
|||
|
|||
/** @brief Stop the RTC
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
*/ |
|||
void rtc_stop(uint32_t rtc) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(RTC_TASK_STOP(rtc)); |
|||
} |
|||
|
|||
/** @brief Clear the RTC
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
*/ |
|||
void rtc_clear(uint32_t rtc) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(RTC_TASK_CLEAR(rtc)); |
|||
} |
|||
|
|||
/** @brief Set compare register
|
|||
* |
|||
* @param[in] rtc uint32_t RTC base |
|||
* @param[in] cmp uint8_t compare number (0-3) |
|||
* @param[in] value uint32_t compare value |
|||
*/ |
|||
void rtc_set_compare(uint32_t rtc, uint8_t cmp, uint32_t value) |
|||
{ |
|||
if (cmp < 4) { |
|||
RTC_CC(rtc, cmp) = value; |
|||
} |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,147 @@ |
|||
/** @addtogroup timer_file TIMER peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the Timer/Counter </b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/timer.h> |
|||
#include <libopencm3/nrf/clock.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief Get timer ticks
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @returns current ticks value |
|||
*/ |
|||
uint32_t timer_get_ticks(uint32_t timer) |
|||
{ |
|||
uint32_t ticks; |
|||
uint32_t cc; |
|||
|
|||
/* TODO: Check WTF is this doing? */ |
|||
cc = TIMER_CC(0, 0); |
|||
TIMER_TASK_CAPTURE(timer, 0) = 1; |
|||
ticks = TIMER_CC(timer, 0); |
|||
TIMER_CC(timer, 0) = cc; |
|||
return ticks; |
|||
} |
|||
|
|||
/** @brief Set timer mode (counter/timer)
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @param[in] mode enum timer_mode |
|||
*/ |
|||
void timer_set_mode(uint32_t timer, enum timer_mode mode) |
|||
{ |
|||
TIMER_MODE(timer) = mode; |
|||
} |
|||
|
|||
/** @brief Set timer bit mode (width)
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @param[in] bitmode enum timer_bitmode |
|||
*/ |
|||
void timer_set_bitmode(uint32_t timer, enum timer_bitmode bitmode) |
|||
{ |
|||
TIMER_BITMODE(timer) = bitmode; |
|||
} |
|||
|
|||
/** @brief Start the timer
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
*/ |
|||
void timer_start(uint32_t timer) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(TIMER_TASK_START(timer)); |
|||
} |
|||
|
|||
/** @brief Stop the timer
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
*/ |
|||
void timer_stop(uint32_t timer) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(TIMER_TASK_STOP(timer)); |
|||
} |
|||
|
|||
/** @brief Clear the timer
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
*/ |
|||
void timer_clear(uint32_t timer) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(TIMER_TASK_CLEAR(timer)); |
|||
} |
|||
|
|||
/** @brief Set prescaler value
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @param[in] presc uint8_t prescaler value |
|||
*/ |
|||
void timer_set_prescaler(uint32_t timer, uint8_t presc) |
|||
{ |
|||
TIMER_PRESCALER(timer) = presc & TIMER_PRESCALER_MASK; |
|||
} |
|||
|
|||
/** @brief Set compare register
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @param[in] compare_num uint8_t compare number (0-3) |
|||
* @param[in] compare_val uint32_t compare value |
|||
*/ |
|||
void timer_set_compare(uint32_t timer, uint8_t compare_num, uint32_t compare_val) |
|||
{ |
|||
if (compare_num > 3) { |
|||
return; |
|||
} |
|||
|
|||
TIMER_CC(timer, compare_num) = compare_val; |
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} |
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|
|||
/** @brief Get the timer tick frequency
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @returns frequency of ticking |
|||
*/ |
|||
uint32_t timer_get_freq(uint32_t timer) |
|||
{ |
|||
return CLOCK_PCLK/(1<<TIMER_PRESCALER(timer)); |
|||
} |
|||
|
|||
/** @brief Get compare register
|
|||
* |
|||
* @param[in] timer uint32_t timer base |
|||
* @param[in] compare_num uint8_t compare number (0-3) |
|||
* @returns compare register value |
|||
*/ |
|||
uint32_t timer_get_cc(uint32_t timer, uint8_t compare_num) |
|||
{ |
|||
return TIMER_CC(timer, compare_num); |
|||
} |
|||
/**@}*/ |
|||
|
|||
@ -0,0 +1,171 @@ |
|||
/** @addtogroup uart_file UART peripheral API
|
|||
* |
|||
* @brief <b>Access functions for the UART controller</b> |
|||
* |
|||
* @ingroup peripheral_apis |
|||
* LGPL License Terms @ref lgpl_license |
|||
* @author @htmlonly © @endhtmlonly 2016 |
|||
* Maxim Sloyko <maxims@google.com> |
|||
* |
|||
*/ |
|||
|
|||
/*
|
|||
* This file is part of the libopencm3 project. |
|||
* |
|||
* Copyright (C) 2017-2018 Unicore MX project<dev(at)lists(dot)unicore-mx(dot)org> |
|||
* Copyright (C) 2021 Eduard Drusa <ventyl86(at)netkosice(dot)sk> |
|||
* |
|||
* This library is free software: you can redistribute it and/or modify |
|||
* it under the terms of the GNU Lesser General Public License as published by |
|||
* the Free Software Foundation, either version 3 of the License, or |
|||
* (at your option) any later version. |
|||
* |
|||
* This library is distributed in the hope that it will be useful, |
|||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|||
* GNU Lesser General Public License for more details. |
|||
* |
|||
* You should have received a copy of the GNU Lesser General Public License |
|||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
|||
*/ |
|||
|
|||
#include <libopencm3/nrf/uart.h> |
|||
#include <libopencm3/nrf/gpio.h> |
|||
/**@{*/ |
|||
|
|||
/** @brief Enable the peripheral
|
|||
* |
|||
* @param[in] uart uint32_t uart base |
|||
*/ |
|||
void uart_enable(uint32_t uart) |
|||
{ |
|||
UART_ENABLE(uart) = UART_ENABLE_ENABLED; |
|||
} |
|||
|
|||
/** @brief Disable the peripheral
|
|||
* |
|||
* @param[in] uart uint32_t uart base |
|||
*/ |
|||
void uart_disable(uint32_t uart) |
|||
{ |
|||
UART_ENABLE(uart) = UART_ENABLE_DISABLED; |
|||
} |
|||
|
|||
/** @brief Configure UART parameters in single call
|
|||
* |
|||
* @details Any pin number can be set to 0xff (or any number larger than UART_MAX_PIN) |
|||
* to disconnect that pin. |
|||
* |
|||
* @param[in] uart uint32_t uart base |
|||
* @param[in] tx_pin uint8_t TX pin number |
|||
* @param[in] rx_pin uint8_t RX pin number |
|||
* @param[in] rts_pin uint8_t RTS pin number |
|||
* @param[in] cts_pin uint8_t CTS pin number |
|||
* @param[in] br enum uart_baud baud rate |
|||
* @param[in] enable_parity bool If true, enable parity bit |
|||
*/ |
|||
void uart_configure(uint32_t uart, |
|||
uint32_t tx_pin, uint32_t rx_pin, uint32_t rts_pin, uint32_t cts_pin, |
|||
enum uart_baud br, bool enable_parity) |
|||
{ |
|||
uart_set_pins(uart, rx_pin, tx_pin, cts_pin, rts_pin); |
|||
|
|||
uint32_t reg_config = enable_parity ? UART_CONFIG_PARITY : 0; |
|||
if (rts_pin <= UART_MAX_PIN || cts_pin <= UART_MAX_PIN) { |
|||
reg_config |= UART_CONFIG_HWFC; |
|||
} |
|||
|
|||
UART_CONFIG(uart) = reg_config; |
|||
uart_set_baudrate(uart, br); |
|||
} |
|||
|
|||
/** @brief Select GPIO pins to be used by this peripheral.
|
|||
* |
|||
* This needs to be configured while UART peripheral is disabled. |
|||
* |
|||
* @param[in] uart uart peripheral base. |
|||
* @param[in] rx RX pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
* @param[in] tx TX pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
* @param[in] cts CTS pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
* @param[in] rts RTS pin. Use GPIO defines in @ref gpio_pin_id or GPIO_UNCONNECTED |
|||
* if signal shall not be connected to any pin. |
|||
|
|||
*/ |
|||
void uart_set_pins(uint32_t uart, uint32_t rx, uint32_t tx, uint32_t cts, uint32_t rts) |
|||
{ |
|||
if (rx != GPIO_UNCONNECTED) { |
|||
UART_PSELRXD(uart) = __GPIO2PIN(rx); |
|||
} else { |
|||
UART_PSELRXD(uart) = rx; |
|||
} |
|||
|
|||
if (tx != GPIO_UNCONNECTED) { |
|||
UART_PSELTXD(uart) = __GPIO2PIN(tx); |
|||
} else { |
|||
UART_PSELTXD(uart) = tx; |
|||
} |
|||
|
|||
if (cts != GPIO_UNCONNECTED) { |
|||
UART_PSELCTS(uart) = __GPIO2PIN(cts); |
|||
} else { |
|||
UART_PSELCTS(uart) = cts; |
|||
} |
|||
|
|||
if (rts != GPIO_UNCONNECTED) { |
|||
UART_PSELRTS(uart) = __GPIO2PIN(rts); |
|||
} else { |
|||
UART_PSELRTS(uart) = rts; |
|||
} |
|||
} |
|||
|
|||
#undef _LOG2 |
|||
|
|||
void uart_set_baudrate(uint32_t uart, enum uart_baud br) |
|||
{ |
|||
UART_BAUDRATE(uart) = br; |
|||
} |
|||
|
|||
void uart_set_parity(uint32_t uart, int parity) |
|||
{ |
|||
UART_CONFIG(uart) |= parity ? UART_CONFIG_PARITY : 0; |
|||
} |
|||
|
|||
void uart_set_flow_control(uint32_t uart, int flow) |
|||
{ |
|||
UART_CONFIG(uart) |= flow ? UART_CONFIG_HWFC : 0; |
|||
} |
|||
|
|||
void uart_start_tx(uint32_t uart) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(UART_TASK_STARTTX((uart))); |
|||
} |
|||
|
|||
void uart_send(uint32_t uart, uint16_t byte) |
|||
{ |
|||
UART_TXD((uart)) = byte; |
|||
} |
|||
|
|||
void uart_stop_tx(uint32_t uart) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(UART_TASK_STOPTX((uart))); |
|||
} |
|||
|
|||
void uart_start_rx(uint32_t uart) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(UART_TASK_STARTRX((uart))); |
|||
} |
|||
|
|||
uint16_t uart_recv(uint32_t uart) |
|||
{ |
|||
return UART_RXD(uart); |
|||
} |
|||
|
|||
void uart_stop_rx(uint32_t uart) |
|||
{ |
|||
PERIPH_TRIGGER_TASK(UART_TASK_STOPRX((uart))); |
|||
} |
|||
/**@}*/ |
|||
|
|||
Loading…
Reference in new issue