Add rcc_peripheral_{reset,clear_reset} functions.

Also, rename two other functions for consistency.

examples/fancyblink/fancyblink.c

@@ -44,7 +44,7 @@ void clock_setup(void)
 void gpio_setup(void)
 {
 	/* Enable GPIOC clock. */
-	rcc_enable_peripheral_clock(&RCC_APB2ENR, IOPCEN);
+	rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
 
 	/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
 	gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,

examples/miniblink/miniblink.c

@@ -25,7 +25,7 @@ void gpio_setup(void)
 	/* Manually: */
 	// RCC_APB2ENR |= IOPCEN;
 	/* Using API functions: */
-	rcc_enable_peripheral_clock(&RCC_APB2ENR, IOPCEN);
+	rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
 
 	/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
 	/* Manually: */

examples/usart/usart.c

@@ -43,8 +43,8 @@ void clock_setup(void)
 void usart_setup(void)
 {
 	/* Enable clocks for GPIO port B (for GPIO_USART3_TX) and USART3. */
-	rcc_enable_peripheral_clock(&RCC_APB2ENR, IOPBEN);
-	rcc_enable_peripheral_clock(&RCC_APB1ENR, USART3EN);
+	rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPBEN);
+	rcc_peripheral_enable_clock(&RCC_APB1ENR, USART3EN);
 
 	/* Setup GPIO pin GPIO_USART3_TX/GPIO10 on GPIO port B for transmit. */
 	gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
@@ -65,7 +65,7 @@ void usart_setup(void)
 void gpio_setup(void)
 {
 	/* Enable GPIOC clock. */
-	rcc_enable_peripheral_clock(&RCC_APB2ENR, IOPCEN);
+	rcc_peripheral_enable_clock(&RCC_APB2ENR, IOPCEN);
 
 	/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
 	gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,

include/libopenstm32/rcc.h

@@ -378,8 +378,10 @@ void rcc_css_enable(void);
 void rcc_css_disable(void);
 void rcc_osc_bypass_enable(osc_t osc);
 void rcc_osc_bypass_disable(osc_t osc);
-void rcc_enable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
-void rcc_disable_peripheral_clock(volatile u32 *reg, u32 peripheral_en);
+void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en);
+void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en);
+void rcc_peripheral_reset(volatile u32 *reg, u32 reset);
+void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset);
 void rcc_set_sysclk_source(u32 clk);
 void rcc_set_pll_multiplication_factor(u32 mul);
 void rcc_set_pll_source(u32 pllsrc);

lib/rcc.c

@@ -224,14 +224,24 @@ void rcc_osc_bypass_disable(osc_t osc)
 	}
 }
 
-void rcc_enable_peripheral_clock(volatile u32 *reg, u32 peripheral_en)
+void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en)
 {
-	*reg |= peripheral_en;
+	*reg |= en;
 }
 
-void rcc_disable_peripheral_clock(volatile u32 *reg, u32 peripheral_en)
+void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en)
 {
-	*reg &= ~peripheral_en;
+	*reg &= ~en;
+}
+
+void rcc_peripheral_reset(volatile u32 *reg, u32 reset)
+{
+	*reg |= reset;
+}
+
+void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset)
+{
+	*reg |= clear_reset;
 }
 
 void rcc_set_sysclk_source(u32 clk)