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[build] Remove PyYAML dependency 

This converts all the YAML files to JSON files, as json parsing is built
into python instead of being a separate library requiring installation.

YAML is a superset of JSON, but putting comments in is not quite as obvious
as it is in yaml.

The following glue was used to convert yaml to json:
python -c 'import sys, yaml, json; json.dump(yaml.load(sys.stdin), sys.stdout, indent=4)' < $1 > $2

Clearly I haven't tested this on every single platform, and this
doesn't address the large blobs of yaml in the lpc4300 scripts directory,
only the cortex NVIC generation process.

I've tested a few IRQ driven example apps, and I've checked the generated
output of some known cases like the LM3s that has explicit gaps, and they are
all generated correctly.
pull/202/merge
Karl Palsson 11 years ago
committed by Piotr Esden-Tempski
parent
b4eb8a6971
commit
5c14780403
37 changed files with 1030 additions and 994 deletions
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  1. 6
      Makefile
  2. 9
      README
  3. 38
      include/libopencm3/efm32/efm32g/irq.json
  4. 35
      include/libopencm3/efm32/efm32g/irq.yaml
  5. 46
      include/libopencm3/efm32/efm32gg/irq.json
  6. 43
      include/libopencm3/efm32/efm32gg/irq.yaml
  7. 46
      include/libopencm3/efm32/efm32lg/irq.json
  8. 43
      include/libopencm3/efm32/efm32lg/irq.yaml
  9. 31
      include/libopencm3/efm32/efm32tg/irq.json
  10. 28
      include/libopencm3/efm32/efm32tg/irq.yaml
  11. 126
      include/libopencm3/lm3s/irq.json
  12. 125
      include/libopencm3/lm3s/irq.yaml
  13. 63
      include/libopencm3/lpc13xx/irq.json
  14. 62
      include/libopencm3/lpc13xx/irq.yaml
  15. 42
      include/libopencm3/lpc17xx/irq.json
  16. 39
      include/libopencm3/lpc17xx/irq.yaml
  17. 36
      include/libopencm3/lpc43xx/m0/irq.json
  18. 34
      include/libopencm3/lpc43xx/m0/irq.yaml
  19. 54
      include/libopencm3/lpc43xx/m4/irq.json
  20. 55
      include/libopencm3/lpc43xx/m4/irq.yaml
  21. 39
      include/libopencm3/sam/3n/irq.json
  22. 36
      include/libopencm3/sam/3n/irq.yaml
  23. 52
      include/libopencm3/sam/3x/irq.json
  24. 49
      include/libopencm3/sam/3x/irq.yaml
  25. 39
      include/libopencm3/stm32/f0/irq.json
  26. 36
      include/libopencm3/stm32/f0/irq.yaml
  27. 75
      include/libopencm3/stm32/f1/irq.json
  28. 72
      include/libopencm3/stm32/f1/irq.yaml
  29. 88
      include/libopencm3/stm32/f2/irq.json
  30. 85
      include/libopencm3/stm32/f2/irq.yaml
  31. 88
      include/libopencm3/stm32/f3/irq.json
  32. 85
      include/libopencm3/stm32/f3/irq.yaml
  33. 88
      include/libopencm3/stm32/f4/irq.json
  34. 85
      include/libopencm3/stm32/f4/irq.yaml
  35. 64
      include/libopencm3/stm32/l1/irq.json
  36. 62
      include/libopencm3/stm32/l1/irq.yaml
  37. 20
      scripts/irq2nvic_h

6
Makefile
View File

@ -47,7 +47,7 @@ Q := @
MAKEFLAGS += --no-print-directory
endif
YAMLFILES := $(shell find . -name 'irq.yaml')
IRQ_DEFN_FILES := $(shell find . -name 'irq.json')
STYLECHECKFILES := $(shell find . -name '*.[ch]')
all: build
@ -63,7 +63,7 @@ build: lib
@./scripts/irq2nvic_h --remove ./$*
LIB_DIRS:=$(wildcard $(addprefix lib/,$(TARGETS)))
$(LIB_DIRS): $(YAMLFILES:=.genhdr)
$(LIB_DIRS): $(IRQ_DEFN_FILES:=.genhdr)
@printf " BUILD $@\n";
$(Q)$(MAKE) --directory=$@ SRCLIBDIR=$(SRCLIBDIR)
@ -89,7 +89,7 @@ install: lib
doc:
$(Q)$(MAKE) -C doc html
clean: $(YAMLFILES:=.cleanhdr) $(LIB_DIRS:=.clean) $(EXAMPLE_DIRS:=.clean) doc.clean styleclean
clean: $(IRQ_DEFN_FILES:=.cleanhdr) $(LIB_DIRS:=.clean) $(EXAMPLE_DIRS:=.clean) doc.clean styleclean
%.clean:
$(Q)if [ -d $* ]; then \

9
README
View File

@ -35,19 +35,14 @@ TIP: Include this repository as a GIT submodule in your project. To make sure
Prerequisites
-------------
Building requires python, and a python YAML module. (Some code is generated)
Building requires python. (Some code is generated)
For Ubuntu
$ [sudo] apt-get install python-yaml
For Fedora
$ [sudo] yum install PyYAML
For Ubuntu/Fedora, you already have everything you need.
For Windows
Download and install:
msys - sourceforge.net/projects/mingw/files/MSYS/Base/msys-core/msys-1.0.11/MSYS-1.0.11.exe
Python - http://www.python.org/ftp/python/2.7/python-2.7.msi (use installer to get the right registry keys for PyYAML)
PyYAML - http://pyyaml.org/download/pyyaml/PyYAML-3.10.win32-py2.7.exe
arm-none-eabi toolchain - for example this one https://launchpad.net/gcc-arm-embedded
Run msys shell and set the path without standard Windows paths, so Windows programs such as 'find' won't interfere:
export PATH="/c//Python27:/c/ARMToolchain/bin:/usr/local/bin:/usr/bin:/bin"

38
include/libopencm3/efm32/efm32g/irq.json
View File

@ -0,0 +1,38 @@
{
"_source": "The names and sequence are taken from d0001_efm32g_reference_manual.pdf table 4.1.",
"irqs": [
"dma",
"gpio_even",
"timer0",
"usart0_rx",
"usart0_tx",
"acmp01",
"adc0",
"dac0",
"i2c0",
"gpio_odd",
"timer1",
"timer2",
"usart1_rx",
"usart1_tx",
"usart2_rx",
"usart2_tx",
"uart0_rx",
"uart0_tx",
"leuart0",
"leuart1",
"letimer0",
"pcnt0",
"pcnt1",
"pcnt2",
"rtc",
"cmu",
"vcmp",
"lcd",
"msc",
"aes"
],
"partname_humanreadable": "EFM32 Gecko series",
"partname_doxygen": "EFM32G",
"includeguard": "LIBOPENCM3_EFM32G_NVIC_H"
}

35
include/libopencm3/efm32/efm32g/irq.yaml
View File

@ -1,35 +0,0 @@
includeguard: LIBOPENCM3_EFM32G_NVIC_H
partname_humanreadable: EFM32 Gecko series
partname_doxygen: EFM32G
# The names and sequence are taken from d0001_efm32g_reference_manual.pdf table 4.1.
irqs:
- dma
- gpio_even
- timer0
- usart0_rx
- usart0_tx
- acmp01
- adc0
- dac0
- i2c0
- gpio_odd
- timer1
- timer2
- usart1_rx
- usart1_tx
- usart2_rx
- usart2_tx
- uart0_rx
- uart0_tx
- leuart0
- leuart1
- letimer0
- pcnt0
- pcnt1
- pcnt2
- rtc
- cmu
- vcmp
- lcd
- msc
- aes

46
include/libopencm3/efm32/efm32gg/irq.json
View File

@ -0,0 +1,46 @@
{
"_source": "The names and sequence are taken from d0053_efm32gg_refreence_manual.pdf table 4.1.",
"irqs": [
"dma",
"gpio_even",
"timer0",
"usart0_rx",
"usart0_tx",
"usb",
"acmp01",
"adc0",
"dac0",
"i2c0",
"i2c1",
"gpio_odd",
"timer1",
"timer2",
"timer3",
"usart1_rx",
"usart1_tx",
"lesense",
"usart2_rx",
"usart2_tx",
"uart0_rx",
"uart0_tx",
"uart1_rx",
"uart1_tx",
"leuart0",
"leuart1",
"letimer0",
"pcnt0",
"pcnt1",
"pcnt2",
"rtc",
"burtc",
"cmu",
"vcmp",
"lcd",
"msc",
"aes",
"ebi"
],
"partname_humanreadable": "EFM32 Giant Gecko series",
"partname_doxygen": "EFM32GG",
"includeguard": "LIBOPENCM3_EFM32GG_NVIC_H"
}

43
include/libopencm3/efm32/efm32gg/irq.yaml
View File

@ -1,43 +0,0 @@
includeguard: LIBOPENCM3_EFM32GG_NVIC_H
partname_humanreadable: EFM32 Giant Gecko series
partname_doxygen: EFM32GG
# The names and sequence are taken from d0053_efm32gg_refreence_manual.pdf table 4.1.
irqs:
- dma
- gpio_even
- timer0
- usart0_rx
- usart0_tx
- usb
- acmp01
- adc0
- dac0
- i2c0
- i2c1
- gpio_odd
- timer1
- timer2
- timer3
- usart1_rx
- usart1_tx
- lesense
- usart2_rx
- usart2_tx
- uart0_rx
- uart0_tx
- uart1_rx
- uart1_tx
- leuart0
- leuart1
- letimer0
- pcnt0
- pcnt1
- pcnt2
- rtc
- burtc
- cmu
- vcmp
- lcd
- msc
- aes
- ebi

46
include/libopencm3/efm32/efm32lg/irq.json
View File

@ -0,0 +1,46 @@
{
"_source": "The names and sequence are taken from d0183_efm32lg_reference_manual.pdf table 4.1.",
"irqs": [
"dma",
"gpio_even",
"timer0",
"usart0_rx",
"usart0_tx",
"usb",
"acmp01",
"adc0",
"dac0",
"i2c0",
"i2c1",
"gpio_odd",
"timer1",
"timer2",
"timer3",
"usart1_rx",
"usart1_tx",
"lesense",
"usart2_rx",
"usart2_tx",
"uart0_rx",
"uart0_tx",
"uart1_rx",
"uart1_tx",
"leuart0",
"leuart1",
"letimer0",
"pcnt0",
"pcnt1",
"pcnt2",
"rtc",
"burtc",
"cmu",
"vcmp",
"lcd",
"msc",
"aes",
"ebi"
],
"partname_humanreadable": "EFM32 Leopard Gecko series",
"partname_doxygen": "EFM32LG",
"includeguard": "LIBOPENCM3_EFM32LG_NVIC_H"
}

43
include/libopencm3/efm32/efm32lg/irq.yaml
View File

@ -1,43 +0,0 @@
includeguard: LIBOPENCM3_EFM32LG_NVIC_H
partname_humanreadable: EFM32 Leopard Gecko series
partname_doxygen: EFM32LG
# The names and sequence are taken from d0183_efm32lg_reference_manual.pdf table 4.1.
irqs:
- dma
- gpio_even
- timer0
- usart0_rx
- usart0_tx
- usb
- acmp01
- adc0
- dac0
- i2c0
- i2c1
- gpio_odd
- timer1
- timer2
- timer3
- usart1_rx
- usart1_tx
- lesense
- usart2_rx
- usart2_tx
- uart0_rx
- uart0_tx
- uart1_rx
- uart1_tx
- leuart0
- leuart1
- letimer0
- pcnt0
- pcnt1
- pcnt2
- rtc
- burtc
- cmu
- vcmp
- lcd
- msc
- aes
- ebi

31
include/libopencm3/efm32/efm32tg/irq.json
View File

@ -0,0 +1,31 @@
{
"_source": "The names and sequence are taken from d0034_efm32tg_reference_manual.pdf table 4.1.",
"irqs": [
"dma",
"gpio_even",
"timer0",
"usart0_rx",
"usart0_tx",
"acmp01",
"adc0",
"dac0",
"i2c0",
"gpio_odd",
"timer1",
"usart1_rx",
"usart1_tx",
"lesense",
"leuart0",
"letimer0",
"pcnt0",
"rtc",
"cmu",
"vcmp",
"lcd",
"msc",
"aes"
],
"partname_humanreadable": "EFM32 Tiny Gecko series",
"partname_doxygen": "EFM32TG",
"includeguard": "LIBOPENCM3_EFM32TG_NVIC_H"
}

28
include/libopencm3/efm32/efm32tg/irq.yaml
View File

@ -1,28 +0,0 @@
includeguard: LIBOPENCM3_EFM32TG_NVIC_H
partname_humanreadable: EFM32 Tiny Gecko series
partname_doxygen: EFM32TG
# The names and sequence are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
irqs:
- dma
- gpio_even
- timer0
- usart0_rx
- usart0_tx
- acmp01
- adc0
- dac0
- i2c0
- gpio_odd
- timer1
- usart1_rx
- usart1_tx
- lesense
- leuart0
- letimer0
- pcnt0
- rtc
- cmu
- vcmp
- lcd
- msc
- aes

126
include/libopencm3/lm3s/irq.json
View File

@ -0,0 +1,126 @@
{
"_comment": [
"Although this says LM3S, the interrupt table applies to the",
"LM4F as well Some interrupt vectores marked as reserved in LM3S are",
"used in LM4F, and some vectors in LM3S are marked reserved for LM4F.",
"However, the common vectors are identical, and we can safely use the",
"same interrupt table. Reserved vectors will never be triggered, so",
"having them is perfectly safe."
],
"irqs": {
"0": "GPIOA",
"1": "GPIOB",
"2": "GPIOC",
"3": "GPIOD",
"4": "GPIOE",
"5": "UART0",
"6": "UART1",
"7": "SSI0",
"8": "I2C0",
"9": "PWM0_FAULT",
"10": "PWM0_0",
"11": "PWM0_1",
"12": "PWM0_2",
"13": "QEI0",
"14": "ADC0SS0",
"15": "ADC0SS1",
"16": "ADC0SS2",
"17": "ADC0SS3",
"18": "WATCHDOG",
"19": "TIMER0A",
"20": "TIMER0B",
"21": "TIMER1A",
"22": "TIMER1B",
"23": "TIMER2A",
"24": "TIMER2B",
"25": "COMP0",
"26": "COMP1",
"27": "COMP2",
"28": "SYSCTL",
"29": "FLASH",
"30": "GPIOF",
"31": "GPIOG",
"32": "GPIOH",
"33": "UART2",
"34": "SSI1",
"35": "TIMER3A",
"36": "TIMER3B",
"37": "I2C1",
"38": "QEI1",
"39": "CAN0",
"40": "CAN1",
"41": "CAN2",
"42": "ETH",
"43": "HIBERNATE",
"44": "USB0",
"45": "PWM0_3",
"46": "UDMA",
"47": "UDMAERR",
"48": "ADC1SS0",
"49": "ADC1SS1",
"50": "ADC1SS2",
"51": "ADC1SS3",
"52": "I2S0",
"53": "EPI0",
"54": "GPIOJ",
"55": "GPIOK",
"56": "GPIOL",
"57": "SSI2",
"58": "SSI3",
"59": "UART3",
"60": "UART4",
"61": "UART5",
"62": "UART6",
"63": "UART7",
"68": "I2C2",
"69": "I2C3",
"70": "TIMER4A",
"71": "TIMER4B",
"92": "TIMER5A",
"93": "TIMER5B",
"94": "WTIMER0A",
"95": "WTIMER0B",
"96": "WTIMER1A",
"97": "WTIMER1B",
"98": "WTIMER2A",
"99": "WTIMER2B",
"100": "WTIMER3A",
"101": "WTIMER3B",
"102": "WTIMER4A",
"103": "WTIMER4B",
"104": "WTIMER5A",
"105": "WTIMER5B",
"106": "SYSEXC",
"107": "PECI0",
"108": "LPC0",
"109": "I2C4",
"110": "I2C5",
"111": "GPIOM",
"112": "GPION",
"114": "FAN0",
"116": "GPIOP0",
"117": "GPIOP1",
"118": "GPIOP2",
"119": "GPIOP3",
"120": "GPIOP4",
"121": "GPIOP5",
"122": "GPIOP6",
"123": "GPIOP7",
"124": "GPIOQ0",
"125": "GPIOQ1",
"126": "GPIOQ2",
"127": "GPIOQ3",
"128": "GPIOQ4",
"129": "GPIOQ5",
"130": "GPIOQ6",
"131": "GPIOQ7",
"134": "PWM1_0",
"135": "PWM1_1",
"136": "PWM1_2",
"137": "PWM1_3",
"138": "PWM1_FAULT"
},
"partname_humanreadable": "LM3S series",
"partname_doxygen": "LM3S",
"includeguard": "LIBOPENCM3_LM3S_NVIC_H"
}

125
include/libopencm3/lm3s/irq.yaml
View File

@ -1,125 +0,0 @@
# Although this says LM3S, the interrupt table applies to the LM4F as well
# Some interrupt vectores marked as reserved in LM3S are used in LM4F, and some
# vectors in LM3S are marked reserved for LM4F. However, the common vectors are
# identical, and we can safely use the same interrupt table. Reserved vectors
# will never be triggered, so having them is perfectly safe.
includeguard: LIBOPENCM3_LM3S_NVIC_H
partname_humanreadable: LM3S series
partname_doxygen: LM3S
irqs:
0: GPIOA
1: GPIOB
2: GPIOC
3: GPIOD
4: GPIOE
5: UART0
6: UART1
7: SSI0
8: I2C0
9: PWM0_FAULT
10: PWM0_0
11: PWM0_1
12: PWM0_2
13: QEI0
14: ADC0SS0
15: ADC0SS1
16: ADC0SS2
17: ADC0SS3
18: WATCHDOG
19: TIMER0A
20: TIMER0B
21: TIMER1A
22: TIMER1B
23: TIMER2A
24: TIMER2B
25: COMP0
26: COMP1
27: COMP2
28: SYSCTL
29: FLASH
30: GPIOF
31: GPIOG
32: GPIOH
33: UART2
34: SSI1
35: TIMER3A
36: TIMER3B
37: I2C1
38: QEI1
39: CAN0
40: CAN1
41: CAN2
42: ETH
43: HIBERNATE
44: USB0
45: PWM0_3
46: UDMA
47: UDMAERR
48: ADC1SS0
49: ADC1SS1
50: ADC1SS2
51: ADC1SS3
52: I2S0
53: EPI0
54: GPIOJ
55: GPIOK
56: GPIOL
57: SSI2
58: SSI3
59: UART3
60: UART4
61: UART5
62: UART6
63: UART7
# undefined: slot 64 - 67
68: I2C2
69: I2C3
70: TIMER4A
71: TIMER4B
# undefined: slot 72 - 91
92: TIMER5A
93: TIMER5B
94: WTIMER0A
95: WTIMER0B
96: WTIMER1A
97: WTIMER1B
98: WTIMER2A
99: WTIMER2B
100: WTIMER3A
101: WTIMER3B
102: WTIMER4A
103: WTIMER4B
104: WTIMER5A
105: WTIMER5B
106: SYSEXC
107: PECI0
108: LPC0
109: I2C4
110: I2C5
111: GPIOM
112: GPION
# undefined: slot 113
114: FAN0
# undefined: slot 115
116: GPIOP0
117: GPIOP1
118: GPIOP2
119: GPIOP3
120: GPIOP4
121: GPIOP5
122: GPIOP6
123: GPIOP7
124: GPIOQ0
125: GPIOQ1
126: GPIOQ2
127: GPIOQ3
128: GPIOQ4
129: GPIOQ5
130: GPIOQ6
131: GPIOQ7
# undefined: slot 132 - 133
134: PWM1_0
135: PWM1_1
136: PWM1_2
137: PWM1_3
138: PWM1_FAULT

63
include/libopencm3/lpc13xx/irq.json
View File

@ -0,0 +1,63 @@
{
"irqs": {
"0": "pio0_0",
"1": "pio0_1",
"2": "pio0_2",
"3": "pio0_3",
"4": "pio0_4",
"5": "pio0_5",
"6": "pio0_6",
"7": "pio0_7",
"8": "pio0_8",
"9": "pio0_9",
"10": "pio0_10",
"11": "pio0_11",
"12": "pio1_0",
"13": "pio1_1",
"14": "pio1_2",
"15": "pio1_3",
"16": "pio1_4",
"17": "pio1_5",
"18": "pio1_6",
"19": "pio1_7",
"20": "pio1_8",
"21": "pio1_9",
"22": "pio1_10",
"23": "pio1_11",
"24": "pio2_0",
"25": "pio2_1",
"26": "pio2_2",
"27": "pio2_3",
"28": "pio2_4",
"29": "pio2_5",
"30": "pio2_6",
"31": "pio2_7",
"32": "pio2_8",
"33": "pio2_9",
"34": "pio2_10",
"35": "pio2_11",
"36": "pio3_0",
"37": "pio3_1",
"38": "pio3_2",
"39": "pio3_3",
"40": "i2c0",
"41": "ct16b0",
"42": "ct16b1",
"43": "ct32b0",
"44": "ct32b1",
"45": "ssp0",
"46": "uart",
"47": "usb",
"48": "usb_fiq",
"49": "adc",
"50": "wdt",
"51": "bod",
"53": "pio3",
"54": "pio2",
"55": "pio1",
"56": "ssp1"
},
"partname_humanreadable": "LPC 13xx series",
"partname_doxygen": "LPC13xx",
"includeguard": "LIBOPENCM3_LPC13xx_NVIC_H"
}

62
include/libopencm3/lpc13xx/irq.yaml
View File

@ -1,62 +0,0 @@
includeguard: LIBOPENCM3_LPC13xx_NVIC_H
partname_humanreadable: LPC 13xx series
partname_doxygen: LPC13xx
irqs:
0: pio0_0
1: pio0_1
2: pio0_2
3: pio0_3
4: pio0_4
5: pio0_5
6: pio0_6
7: pio0_7
8: pio0_8
9: pio0_9
10: pio0_10
11: pio0_11
12: pio1_0
13: pio1_1
14: pio1_2
15: pio1_3
16: pio1_4
17: pio1_5
18: pio1_6
19: pio1_7
20: pio1_8
21: pio1_9
22: pio1_10
23: pio1_11
24: pio2_0
25: pio2_1
26: pio2_2
27: pio2_3
28: pio2_4
29: pio2_5
30: pio2_6
31: pio2_7
32: pio2_8
33: pio2_9
34: pio2_10
35: pio2_11
36: pio3_0
37: pio3_1
38: pio3_2
39: pio3_3
40: i2c0
41: ct16b0
42: ct16b1
43: ct32b0
44: ct32b1
45: ssp0
46: uart
47: usb
48: usb_fiq
49: adc
50: wdt
51: bod
# 52: reserved
53: pio3
54: pio2
55: pio1
56: pio0
56: ssp1

42
include/libopencm3/lpc17xx/irq.json
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{
"irqs": {
"0": "wdt",
"1": "timer0",
"2": "timer1",
"3": "timer2",
"4": "timer3",
"5": "uart0",
"6": "uart1",
"7": "uart2",
"8": "uart3",
"9": "pwm",
"10": "i2c0",
"11": "i2c1",
"12": "i2c2",
"13": "spi",
"14": "ssp0",
"15": "ssp1",
"16": "pll0",
"17": "rtc",
"18": "eint0",
"19": "eint1",
"20": "eint2",
"21": "eint3",
"22": "adc",
"23": "bod",
"24": "usb",
"25": "can",
"26": "gpdma",
"27": "i2s",
"28": "ethernet",
"29": "rit",
"30": "motor_pwm",
"31": "qei",
"32": "pll1",
"33": "usb_act",
"34": "can_act"
},
"partname_humanreadable": "LPC 17xx series",
"partname_doxygen": "LPC17xx",
"includeguard": "LIBOPENCM3_LPC17xx_NVIC_H"
}

39
include/libopencm3/lpc17xx/irq.yaml
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includeguard: LIBOPENCM3_LPC17xx_NVIC_H
partname_humanreadable: LPC 17xx series
partname_doxygen: LPC17xx
irqs:
0: wdt
1: timer0
2: timer1
3: timer2
4: timer3
5: uart0
6: uart1
7: uart2
8: uart3
9: pwm
10: i2c0
11: i2c1
12: i2c2
13: spi
14: ssp0
15: ssp1
16: pll0
17: rtc
18: eint0
19: eint1
20: eint2
21: eint3
22: adc
23: bod
24: usb
25: can
26: gpdma
27: i2s
28: ethernet
29: rit
30: motor_pwm
31: qei
32: pll1
33: usb_act
34: can_act

36
include/libopencm3/lpc43xx/m0/irq.json
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{
"irqs": {
"0": "rtc",
"1": "m4core",
"2": "dma",
"4": "flasheepromat",
"5": "ethernet",
"6": "sdio",
"7": "lcd",
"8": "usb0",
"9": "usb1",
"10": "sct",
"11": "ritimer_or_wwdt",
"12": "timer0",
"13": "gint1",
"14": "pin_int4",
"15": "timer3",
"16": "mcpwm",
"17": "adc0",
"18": "i2c0_or_irc1",
"19": "sgpio",
"20": "spi_or_dac",
"21": "adc1",
"22": "ssp0_or_ssp1",
"23": "eventrouter",
"24": "usart0",
"25": "uart1",
"26": "usart2_or_c_can1",
"27": "usart3",
"28": "i2s0_or_i2s1",
"29": "c_can0"
},
"partname_humanreadable": "LPC 43xx series M0 core",
"partname_doxygen": "LPC43xx (M0)",
"includeguard": "LIBOPENCM3_LPC43xx_M0_NVIC_H"
}

34
include/libopencm3/lpc43xx/m0/irq.yaml
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includeguard: LIBOPENCM3_LPC43xx_M0_NVIC_H
partname_humanreadable: LPC 43xx series M0 core
partname_doxygen: LPC43xx (M0)
irqs:
0: rtc
1: m4core
2: dma
# reserved: 3
4: flasheepromat
5: ethernet
6: sdio
7: lcd
8: usb0
9: usb1
10: sct
11: ritimer_or_wwdt
12: timer0
13: gint1
14: pin_int4
15: timer3
16: mcpwm
17: adc0
18: i2c0_or_irc1
19: sgpio
20: spi_or_dac
21: adc1
22: ssp0_or_ssp1
23: eventrouter
24: usart0
25: uart1
26: usart2_or_c_can1
27: usart3
28: i2s0_or_i2s1
29: c_can0

54
include/libopencm3/lpc43xx/m4/irq.json
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{
"irqs": {
"0": "dac",
"1": "m0core",
"2": "dma",
"5": "ethernet",
"6": "sdio",
"7": "lcd",
"8": "usb0",
"9": "usb1",
"10": "sct",
"11": "ritimer",
"12": "timer0",
"13": "timer1",
"14": "timer2",
"15": "timer3",
"16": "mcpwm",
"17": "adc0",
"18": "i2c0",
"19": "i2c1",
"20": "spi",
"21": "adc1",
"22": "ssp0",
"23": "ssp1",
"24": "usart0",
"25": "uart1",
"26": "usart2",
"27": "usart3",
"28": "i2s0",
"29": "i2s1",
"30": "spifi",
"31": "sgpio",
"32": "pin_int0",
"33": "pin_int1",
"34": "pin_int2",
"35": "pin_int3",
"36": "pin_int4",
"37": "pin_int5",
"38": "pin_int6",
"39": "pin_int7",
"40": "gint0",
"41": "gint1",
"42": "eventrouter",
"43": "c_can1",
"46": "atimer",
"47": "rtc",
"49": "wwdt",
"51": "c_can0",
"52": "qei"
},
"partname_humanreadable": "LPC 43xx series M4 core",
"partname_doxygen": "LPC43xx (M4)",
"includeguard": "LIBOPENCM3_LPC43xx_M4_NVIC_H"
}

55
include/libopencm3/lpc43xx/m4/irq.yaml
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@ -1,55 +0,0 @@
includeguard: LIBOPENCM3_LPC43xx_M4_NVIC_H
partname_humanreadable: LPC 43xx series M4 core
partname_doxygen: LPC43xx (M4)
irqs:
0: dac
1: m0core
2: dma
# reserved: 3, 4
5: ethernet
6: sdio
7: lcd
8: usb0
9: usb1
10: sct
11: ritimer
12: timer0
13: timer1
14: timer2
15: timer3
16: mcpwm
17: adc0
18: i2c0
19: i2c1
20: spi
21: adc1
22: ssp0
23: ssp1
24: usart0
25: uart1
26: usart2
27: usart3
28: i2s0
29: i2s1
30: spifi
31: sgpio
32: pin_int0
33: pin_int1
34: pin_int2
35: pin_int3
36: pin_int4
37: pin_int5
38: pin_int6
39: pin_int7
40: gint0
41: gint1
42: eventrouter
43: c_can1
# reserved: 44, 45
46: atimer
47: rtc
# reserved: 48
49: wwdt
# reserved: 50
51: c_can0
52: qei

39
include/libopencm3/sam/3n/irq.json
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{
"irqs": [
"supc",
"rstc",
"rtc",
"rtt",
"wdg",
"pmc",
"eefc0",
"reserved0",
"uart0",
"uart1",
"reserved1",
"pioa",
"piob",
"pioc",
"usart0",
"usart1",
"reserved2",
"reserved3",
"reserved4",
"twi0",
"twi1",
"spi",
"reserved5",
"tc0",
"tc1",
"tc2",
"tc3",
"tc4",
"tc5",
"adc",
"dacc",
"pwm"
],
"partname_humanreadable": "Atmel SAM3N series",
"partname_doxygen": "SAM3N",
"includeguard": "LIBOPENCM3_SAM3N_NVIC_H"
}

36
include/libopencm3/sam/3n/irq.yaml
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@ -1,36 +0,0 @@
includeguard: LIBOPENCM3_SAM3N_NVIC_H
partname_humanreadable: Atmel SAM3N series
partname_doxygen: SAM3N
irqs:
- supc
- rstc
- rtc
- rtt
- wdg
- pmc
- eefc0
- reserved0
- uart0
- uart1
- reserved1
- pioa
- piob
- pioc
- usart0
- usart1
- reserved2
- reserved3
- reserved4
- twi0
- twi1
- spi
- reserved5
- tc0
- tc1
- tc2
- tc3
- tc4
- tc5
- adc
- dacc
- pwm

52
include/libopencm3/sam/3x/irq.json
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{
"irqs": [
"supc",
"rstc",
"rtc",
"rtt",
"wdg",
"pmc",
"eefc0",
"eefc1",
"uart",
"smc_sdramc",
"sdramc",
"pioa",
"piob",
"pioc",
"piod",
"pioe",
"piof",
"usart0",
"usart1",
"usart2",
"usart3",
"hsmci",
"twi0",
"twi1",
"spi0",
"spi1",
"ssc",
"tc0",
"tc1",
"tc2",
"tc3",
"tc4",
"tc5",
"tc6",
"tc7",
"tc8",
"pwm",
"adc",
"dacc",
"dmac",
"uotghs",
"trng",
"emac",
"can0",
"can1"
],
"partname_humanreadable": "Atmel SAM3X series",
"partname_doxygen": "SAM3X",
"includeguard": "LIBOPENCM3_SAM3X_NVIC_H"
}

49
include/libopencm3/sam/3x/irq.yaml
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@ -1,49 +0,0 @@
includeguard: LIBOPENCM3_SAM3X_NVIC_H
partname_humanreadable: Atmel SAM3X series
partname_doxygen: SAM3X
irqs:
- supc
- rstc
- rtc
- rtt
- wdg
- pmc
- eefc0
- eefc1
- uart
- smc_sdramc
- sdramc
- pioa
- piob
- pioc
- piod
- pioe
- piof
- usart0
- usart1
- usart2
- usart3
- hsmci
- twi0
- twi1
- spi0
- spi1
- ssc
- tc0
- tc1
- tc2
- tc3
- tc4
- tc5
- tc6
- tc7
- tc8
- pwm
- adc
- dacc
- dmac
- uotghs
- trng
- emac
- can0
- can1

39
include/libopencm3/stm32/f0/irq.json
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{
"irqs": [
"wwdg",
"pvd",
"rtc",
"flash",
"rcc",
"exti0_1",
"exti2_3",
"exti4_15",
"tsc",
"dma1_channel1",
"dma1_channel2_3",
"dma1_channel4_5",
"adc_comp",
"tim1_brk_up_trg_com",
"tim1_cc",
"tim2",
"tim3",
"tim6_dac",
"reserved0",
"tim14",
"tim15",
"tim16",
"tim17",
"i2c1",
"i2c2",
"spi1",
"spi2",
"usart1",
"usart2",
"reserved1",
"cec",
"reserved2"
],
"partname_humanreadable": "STM32 F0 series",
"partname_doxygen": "STM32F0",
"includeguard": "LIBOPENCM3_STM32_F0_NVIC_H"
}

36
include/libopencm3/stm32/f0/irq.yaml
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includeguard: LIBOPENCM3_STM32_F0_NVIC_H
partname_humanreadable: STM32 F0 series
partname_doxygen: STM32F0
irqs:
- wwdg
- pvd
- rtc
- flash
- rcc
- exti0_1
- exti2_3
- exti4_15
- tsc
- dma1_channel1
- dma1_channel2_3
- dma1_channel4_5
- adc_comp
- tim1_brk_up_trg_com
- tim1_cc
- tim2
- tim3
- tim6_dac
- reserved0
- tim14
- tim15
- tim16
- tim17
- i2c1
- i2c2
- spi1
- spi2
- usart1
- usart2
- reserved1
- cec
- reserved2

75
include/libopencm3/stm32/f1/irq.json
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{
"irqs": [
"wwdg",
"pvd",
"tamper",
"rtc",
"flash",
"rcc",
"exti0",
"exti1",
"exti2",
"exti3",
"exti4",
"dma1_channel1",
"dma1_channel2",
"dma1_channel3",
"dma1_channel4",
"dma1_channel5",
"dma1_channel6",
"dma1_channel7",
"adc1_2",
"usb_hp_can_tx",
"usb_lp_can_rx0",
"can_rx1",
"can_sce",
"exti9_5",
"tim1_brk",
"tim1_up",
"tim1_trg_com",
"tim1_cc",
"tim2",
"tim3",
"tim4",
"i2c1_ev",
"i2c1_er",
"i2c2_ev",
"i2c2_er",
"spi1",
"spi2",
"usart1",
"usart2",
"usart3",
"exti15_10",
"rtc_alarm",
"usb_wakeup",
"tim8_brk",
"tim8_up",
"tim8_trg_com",
"tim8_cc",
"adc3",
"fsmc",
"sdio",
"tim5",
"spi3",
"uart4",
"uart5",
"tim6",
"tim7",
"dma2_channel1",
"dma2_channel2",
"dma2_channel3",
"dma2_channel4_5",
"dma2_channel5",
"eth",
"eth_wkup",
"can2_tx",
"can2_rx0",
"can2_rx1",
"can2_sce",
"otg_fs"
],
"partname_humanreadable": "STM32 F1 series",
"partname_doxygen": "STM32F1",
"includeguard": "LIBOPENCM3_STM32_F1_NVIC_H"
}

72
include/libopencm3/stm32/f1/irq.yaml
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includeguard: LIBOPENCM3_STM32_F1_NVIC_H
partname_humanreadable: STM32 F1 series
partname_doxygen: STM32F1
irqs:
- wwdg
- pvd
- tamper
- rtc
- flash
- rcc
- exti0
- exti1
- exti2
- exti3
- exti4
- dma1_channel1
- dma1_channel2
- dma1_channel3
- dma1_channel4
- dma1_channel5
- dma1_channel6
- dma1_channel7
- adc1_2
- usb_hp_can_tx
- usb_lp_can_rx0
- can_rx1
- can_sce
- exti9_5
- tim1_brk
- tim1_up
- tim1_trg_com
- tim1_cc
- tim2
- tim3
- tim4
- i2c1_ev
- i2c1_er
- i2c2_ev
- i2c2_er
- spi1
- spi2
- usart1
- usart2
- usart3
- exti15_10
- rtc_alarm
- usb_wakeup
- tim8_brk
- tim8_up
- tim8_trg_com
- tim8_cc
- adc3
- fsmc
- sdio
- tim5
- spi3
- uart4
- uart5
- tim6
- tim7
- dma2_channel1
- dma2_channel2
- dma2_channel3
- dma2_channel4_5
- dma2_channel5
- eth
- eth_wkup
- can2_tx
- can2_rx0
- can2_rx1
- can2_sce
- otg_fs

88
include/libopencm3/stm32/f2/irq.json
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{
"irqs": [
"nvic_wwdg",
"pvd",
"tamp_stamp",
"rtc_wkup",
"flash",
"rcc",
"exti0",
"exti1",
"exti2",
"exti3",
"exti4",
"dma1_stream0",
"dma1_stream1",
"dma1_stream2",
"dma1_stream3",
"dma1_stream4",
"dma1_stream5",
"dma1_stream6",
"adc",
"can1_tx",
"can1_rx0",
"can1_rx1",
"can1_sce",
"exti9_5",
"tim1_brk_tim9",
"tim1_up_tim10",
"tim1_trg_com_tim11",
"tim1_cc",
"tim2",
"tim3",
"tim4",
"i2c1_ev",
"i2c1_er",
"i2c2_ev",
"i2c2_er",
"spi1",
"spi2",
"usart1",
"usart2",
"usart3",
"exti15_10",
"rtc_alarm",
"usb_fs_wkup",
"tim8_brk_tim12",
"tim8_up_tim13",
"tim8_trg_com_tim14",
"tim8_cc",
"dma1_stream7",
"fsmc",
"sdio",
"tim5",
"spi3",
"uart4",
"uart5",
"tim6_dac",
"tim7",
"dma2_stream0",
"dma2_stream1",
"dma2_stream2",
"dma2_stream3",
"dma2_stream4",
"eth",
"eth_wkup",
"can2_tx",
"can2_rx0",
"can2_rx1",
"can2_sce",
"otg_fs",
"dma2_stream5",
"dma2_stream6",
"dma2_stream7",
"usart6",
"i2c3_ev",
"i2c3_er",
"otg_hs_ep1_out",
"otg_hs_ep1_in",
"otg_hs_wkup",
"otg_hs",
"dcmi",
"cryp",
"hash_rng"
],
"partname_humanreadable": "STM32 F2 series",
"partname_doxygen": "STM32F2",
"includeguard": "LIBOPENCM3_STM32_F2_NVIC_H"
}

85
include/libopencm3/stm32/f2/irq.yaml
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@ -1,85 +0,0 @@
includeguard: LIBOPENCM3_STM32_F2_NVIC_H
partname_humanreadable: STM32 F2 series
partname_doxygen: STM32F2
irqs:
- nvic_wwdg
- pvd
- tamp_stamp
- rtc_wkup
- flash
- rcc
- exti0
- exti1
- exti2
- exti3
- exti4
- dma1_stream0
- dma1_stream1
- dma1_stream2
- dma1_stream3
- dma1_stream4
- dma1_stream5
- dma1_stream6
- adc
- can1_tx
- can1_rx0
- can1_rx1
- can1_sce
- exti9_5
- tim1_brk_tim9
- tim1_up_tim10
- tim1_trg_com_tim11
- tim1_cc
- tim2
- tim3
- tim4
- i2c1_ev
- i2c1_er
- i2c2_ev
- i2c2_er
- spi1
- spi2
- usart1
- usart2
- usart3
- exti15_10
- rtc_alarm
- usb_fs_wkup
- tim8_brk_tim12
- tim8_up_tim13
- tim8_trg_com_tim14
- tim8_cc
- dma1_stream7
- fsmc
- sdio
- tim5
- spi3
- uart4
- uart5
- tim6_dac
- tim7
- dma2_stream0
- dma2_stream1
- dma2_stream2
- dma2_stream3
- dma2_stream4
- eth
- eth_wkup
- can2_tx
- can2_rx0
- can2_rx1
- can2_sce
- otg_fs
- dma2_stream5
- dma2_stream6
- dma2_stream7
- usart6
- i2c3_ev
- i2c3_er
- otg_hs_ep1_out
- otg_hs_ep1_in
- otg_hs_wkup
- otg_hs
- dcmi
- cryp
- hash_rng

88
include/libopencm3/stm32/f3/irq.json
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{
"irqs": [
"nvic_wwdg",
"pvd",
"tamp_stamp",
"rtc_wkup",
"flash",
"rcc",
"exti0",
"exti1",
"exti2_tsc",
"exti3",
"exti4",
"dma1_ch1",
"dma1_ch2",
"dma1_ch3",
"dma1_ch4",
"dma1_ch5",
"dma1_ch6",
"dma1_ch7",
"adc1_2",
"usb_hp_can1_tx",
"usb_lp_can1_rx0",
"can1_rx1",
"can1_sce",
"exti9_5",
"tim1_brk_tim15",
"tim1_up_tim16",
"tim1_trg_com_tim17",
"tim1_cc",
"tim2",
"tim3",
"tim4",
"i2c1_ev_exti23",
"i2c1_er",
"i2c2_ev_exti24",
"i2c2_er",
"spi1",
"spi2",
"usart1_exti25",
"usart2_exti26",
"usart3_exti28",
"exti15_10",
"rtc_alarm",
"usb_wkup_a",
"tim8_brk",
"tim8_up",
"tim8_trg_com",
"tim8_cc",
"adc3",
"reserved_1",
"reserved_2",
"reserved_3",
"spi3",
"uart4_exti34",
"uart5_exti35",
"tim6_dac",
"tim7",
"dma2_ch1",
"dma2_ch2",
"dma2_ch3",
"dma2_ch4",
"dma2_ch5",
"eth",
"reserved_4",
"reserved_5",
"comp123",
"comp456",
"comp7",
"reserved_6",
"reserved_7",
"reserved_8",
"reserved_9",
"reserved_10",
"reserved_11",
"reserved_12",
"usb_hp",
"usb_lp",
"usb_wkup",
"reserved_13",
"reserved_14",
"reserved_15",
"reserved_16"
],
"partname_humanreadable": "STM32 F3 series",
"partname_doxygen": "STM32F3",
"includeguard": "LIBOPENCM3_STM32_F3_NVIC_H"
}

85
include/libopencm3/stm32/f3/irq.yaml
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@ -1,85 +0,0 @@
includeguard: LIBOPENCM3_STM32_F3_NVIC_H
partname_humanreadable: STM32 F3 series
partname_doxygen: STM32F3
irqs:
- nvic_wwdg
- pvd
- tamp_stamp
- rtc_wkup
- flash
- rcc
- exti0
- exti1
- exti2_tsc
- exti3
- exti4
- dma1_ch1
- dma1_ch2
- dma1_ch3
- dma1_ch4
- dma1_ch5
- dma1_ch6
- dma1_ch7
- adc1_2
- usb_hp_can1_tx
- usb_lp_can1_rx0
- can1_rx1
- can1_sce
- exti9_5
- tim1_brk_tim15
- tim1_up_tim16
- tim1_trg_com_tim17
- tim1_cc
- tim2
- tim3
- tim4
- i2c1_ev_exti23
- i2c1_er
- i2c2_ev_exti24
- i2c2_er
- spi1
- spi2
- usart1_exti25
- usart2_exti26
- usart3_exti28
- exti15_10
- rtc_alarm
- usb_wkup_a
- tim8_brk
- tim8_up
- tim8_trg_com
- tim8_cc
- adc3
- reserved_1
- reserved_2
- reserved_3
- spi3
- uart4_exti34
- uart5_exti35
- tim6_dac
- tim7
- dma2_ch1
- dma2_ch2
- dma2_ch3
- dma2_ch4
- dma2_ch5
- eth
- reserved_4
- reserved_5
- comp123
- comp456
- comp7
- reserved_6
- reserved_7
- reserved_8
- reserved_9
- reserved_10
- reserved_11
- reserved_12
- usb_hp
- usb_lp
- usb_wkup
- reserved_13
- reserved_14
- reserved_15
- reserved_16

88
include/libopencm3/stm32/f4/irq.json
View File

@ -0,0 +1,88 @@
{
"irqs": [
"nvic_wwdg",
"pvd",
"tamp_stamp",
"rtc_wkup",
"flash",
"rcc",
"exti0",
"exti1",
"exti2",
"exti3",
"exti4",
"dma1_stream0",
"dma1_stream1",
"dma1_stream2",
"dma1_stream3",
"dma1_stream4",
"dma1_stream5",
"dma1_stream6",
"adc",
"can1_tx",
"can1_rx0",
"can1_rx1",
"can1_sce",
"exti9_5",
"tim1_brk_tim9",
"tim1_up_tim10",
"tim1_trg_com_tim11",
"tim1_cc",
"tim2",
"tim3",
"tim4",
"i2c1_ev",
"i2c1_er",
"i2c2_ev",
"i2c2_er",
"spi1",
"spi2",
"usart1",
"usart2",
"usart3",
"exti15_10",
"rtc_alarm",
"usb_fs_wkup",
"tim8_brk_tim12",
"tim8_up_tim13",
"tim8_trg_com_tim14",
"tim8_cc",
"dma1_stream7",
"fsmc",
"sdio",
"tim5",
"spi3",
"uart4",
"uart5",
"tim6_dac",
"tim7",
"dma2_stream0",
"dma2_stream1",
"dma2_stream2",
"dma2_stream3",
"dma2_stream4",
"eth",
"eth_wkup",
"can2_tx",
"can2_rx0",
"can2_rx1",
"can2_sce",
"otg_fs",
"dma2_stream5",
"dma2_stream6",
"dma2_stream7",
"usart6",
"i2c3_ev",
"i2c3_er",
"otg_hs_ep1_out",
"otg_hs_ep1_in",
"otg_hs_wkup",
"otg_hs",
"dcmi",
"cryp",
"hash_rng"
],
"partname_humanreadable": "STM32 F4 series",
"partname_doxygen": "STM32F4",
"includeguard": "LIBOPENCM3_STM32_F4_NVIC_H"
}

85
include/libopencm3/stm32/f4/irq.yaml
View File

@ -1,85 +0,0 @@
includeguard: LIBOPENCM3_STM32_F4_NVIC_H
partname_humanreadable: STM32 F4 series
partname_doxygen: STM32F4
irqs:
- nvic_wwdg
- pvd
- tamp_stamp
- rtc_wkup
- flash
- rcc
- exti0
- exti1
- exti2
- exti3
- exti4
- dma1_stream0
- dma1_stream1
- dma1_stream2
- dma1_stream3
- dma1_stream4
- dma1_stream5
- dma1_stream6
- adc
- can1_tx
- can1_rx0
- can1_rx1
- can1_sce
- exti9_5
- tim1_brk_tim9
- tim1_up_tim10
- tim1_trg_com_tim11
- tim1_cc
- tim2
- tim3
- tim4
- i2c1_ev
- i2c1_er
- i2c2_ev
- i2c2_er
- spi1
- spi2
- usart1
- usart2
- usart3
- exti15_10
- rtc_alarm
- usb_fs_wkup
- tim8_brk_tim12
- tim8_up_tim13
- tim8_trg_com_tim14
- tim8_cc
- dma1_stream7
- fsmc
- sdio
- tim5
- spi3
- uart4
- uart5
- tim6_dac
- tim7
- dma2_stream0
- dma2_stream1
- dma2_stream2
- dma2_stream3
- dma2_stream4
- eth
- eth_wkup
- can2_tx
- can2_rx0
- can2_rx1
- can2_sce
- otg_fs
- dma2_stream5
- dma2_stream6
- dma2_stream7
- usart6
- i2c3_ev
- i2c3_er
- otg_hs_ep1_out
- otg_hs_ep1_in
- otg_hs_wkup
- otg_hs
- dcmi
- cryp
- hash_rng

64
include/libopencm3/stm32/l1/irq.json
View File

@ -0,0 +1,64 @@
{
"irqs": [
"wwdg",
"pvd",
"tamper_stamp",
"rtc_wkup",
"flash",
"rcc",
"exti0",
"exti1",
"exti2",
"exti3",
"exti4",
"dma1_channel1",
"dma1_channel2",
"dma1_channel3",
"dma1_channel4",
"dma1_channel5",
"dma1_channel6",
"dma1_channel7",
"adc1",
"usb_hp",
"usb_lp",
"dac",
"comp",
"exti9_5",
"lcd",
"tim9",
"tim10",
"tim11",
"tim2",
"tim3",
"tim4",
"i2c1_ev",
"i2c1_er",
"i2c2_ev",
"i2c2_er",
"spi1",
"spi2",
"usart1",
"usart2",
"usart3",
"exti15_10",
"rtc_alarm",
"usb_fs_wakeup",
"tim6",
"tim7",
"sdio",
"tim5",
"spi3",
"uart4",
"uart5",
"dma2_ch1",
"dma2_ch2",
"dma2_ch3",
"dma2_ch4",
"dma2_ch5",
"aes",
"comp_acq"
],
"partname_humanreadable": "STM32 L1 series",
"partname_doxygen": "STM32L1",
"includeguard": "LIBOPENCM3_STM32_L1_NVIC_H"
}

62
include/libopencm3/stm32/l1/irq.yaml
View File

@ -1,62 +0,0 @@
includeguard: LIBOPENCM3_STM32_L1_NVIC_H
partname_humanreadable: STM32 L1 series
partname_doxygen: STM32L1
irqs:
- wwdg
- pvd
- tamper_stamp
- rtc_wkup
- flash
- rcc
- exti0
- exti1
- exti2
- exti3
- exti4
- dma1_channel1
- dma1_channel2
- dma1_channel3
- dma1_channel4
- dma1_channel5
- dma1_channel6
- dma1_channel7
- adc1
- usb_hp
- usb_lp
- dac
- comp
- exti9_5
- lcd
- tim9
- tim10
- tim11
- tim2
- tim3
- tim4
- i2c1_ev
- i2c1_er
- i2c2_ev
- i2c2_er
- spi1
- spi2
- usart1
- usart2
- usart3
- exti15_10
- rtc_alarm
- usb_fs_wakeup
- tim6
- tim7
# below here is medium+/high density
- sdio
- tim5
- spi3
- uart4
- uart5
- dma2_ch1
- dma2_ch2
- dma2_ch3
- dma2_ch4
- dma2_ch5
- aes
- comp_acq

20
scripts/irq2nvic_h
View File

@ -17,7 +17,7 @@
# You should have received a copy of the GNU Lesser General Public License
# along with this library. If not, see <http://www.gnu.org/licenses/>.
"""Generate an nvic.h header from a small YAML file describing the interrupt
"""Generate an nvic.h header from a small JSON file describing the interrupt
numbers.
Code generation is chosen here because the resulting C code needs to be very
@ -29,7 +29,7 @@ method to achive the same thing with C preprocessor is known to the author.
import sys
import os
import os.path
import yaml
import json
template_nvic_h = '''\
/* This file is part of the libopencm3 project.
@ -110,7 +110,7 @@ template_cmsis_h = '''\
'''
def convert(infile, outfile_nvic, outfile_vectornvic, outfile_cmsis):
data = yaml.load(infile)
data = json.load(infile)
irq2name = list(enumerate(data['irqs']) if isinstance(data['irqs'], list) else data['irqs'].items())
irqnames = [v for (k,v) in irq2name]
@ -118,9 +118,9 @@ def convert(infile, outfile_nvic, outfile_vectornvic, outfile_cmsis):
if isinstance(data['irqs'], list):
data['irqcount'] = len(irq2name)
else:
data['irqcount'] = max(data['irqs'].keys()) + 1
data['irqcount'] = max([int(x) for x in data['irqs'].keys()]) + 1
data['irqdefinitions'] = "\n".join('#define NVIC_%s_IRQ %d'%(v.upper(),k) for (k,v) in irq2name)
data['irqdefinitions'] = "\n".join('#define NVIC_%s_IRQ %d'%(v.upper(),int(k)) for (k,v) in irq2name)
data['isrprototypes'] = "\n".join('void WEAK %s_isr(void);'%name.lower() for name in irqnames)
data['isrpragmas'] = "\n".join('#pragma weak %s_isr = blocking_handler'%name.lower() for name in irqnames)
data['vectortableinitialization'] = ', \\\n '.join('[NVIC_%s_IRQ] = %s_isr'%(name.upper(), name.lower()) for name in irqnames)
@ -148,11 +148,11 @@ def main():
else:
remove = False
infile = sys.argv[1]
if not infile.startswith('./include/libopencm3/') or not infile.endswith('/irq.yaml'):
raise ValueError("Arguent must match ./include/libopencm3/**/irq.yaml")
nvic_h = infile.replace('irq.yaml', 'nvic.h')
vector_nvic_c = infile.replace('./include/libopencm3/', './lib/').replace('irq.yaml', 'vector_nvic.c')
cmsis = infile.replace('irq.yaml', 'irqhandlers.h').replace('/libopencm3/', '/libopencmsis/')
if not infile.startswith('./include/libopencm3/') or not infile.endswith('/irq.json'):
raise ValueError("Arguent must match ./include/libopencm3/**/irq.json")
nvic_h = infile.replace('irq.json', 'nvic.h')
vector_nvic_c = infile.replace('./include/libopencm3/', './lib/').replace('irq.json', 'vector_nvic.c')
cmsis = infile.replace('irq.json', 'irqhandlers.h').replace('/libopencm3/', '/libopencmsis/')
if remove:
if os.path.exists(nvic_h):

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