STM32H7: Add support for RAM4 & RAM5, cleanup

* added: Linker script adds support for RAM4 and RAM5 memory regions, so
  that those are usable by code. This also fixes the fact that RAM4 was
  declared, but inaccessible previously
* changed: RAM1 is renamed to RAM2, shifting numbering of all regions.
  This is done in order to be in line with other STM32 definitions,
  similarly ROM1 became ROM2.

ld/devices.data

@@ -260,16 +260,16 @@ stm32g4?[34]?c* stm32g4ccm ROM=256K RAM=96K CCM=32K
 stm32g4?[34]?e* stm32g4ccm ROM=512K RAM=96K CCM=32K
 
 # For STM32H7 CCM is called D-TCM
-stm32h72[35]?e* stm32h7xxxe RAM=128K RAM1=16K RAM2=16K RAM4=16K CCM=128K
-stm32h72[35]?g* stm32h7xxxg RAM=128K RAM1=16K RAM2=16K RAM4=16K CCM=128K
-stm32h730?b* stm32h7xxxb RAM=128K RAM1=16K RAM2=16K RAM4=16K CCM=128K
-stm32h73[35]?g* stm32h7xxxg RAM=128K RAM1=16K RAM2=16K RAM4=16K CCM=128K
-stm32h742?i* stm32h7xxxi RAM=384K RAM1=32K RAM2=16K RAM4=64K CCM=128K
-stm32h742?g* stm32h74xxg RAM=384K RAM1=32K RAM2=16K RAM4=64K CCM=128K
-stm32h74[357]?i* stm32h7xxxi RAM=512K RAM1=128K RAM2=128K RAM3=32K RAM4=64K CCM=128K
-stm32h74[357]?g* stm32h74xxg RAM=512K RAM1=128K RAM2=128K RAM3=32K RAM4=64K CCM=128K
-stm32h75[357]?i* stm32h7xxxi RAM=512K RAM1=128K RAM2=128K RAM3=32K RAM4=64K CCM=128K
-stm32h750?b* stm32h7xxxb RAM=512K RAM1=128K RAM2=128K RAM3=32K RAM4=64K CCM=128K
+stm32h72[35]?e* stm32h7xxxe RAM=128K RAM2=16K RAM3=16K RAM5=16K CCM=128K
+stm32h72[35]?g* stm32h7xxxg RAM=128K RAM2=16K RAM3=16K RAM5=16K CCM=128K
+stm32h730?b* stm32h7xxxb RAM=128K RAM2=16K RAM3=16K RAM5=16K CCM=128K
+stm32h73[35]?g* stm32h7xxxg RAM=128K RAM2=16K RAM3=16K RAM5=16K CCM=128K
+stm32h742?i* stm32h7xxxi RAM=384K RAM2=32K RAM3=16K RAM5=64K CCM=128K
+stm32h742?g* stm32h74xxg RAM=384K RAM2=32K RAM3=16K RAM5=64K CCM=128K
+stm32h74[357]?i* stm32h7xxxi RAM=512K RAM2=128K RAM3=128K RAM4=32K RAM5=64K CCM=128K
+stm32h74[357]?g* stm32h74xxg RAM=512K RAM2=128K RAM3=128K RAM4=32K RAM5=64K CCM=128K
+stm32h75[357]?i* stm32h7xxxi RAM=512K RAM2=128K RAM3=128K RAM4=32K RAM5=64K CCM=128K
+stm32h750?b* stm32h7xxxb RAM=512K RAM2=128K RAM3=128K RAM4=32K RAM5=64K CCM=128K
 
 ################################################################################
 # the SAM3 chips
@@ -537,8 +537,8 @@ stm32h7xxxb stm32h7 ROM=128K
 stm32h7xxxe stm32h7 ROM=512K
 # stm32h72xxxg and stm32h73xxxg
 stm32h7xxxg stm32h7 ROM=1M
-stm32h74xxg stm32h7 ROM=512K ROM1=512K
-stm32h7xxxi stm32h7 ROM=1M ROM1=1M
+stm32h74xxg stm32h7 ROM=512K ROM2=512K
+stm32h7xxxi stm32h7 ROM=1M ROM2=1M
 
 ################################################################################
 # the SAM3 family groups

ld/linker.ld.S

@@ -50,6 +50,12 @@ MEMORY
 #if defined(_RAM3)
 	ram3 (rwx) : ORIGIN = _RAM3_OFF, LENGTH = _RAM3
 #endif
+#if defined(_RAM4)
+	ram4 (rwx) : ORIGIN = _RAM4_OFF, LENGTH = _RAM4
+#endif
+#if defined(_RAM5)
+	ram5 (rwx) : ORIGIN = _RAM5_OFF, LENGTH = _RAM5
+#endif
 #if defined(_CCM)
 	ccm (rwx) : ORIGIN = _CCM_OFF, LENGTH = _CCM
 #endif
@@ -168,6 +174,20 @@ SECTIONS
 	} >ram3
 #endif
 
+#if defined(_RAM4)
+	.ram4 : {
+		*(.ram4*)
+		. = ALIGN(4);
+	} >ram4
+#endif
+
+#if defined(_RAM5)
+	.ram5 : {
+		*(.ram5*)
+		. = ALIGN(4);
+	} >ram4
+#endif
+
 #if defined(_XSRAM)
 	.xsram : {
 		*(.xsram*)