From 75011168f7c95d7ce59d1ec96da3917a389f4416 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Thu, 18 Aug 2016 16:57:10 +0000 Subject: [PATCH] doc: stm32: fix doxygen syntax Missing endgroups, some accidental syntax errors/unknown commands. --- include/libopencm3/stm32/l1/gpio.h | 4 ++-- lib/stm32/common/adc_common_v2.c | 1 + lib/stm32/common/adc_common_v2_multi.c | 2 ++ lib/stm32/common/usart_common_v2.c | 8 ++++---- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/include/libopencm3/stm32/l1/gpio.h b/include/libopencm3/stm32/l1/gpio.h index c2970e2a..ca0b71b4 100644 --- a/include/libopencm3/stm32/l1/gpio.h +++ b/include/libopencm3/stm32/l1/gpio.h @@ -163,10 +163,10 @@ LGPL License Terms @ref lgpl_license /* Output type (OTx values) */ /** @defgroup gpio_output_type GPIO Output Pin Driver Type @ingroup gpio_defines -@list Push Pull -@list Open Drain @{*/ +/** Push-Pull */ #define GPIO_OTYPE_PP 0x0 +/** Open Drain */ #define GPIO_OTYPE_OD 0x1 /**@}*/ diff --git a/lib/stm32/common/adc_common_v2.c b/lib/stm32/common/adc_common_v2.c index ae4008ac..6d33388b 100644 --- a/lib/stm32/common/adc_common_v2.c +++ b/lib/stm32/common/adc_common_v2.c @@ -354,3 +354,4 @@ void adc_start_conversion_regular(uint32_t adc) while (ADC_CR(adc) & ADC_CR_ADSTART); } +/**@}*/ diff --git a/lib/stm32/common/adc_common_v2_multi.c b/lib/stm32/common/adc_common_v2_multi.c index 638232e0..a2f31239 100644 --- a/lib/stm32/common/adc_common_v2_multi.c +++ b/lib/stm32/common/adc_common_v2_multi.c @@ -127,3 +127,5 @@ void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[]) ADC_SQR3(adc) = reg32_3; ADC_SQR4(adc) = reg32_4; } + +/**@}*/ \ No newline at end of file diff --git a/lib/stm32/common/usart_common_v2.c b/lib/stm32/common/usart_common_v2.c index 3e64c25a..45f5e9ab 100644 --- a/lib/stm32/common/usart_common_v2.c +++ b/lib/stm32/common/usart_common_v2.c @@ -90,7 +90,7 @@ void usart_disable_tx_inversion(uint32_t usart) RX pin signal values are inverted. (VDD =0/mark, Gnd=1/idle). - @This bit field can only be written when the USART is disabled. + This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ @@ -104,7 +104,7 @@ void usart_enable_rx_inversion(uint32_t usart) RX pin signal works using the standard logic levels (VDD =1/idle, Gnd=0/mark) - @This bit field can only be written when the USART is disabled. + This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ @@ -127,7 +127,7 @@ void usart_disable_rx_inversion(uint32_t usart) Apart from this, the communication protocol is similar to normal USART mode. Any conflicts on the line must be managed by software - @This bit field can only be written when the USART is disabled. + This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */ @@ -139,7 +139,7 @@ void usart_enable_halfduplex(uint32_t usart) /*---------------------------------------------------------------------------*/ /** @brief USART Disable Half-duplex - @This bit field can only be written when the USART is disabled. + This bit field can only be written when the USART is disabled. @param[in] usart USART block register address base @ref usart_reg_base */